 Károly Balogh
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1df56495b7
* fix a typo in a comment. no functional change
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il y a 5 ans |
 michael
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032f3aa11a
* Fix visibility warning
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il y a 5 ans |
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michael
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b2abcba6d9
* Generic list mode, allow use of record instead of class
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il y a 5 ans |
 Jonas Maebe
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a2174753c1
- removed tabstractrecorddef.get_unit_symtable, which did not always return the unit
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il y a 5 ans |
 florian
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7a60e044e3
* simplify constant expressions after re-ordering, resolves #37062
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il y a 5 ans |
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michael
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84bffbe75e
* Fix bug #37064: missing stdcall calling convention modifier
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il y a 5 ans |
 pierre
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a414997a84
Use 0 instead of 0xffffffff to disable page width
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il y a 5 ans |
|
pierre
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db0f0be3ba
Use 0 instead of 0xffffffff to disable page width
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il y a 5 ans |
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pierre
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c77ef7d6dd
Regenerate all Makefile's after change in utils/fpcm/fpcmake.ini to better support use of i386 compiler on x86_64 machines
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il y a 5 ans |
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michael
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0333677ac3
* Fix from Bart Broersma, small optimization (bug ID 37061)
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il y a 5 ans |
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pierre
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ae91ff00b9
Do not add -Fl$GCCLIBDIR to FPCMAKEOPT as this is now handled by fpcmake
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il y a 5 ans |
|
pierre
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406d17a4b6
Update fpcmake.inc and revision.inc after previous commit #45352
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il y a 5 ans |
|
pierre
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5ffc1b8152
Use GCCLIBDIR variable for FPCMAKEGCCLIBDIR if FPCFPMAKE has same target cpu as CPU_TARGET
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il y a 5 ans |
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pierre
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3aa253c11d
Allow system unit to be compiled without RTTI feature
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il y a 5 ans |
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michael
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71e322d058
* Patch from Noel Duffy to improve IPV6 address parsing (bug ID tw37013)
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il y a 5 ans |
 Mattias Gaertner
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6ffba8e2b6
pas2js: filer: add specs to gen type
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il y a 5 ans |
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florian
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7dbab3a78f
* handle OP_XOR for a full mm register correctly in tcgx86.opmm_loc_reg
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il y a 5 ans |
 nickysn
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4beb4bf8b2
+ Z80: support the flags subregisters in the registers_interfere function
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il y a 5 ans |
|
nickysn
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c6c834949f
+ Z80: support all the flags subregisters in super_registers_equal
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il y a 5 ans |
|
nickysn
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fe12026959
+ support the LD instruction in TCpuAsmOptimizer.RegLoadedWithNewValue
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il y a 5 ans |
|
nickysn
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bb4d7a7a50
+ Z80: implemented TCpuAsmOptimizer.InstructionLoadsFromReg
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il y a 5 ans |
|
florian
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05091cf0dd
+ MovAndTest2Test optimization
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il y a 5 ans |
|
nickysn
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4abc498f2f
+ added the Z80 individual flag bits as subregisters
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il y a 5 ans |
|
nickysn
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b98cc1ebff
+ added subregisters for the Z80 flags
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il y a 5 ans |
|
nickysn
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1f8a9c708e
* use RegistersInterfere instead of SuperRegistersEqual in TAoptBase.RegInOp and TAoptBase.RegInRef
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il y a 5 ans |
|
nickysn
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531cc0ab0d
+ introduced TAOptBase.RegistersInterfere (which might not always be equivalent to SuperRegistersEqual)
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il y a 5 ans |
|
nickysn
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4263ff44c1
+ Z80: added a registers_interfere helper function
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il y a 5 ans |
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nickysn
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5947adcd7b
+ added a correct implementation of TAOptBase.SuperRegistersEqual for the Z80
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il y a 5 ans |
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michael
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50261464da
* Patch from N. Neumann, implement some delphi compatible StrToUint functions (bug id 37049)
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il y a 5 ans |
|
Mattias Gaertner
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4afe1de02f
pas2js: fixed arrayRef
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il y a 5 ans |
