 J. Gareth "Curious Kit" Moreton
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6757bf3832
* x86: New SHR-based optimisations
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3 years ago |
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J. Gareth "Curious Kit" Moreton
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de650dea55
* x86: Fixed minor logic bug in aoc_ForceNewIteration check where UpdateUsedRegs was called at the wrong time.
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3 years ago |
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J. Gareth "Curious Kit" Moreton
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9432a550e1
* x86: Bug fix where aoc_ForceNewIteration was
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3 years ago |
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J. Gareth "Curious Kit" Moreton
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627fb9a25b
* x86: New jump/label tracking in CrossJump optimisations
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3 years ago |
 florian
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4808ed63e3
* use MOVDQA instead of MOVQ in spilling_create_store
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3 years ago |
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J. Gareth "Curious Kit" Moreton
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72661fd5c1
Added missing MOVSXD check to PostPeepHoleOptsCpu
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3 years ago |
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J. Gareth "Curious Kit" Moreton
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b58fdc3e58
Improved ADD and SUB optimisations for LEA instructions
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3 years ago |
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J. Gareth "Curious Kit" Moreton
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fd28cc0db0
Better handling of zeroing upper parts of registers
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3 years ago |
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J. Gareth "Curious Kit" Moreton
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674ed4069a
Expanded MM block move to include YMM registers under AVX
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3 years ago |
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florian
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ec40db3da7
+ (V)Cvtss2CvtSd(V)Cvtsd2ss2Nop optimization, resolves #39360
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3 years ago |
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florian
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c67d35b8cc
* patch by J. Gareth Moreton: x86: Minor bitwise optimisations, resolves #39299
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4 years ago |
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florian
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7d6b01bfc4
+ SHXXMov2SHXX optimization
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4 years ago |
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florian
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bae583118a
* patch by J. Gareth Moreton: x86 JccMovJmpMov2MovSetcc improvement, resolves #38761
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4 years ago |
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florian
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5726428dcc
* patch by J. Gareth Moreton: Additional SETcc optimisations, resolves #38767
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4 years ago |
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florian
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578424cf51
* patch by J. Gareth Moreton: TEST chain shortcutting, resolves #38908
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4 years ago |
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florian
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4e9b42344e
+ AddLea2Lea optimization
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4 years ago |
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florian
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28efcfba65
+ patch by J. Gareth Moreton: Advanced MOVZX optimisations, resolves #38294
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4 years ago |
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florian
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2a990b8167
+ patch by J. Gareth Moreton: some new x86 assembler optimizations, resolves #38130
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4 years ago |
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florian
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b90ec52a0e
* x86: apply VOpVmov2VOp optimization to vmins*/vmaxs*
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4 years ago |
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florian
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78244d89dc
* use VPXORD in avx-512 mode as VPXOR does not work for the upper 16 registers
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4 years ago |
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florian
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8e62bf649e
* load 0.0 by (V)XORPS/D instead of (V)PXOR in mm registers
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4 years ago |
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florian
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1fb7603f61
* x86: ImulMov2Imul optimization
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4 years ago |
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florian
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afb68dbcf3
* factored out OptPass1VPXor
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5 years ago |
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florian
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809fb83334
* adapt optimizer to handle push/pop for stack alignment
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5 years ago |
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florian
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9b54588d75
+ PXorPXor2PXor optimization
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5 years ago |
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florian
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892454ff17
* patch by J. Gareth Moreton: optimize MOVSXD as well, resolves #36700
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5 years ago |
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florian
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993144b91b
* patch by J. Gareth Moreton: x86 SUB and LEA optimisations, resolves #36622
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5 years ago |
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florian
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16152cf948
* patch by J. Gareth Moreton: get rid of another pass through the assembler list by integrating OptReferences
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5 years ago |
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florian
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124c64152d
* patch by J. Gareth Moreton: EAX -> EDX:EAX sign extension shortcuts, and MOVSX shortcuts for AX register, part 2 of #36551
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5 years ago |
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florian
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d444f750f9
* factored out TX86AsmOptimizer.OptPass1Cmp
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5 years ago |
