 nickysn
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4aba225c8b
+ fix for writing absolute relocations in the .rel format
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5 anni fa |
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nickysn
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bface9fd94
- reverted previous commit, since it was incorrect
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5 anni fa |
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nickysn
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0caba1e84d
+ added internal error in taicpu.gencode.WriteNN to catch unhandled asm instructions
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5 anni fa |
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nickysn
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997184778a
+ call ApplyAsmSymbolRestrictions for symbols that should be exported from ar files
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5 anni fa |
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nickysn
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0d402a1341
+ support signed 8-bit immediate constants in the Z80 internal asm writer as well
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5 anni fa |
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nickysn
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11a7b8592f
+ support instructions like BIT, SET and RES in the Z80 internal asm writer
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5 anni fa |
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nickysn
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6764056eff
+ support the 'in A,(n)' and 'out (n),A' instrunction in the Z80 internal asm writer
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5 anni fa |
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nickysn
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c81f433795
+ Z80: support conditional JR
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5 anni fa |
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nickysn
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b164f5aa65
+ support relative jumps in the Z80 internal asm writer
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5 anni fa |
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nickysn
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0a09359906
+ support the RST instruction in the Z80 internal asm writer
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5 anni fa |
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nickysn
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be26429159
* preserve the actual file size (before aligning it to even bytes), when adding files to .a archives
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5 anni fa |
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nickysn
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6422e9a803
+ align files in generated .a files not by #0, but by #10 (Line Feed). This is
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5 anni fa |
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nickysn
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381be050a5
+ support creating ar files in the Z80 internal obj writer
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5 anni fa |
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nickysn
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43686720c3
+ fix for conditional JP in the Z80 internal asm writer
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5 anni fa |
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nickysn
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3e14eddaf6
+ support conditional operations in the Z80 internal asm
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5 anni fa |
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nickysn
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58d6d64fba
+ Z80 internal asm: support OT_REF_ADDR16 in taicpu.gencode.WrinteNN
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5 anni fa |
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nickysn
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4fed57adc1
+ lots of fixes to the Z80 internal asm writer
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5 anni fa |
 yury
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7dc6049de9
* Release registers which have been used for a function call before adjusting the stack pointer. On i386 this allows to use eax,ecx,edx in POP instructions for stack adjustment.
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5 anni fa |
 florian
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a4695a7015
* xtensa-embedded: fix setting of the fpu and abi
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5 anni fa |
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nickysn
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3ab5acccb1
* the parameter of WriteWord should be word, not byte :)
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5 anni fa |
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nickysn
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5193e8332c
+ also write the relocations in the .rel internal obj writer
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5 anni fa |
 pierre
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f2b924573a
Do not use inherited first_int_to_real when arm FPU_HAS_FPA is in fpu_capabilities
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5 anni fa |
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pierre
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df275152c2
Add -Wp option description for riscv32 and xtensa compiler
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5 anni fa |
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pierre
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1b5ee0d063
* Put all code adding cs_fp_emulation by default inside one big
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5 anni fa |
 michael
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a03ea37cfc
* CeateArray uses 0-based loop
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5 anni fa |
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nickysn
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0d11b5bf29
+ added method TRelRelocation.EncodeFlags that encodes the flags to string that can be included in the .rel file
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5 anni fa |
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nickysn
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03acadaf1e
+ initialize size and relflags in TRelRelocation
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5 anni fa |
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nickysn
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732f1d9df6
+ added TRelRelocationFlags
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5 anni fa |
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nickysn
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569c406116
+ introduced the TRelRelocation class
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5 anni fa |
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nickysn
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f1f819516e
+ write the section data in the .rel internal object writer (relocations aren't written, yet)
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5 anni fa |
