 florian
|
f356d8cc51
* fix RiscV32 compilation
|
il y a 10 mois |
|
florian
|
2123c59941
+ RiscV: AndiAddwi02Andi optimization
|
il y a 10 mois |
|
florian
|
7c023d33d0
* RiscV: fix AndiAndi2Andi optimization
|
il y a 10 mois |
|
florian
|
6ef37d999a
+ Risc-V: instructions of B extension
|
il y a 1 an |
|
florian
|
f1a173bdf6
* improve Risv-V optimizer
|
il y a 1 an |
|
florian
|
23dec631f5
+ Risc-V: apply OptPass1OP to more operations
|
il y a 1 an |
|
florian
|
cc2406ad74
* factor out TRVCpuAsmOptimizer.OptPass1Add
|
il y a 1 an |
|
florian
|
8708144c50
+ RiscV: AndiAndi2Andi
|
il y a 1 an |
|
florian
|
80febbd8cf
* Risc-V: use OptPass1OP more
|
il y a 1 an |
|
florian
|
a4242e60b2
+ Risc-V 32: apply OptPass1OP also on ADD
|
il y a 1 an |
|
florian
|
657e4bf838
* more use of OptPass1OP
|
il y a 1 an |
|
florian
|
9c81c4a5fa
* apply OptPass1OP to more instructions
|
il y a 1 an |
|
florian
|
1c96bf5d30
+ S*LI x,x,0 to nop optimization
|
il y a 1 an |
|
florian
|
c81f10bfbd
+ apply OptPass1OP also to SRL/SLL
|
il y a 1 an |
|
florian
|
39f7172ee8
* do no generated debug comment in assembler output of RiscV if not requested
|
il y a 1 an |
 pierre
|
c2c7982a22
Fix check that third parameter of ADDI hp1 instruction is a constant
|
il y a 4 ans |
|
florian
|
9e2bcd940a
+ RiscV: initial OpAddi02Op implementation
|
il y a 4 ans |
 Jeppe Johansen
|
02c3f328a2
- RISC-V: Share optimizations between 32 and 64-bit.
|
il y a 5 ans |
