 pierre
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c63981e5b5
Fix msdos failure due to copy/paste error in previous commit
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7 years ago |
 florian
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010a6f5016
+ shift by 8 and 16 on 8 and 16 bit cpus by simple register moves
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7 years ago |
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florian
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f0c237a159
+ let a_load_loc_reg handle also LOC_*MMREGISTER as we have loadmm_*intreg*
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7 years ago |
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florian
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9ef646e3c5
* fix avr for new GetNextReg behaviour
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7 years ago |
 nickysn
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c8b351fb67
+ added check in GetNextReg(), so it halts with an internal error, if called on
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8 years ago |
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nickysn
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db09759763
* also integrated the getnextreg() implementation for 8-bit and 16-bit alus from
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8 years ago |
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nickysn
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cf28b202eb
* integrated the getintregister() implementation for 8-bit and 16-bit alus from
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8 years ago |
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nickysn
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ddba821561
* GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved
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8 years ago |
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florian
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4d5a94644f
* do not call a_load_reg_reg with tosize=OS_NO
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8 years ago |
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florian
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99ce914a61
* fix tcg.a_load_cgparaloc_ref for ref. sizes of 7 on little endian systems
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8 years ago |
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florian
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4a54a88cca
+ implement tcg.a_load_cgparaloc_ref for un-even sizes and little endian systems as well
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8 years ago |
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florian
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43b017bde0
* tcg.a_load_cgparaloc_ref checks the size of the ref exactly to avoid overwriting of adjacent data
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8 years ago |
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florian
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bccc2f6863
+ tcg.a_loadfpu_intreg_reg, make use of it in tcg.a_load_cgparaloc_anyreg
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8 years ago |
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florian
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b1dff29cbf
* removed unused units
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8 years ago |
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nickysn
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e79f49a2b4
+ mask only the low bits that matter for the const of OP_ROL and OP_ROR in
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8 years ago |
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nickysn
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9a1812dfd9
+ optimize OP_XOR by 0 to OP_NONE in optimize_op_const
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8 years ago |
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nickysn
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9187825e3a
* fixed tnegnotassign1.pp on powerpc and other RISC cpus
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8 years ago |
 Jonas Maebe
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a25ebbba3e
+ added volatility information to all memory references
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8 years ago |
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Jonas Maebe
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aa1be3276f
- removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
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9 years ago |
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Jonas Maebe
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1cb8c0d00c
* specify the def of assembler level symbols defined via
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9 years ago |
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Jonas Maebe
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a5dba44fd3
* fixed sign extension for unaligned loads (mantis #29891, although that
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9 years ago |
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Jonas Maebe
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1320d6bdba
* correctly handle negative paraloc shift values for non power-of-2 sized
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9 years ago |
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Jonas Maebe
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3f736f6114
* handle the loading of VMT entries at the node level, so it's done in a
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10 years ago |
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florian
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d598351664
* call also optimize_op_const in the generic a_op_const_reg_reg
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10 years ago |
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Jonas Maebe
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61e4a1b811
+ added tasmlist parameter to getintparaloc() (needed for llvm)
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10 years ago |
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Jonas Maebe
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bd203a5b57
* synchronised with trunk till r30240
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10 years ago |
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Jonas Maebe
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622852b8c9
* check that a_load_cgparaloc_anyreg() is not used to try to move an fpu
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10 years ago |
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Jonas Maebe
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6d02aedf70
* support multiple register paralocs in tcgobj.a_loadfpu_ref_cgpara()
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10 years ago |
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Jonas Maebe
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67b8aceaee
* synchronized with privatetrunk till r30095
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10 years ago |
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Jonas Maebe
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2ab7f5c35d
* moved x86-specific requirements from the generic bsr/bsf code to the
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10 years ago |
