 sergei
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78e726b34f
* i386: Somewhat optimized fpc_mul_qword routine, got rid from variable 'r', registers esi and edi. Also ignore overflow checking when both operands have their high dwords equal to zero, because in such case multiplication cannot overflow.
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11 lat temu |
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sergei
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e6a9f3b15b
* Fixed spilling of 3-operand IMUL instruction (went unnoticed this far because such instructions were not emitted by compiler).
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11 lat temu |
 nickysn
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1f7b14f38e
* fixed the conversion of powerof2 mul/imuls to lea in tcgx86.a_op_const_reg_reg
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11 lat temu |
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nickysn
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cc1faad3d2
+ make use of the 3-operand form of IMUL on i386 and x86_64
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11 lat temu |
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nickysn
|
1de847c754
* fixed error in comment
|
11 lat temu |
 florian
|
7028210817
+ tzcnt assembler instruction
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11 lat temu |
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florian
|
0e67ca6419
* fixed output of test if a failure happens
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11 lat temu |
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sergei
|
3a3197ae9c
+ i386: inline 64-bit multiplications if overflow checking is disabled and not optimizing for size. Rough testing on Core 2 Duo shows speed improvement by factor of 5, even despite inlined code does not check for zero upper dwords.
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11 lat temu |
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florian
|
2a2184bc40
* regenerated makefiles affected by the last change
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11 lat temu |
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florian
|
694ba6a702
* call strip on the COMPILER macro to make the output look more nicely
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11 lat temu |
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florian
|
fd5fa95416
+ OPTNEW Makefile parameter: when running a native cycle, this allows to pass a parameter only to the new generated compiler
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11 lat temu |
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sergei
|
a3efd9e1df
+ Added method taddnode.use_generic_mul64bit, allowing it to inline full 64-bit multiplications, and fixed ARM to comply (it was not checking for possible 32x32 to 64 optimization after detecting a 64-bit operand, so recently added code for 32x32 to 64 bit optimization was inactive).
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11 lat temu |
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nickysn
|
2459518bdd
* use IMUL even for unsigned multiplication on x86_64, when overflow checking is
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11 lat temu |
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nickysn
|
5d75bf4f92
* always use IMUL instead of MUL on i386, when doing a 32->32 multiplication
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11 lat temu |
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nickysn
|
2602f379d7
* fixes in the 16 to 32-bit multiplication in ti8086addnode.second_mul
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11 lat temu |
 pierre
|
f4726e068b
Avoid assmebler size mismatch warning in Keep procedure
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11 lat temu |
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nickysn
|
3f4111ac37
* emit MUL instead of IMUL in ti8086addnode.second_mul when overflow checking is
|
11 lat temu |
|
pierre
|
76c40a49db
Add missing field enable_count in breakpoint record (added in 7.5 release)
|
11 lat temu |
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nickysn
|
529008e031
* emit MUL (when overflow checking is off), instead of IMUL for OP_IMUL in
|
11 lat temu |
|
sergei
|
6168f563c2
* x86 compares: compare references with constants directly (without loading to register) if possible, this helps to reduce register pressure.
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11 lat temu |
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nickysn
|
820b667e1b
- rm the OP_IMUL to SHL optimization from tcgx86.a_op_const_reg and tcgx86.a_op_const_ref, because it's already done in optimize_op_const, which is called in the beginning of both methods.
|
11 lat temu |
 michael
|
9535837039
* Fix recuperation of first transaction created in InternalDoConnect
|
11 lat temu |
 paul
|
1f83117f16
utils: use fpc 2.6.2 compatible code
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11 lat temu |
|
nickysn
|
767a0f1187
- rm TODO comment about the IMUL optimization with SHL from
|
11 lat temu |
|
nickysn
|
1a846e7c71
- rm TODO comment for overflow checking from tcg8086.a_op_const_reg, since
|
11 lat temu |
|
paul
|
ba00250fb4
fpmkunit: choose between .rst and .rsj
|
11 lat temu |
|
paul
|
e181fbc327
utils: clean rsj files by delp
|
11 lat temu |
|
paul
|
13a0b21031
rstconv: fixed memory leak
|
11 lat temu |
|
nickysn
|
34cf432600
* in the generic implementation of fpc_mul_int64, fallback directly to
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11 lat temu |
|
florian
|
e210d5f30e
+ cpu_capabilites for x86_64 and i386
|
11 lat temu |
