 florian
|
81fd3e2748
* more readable fix for the missing ait_instruction check
|
3 years ago |
 J. Gareth "Curious Kit" Moreton
|
27db63969a
* a64: Fix where hp1's was assumed to be an instruction and not actually checked
|
3 years ago |
|
florian
|
e8da1d081a
+ Aarch64: MovOp2AddUtxw optimization
|
3 years ago |
|
florian
|
a362c93f73
* Aarch64: operations affect always the full 64 bit register, so
|
3 years ago |
|
florian
|
fcdbb31ec4
* AArch64: TCpuAsmOptimizer.RegLoadedWithNewValue: check if p.ops=0
|
3 years ago |
 Pierre Muller
|
7778d20003
Avoid range check error in TCpuAsmOptimizer.OptPostAnd method
|
3 years ago |
|
florian
|
2e8c99947a
* define DEBUG_AOPTCPU if EXTDEBUG is used
|
3 years ago |
|
florian
|
cc5ee6b868
+ comments
|
3 years ago |
|
florian
|
39164ad732
* cleanup
|
3 years ago |
|
florian
|
c1d8e32eae
+ Aarch64: Ldr<Postfix>Mov2Ldr<Postfix> optimization
|
3 years ago |
|
florian
|
b5c7997c88
+ Aarch64: AndCmpB.E/NE2Tbnz/Tbz optimization
|
3 years ago |
|
florian
|
9526fc64cd
+ Aarch64: FMovFMov2FMov 2 optimization
|
4 years ago |
|
florian
|
5e3efa4455
* Aarch64: apply OptPass1Data to CSEL as well
|
4 years ago |
|
florian
|
964c04aded
* patch by J. Gareth Moreton, second part of #38841
|
4 years ago |
|
florian
|
d936280c6b
* (modified) patch by J. Gareth Moreton to unify ldr/str optimizations on Aarch64/ARM, part of #38841
|
4 years ago |
|
florian
|
77681333f5
* patch by J. Gareth Moreton: AArch64 OptPass1Shift register tracking fault fix, resolves #38691
|
4 years ago |
 yury
|
75491ae21c
* Removed/ifdefed the assigned and unused variables.
|
4 years ago |
|
yury
|
64c586b86d
* Removed/ifdefed lots of unused variables.
|
4 years ago |
|
florian
|
4c0dac4864
+ Aarch64: implemented FMovFMov2FMov, not yet used
|
4 years ago |
|
florian
|
ef1ba48cc4
+ Aarch64: call OptPass1FData for FMA instructions as well
|
4 years ago |
|
pierre
|
3d374727dd
Move explicit typecast to after check to avoid RTE when compiled with -CR
|
4 years ago |
|
florian
|
eec51afadd
* patch (with little modification) by J. Gareth Moreton: refactor ARM/Aarch64 peephole optimizer, first part of #37526
|
5 years ago |
|
florian
|
4de5195a9a
+ modified patch by J. Gareth Moreton: Aarch64: LDR/STR pairing optimisation, resolves #37580
|
5 years ago |
|
florian
|
f72f021da4
+ AAarch64: FMovFMov2FMov optimization
|
5 years ago |
|
florian
|
42e4d66c5e
* AArch64: enable TARMAsmOptimizer.OptPass1And
|
5 years ago |
|
florian
|
099faf2d2b
* factored out and improved TARMAsmOptimizer.RedundantMovProcess
|
5 years ago |
|
florian
|
6ccb8b83da
+ AArch64: TCpuAsmOptimizer.OptPass1Mov
|
5 years ago |
|
florian
|
2b3d7dd42c
* bail out early if possible
|
5 years ago |
|
florian
|
7125cb505c
+ AAarch64: assembler optimization Bl2B
|
5 years ago |
|
florian
|
5a07298ea5
+ AAarch64: FOpFMov2FOp assembler optimization
|
5 years ago |
