Историја ревизија

Аутор SHA1 Порука Датум
  Pierre Muller 6f3582954c Use same features for riscv32 as for arm and xtensa CPUs пре 2 година
  pierre 546a679f4e Add -SfPROCESSES for arm cpu, to be able to compile fcl-base package as for xtensa пре 5 година
  florian 702e63e59f * build more units for FreeRTOS пре 5 година
  florian 391512546e + initial FreeRTOS RTL support, largely based on the Embedded target, limited to Xtensa so far пре 5 година