 tg74
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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tg74
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31e4d4ef5e
AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512
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7 years ago |
 nickysn
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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nickysn
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5f66f5cebb
+ distinguish between x86 flags subregisters: flags, eflags and rflags
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8 years ago |
 sergei
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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11 years ago |
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nickysn
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125a6a8720
* register id of (e)flags changed, so it doesn't overlap with dr0
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12 years ago |
 florian
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283ff05127
* merged avx support in inline assembler developed by Torsten Grundke
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13 years ago |
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florian
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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florian
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87da67129c
* rtl compilation with x86_64 binary writer fixed
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19 years ago |
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florian
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588e2c38bf
* dwarf branch merged
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21 years ago |
 peter
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e487793919
* %st is st0 in nasm
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22 years ago |
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peter
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6a8d5eb25d
* NEWRA branch merged
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22 years ago |
