Historique des commits

Auteur SHA1 Message Date
  sergei e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. il y a 11 ans
  sergei c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). il y a 11 ans
  florian de4a96f96d * fixes several register allocation related mips issues il y a 13 ans
  florian 3d2a27c66c * fix fpu register type il y a 13 ans
  florian f58fcdf401 + basic mips stuff il y a 20 ans