sergei
|
4202343033
* MIPS: emit ".set nomips16" and ".set noreorder" directives for procedures declared as "assembler nostackframe", as it is done for regular procedures. Handwritten assembler routines typically utilize delay slots, and it is desirable that assembler does not mess it up.
|
11 years ago |
sergei
|
ed1555b918
* Moved generation of .ent/.end directives out of generic code generator.
|
11 years ago |
sergei
|
d7c7ee2c2a
* MIPS: fixed 8/16 bit arithmetic shifting to be done without using an additional register.
|
11 years ago |
sergei
|
0d3f36eebf
- Remove references to global variable 'cg' from methods of tcg and some of its descendants.
|
11 years ago |
nickysn
|
85dd9e5789
+ added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1)
|
11 years ago |
sergei
|
2a112ad01b
* MIPS: don't optimize reference twice for 64-bit loads and stores. Now loading/storing 64-bit value to global variable takes typically 3 instructions.
|
11 years ago |
sergei
|
e10e383b8e
* MIPS: ".set macro"/".set nomacro" directives around ".cprestore" are necessary only when offset is outside smallint range. Otherwise they just clutter the assembler file.
|
12 years ago |
sergei
|
9494fadf08
* MIPS: set pi_do_call flag for assembler procedures with stackframes, so in PIC mode it further receives pi_needs_got in PIC mode and allocates the GP save temp.
|
12 years ago |
sergei
|
f80ce76a69
+ MIPS: emulate "flags", i.e. support LOC_FLAGS location. This allows to generate differently optimized code for branching and for conversion to register, typically saving a register and instruction per compare.
|
12 years ago |
sergei
|
9a6edd0fb8
* MIPS: handle restoring GP after calls without GAS macro processing, removes ugly workaround for GAS bug.
|
12 years ago |
sergei
|
9e4cc57768
* MIPS: handle 8 and 16-bit arithmetic shifts internally, by shifting argument left by 24/16 bits, followed with 32-bit arithmetic shift right by appropriately adjusted amount.
|
12 years ago |
sergei
|
59d6df4fca
* MIPS: replaced opcode mapping functions with array, much shorter that way. Separate "overflow" mapping is also no longer needed.
|
12 years ago |
sergei
|
7a28815182
* r24895 used wrong expression for swapping sides of comparison, and it went undetected by tests. Fixed.
|
12 years ago |
sergei
|
c855868a3d
* MIPS: get rid of macros in comparison operations, use immediate operands for comparison with constants when possible.
|
12 years ago |
sergei
|
89c9cdf6c4
+ MIPS: implemented parameter location reusing, eliminating second copy of (potentially large) records passed by value. When parameter is passed both in registers and stack, let it have a single LOC_REFERENCE location on callee side, and store relevant registers on stack (into 16-byte area reserved by ABI) early in prologue.
|
12 years ago |
sergei
|
8b8553991a
+ MIPS: prevent coalescing written-to registers with $sp,$fp,$zero and $at.
|
12 years ago |
sergei
|
6a8e4f0381
* MIPS: generate real instructions, not macros, for comparisons with $zero.
|
12 years ago |
sergei
|
fb88cc4257
* TCGMIPS.a_load_reg_reg: reduce code duplication, and don't generate same register move for OS_32->OS_S32 and vice versa. Such moves explode into at least 4 instructions if register needs spilling, after which they are no longer recognized and cannot be removed by reg.allocator. So it's much better not to generate them in first place.
|
12 years ago |
sergei
|
7e0ae2e984
* MIPS: fixed cgsize2subreg to return correct result for float registers.
|
12 years ago |
sergei
|
562714129f
* MIPS: get completely rid of LI macro, generate equivalent CPU instructions instead.
|
12 years ago |
sergei
|
c31321c2fe
* TCGMIPS.handle_reg_const_reg(): fixed to generate 'real' CPU instructions, so macro processing by assembler is no longer needed.
|
12 years ago |
sergei
|
d367148f75
- Removed obsolete comments (copypasted from other CPU code, most likely).
|
12 years ago |
sergei
|
300289dd89
* MIPS: reworked 64-bit code generation, implemented overflow checking and optimized operations with constants.
|
12 years ago |
sergei
|
bfd7401541
* MIPS: overflow checking added in r24445 works only when source and destination of operation are different registers. Fixed cases of operations on same register.
|
12 years ago |
sergei
|
7cfc737866
* MIPS: rewrote 32-bit code generation methods, reducing code duplication.
|
12 years ago |
sergei
|
504b6754b7
* MIPS small improvements:
|
12 years ago |
pierre
|
702effaad0
Force use of PIC compatible calling for register variable calls as procvars might be internal or external and thus require PIC
|
12 years ago |
sergei
|
6f1997f5e5
+ MIPS: added profiling support
|
12 years ago |
sergei
|
1c652eb8f9
MIPS procinfo improvements:
|
12 years ago |
sergei
|
823e3ea398
MIPS: reworked PIC/call code:
|
12 years ago |