Commit History

Author SHA1 Message Date
  pierre b21cff6ea3 Fix m68k default target code 13 years ago
  pierre 322b793506 Try to do something for m68k integer/address registers; not working yet :!( 13 years ago
  pierre 6bc6036fd5 Set cai_align and cai_cpu 13 years ago
  pierre 963e211644 Try to add all add_move_instruction calls 13 years ago
  Jonas Maebe 20a6b7fa3d * fixed compilation after introduction of nostackframe checks 13 years ago
  pierre 0b404fea69 * more 68000 fixref changes 13 years ago
  pierre d8c2930454 Also accept R_ADDRESSREGISTER in a_load_cgparaloc_anyreg method 13 years ago
  pierre f81954760b More 68000 restrictions taken into account for fixref and TST instruction 13 years ago
  pierre b104d9c9e6 Add some missing instructions to spilling_get_operation_type method 13 years ago
  pierre d472b40149 Move conversion to address register of base reference to common code in fixref 13 years ago
  pierre 34279864ef Remove double cgutils in uses clause 13 years ago
  svenbarth 825fa86824 Added missing unit for tcpuregisterset 13 years ago
  svenbarth f7c333cee0 Enabled signal handlers 13 years ago
  svenbarth a01677e546 Removed debug line 13 years ago
  svenbarth 7bc5995d4d Implement SysCall interface for m68k-linux. This is especially useful for testing code using 13 years ago
  svenbarth ca6ca31953 The message scan_f_illegal_char seems to have gained additional parameters since it was 13 years ago
  svenbarth 2ada9a528b Fix a critical bug in the register allocator (at least for CPUs with seperate address 13 years ago
  svenbarth 75baec5985 Mark all integer registers as volatile. 13 years ago
  svenbarth d9a61f2082 * make internal error unique 13 years ago
  svenbarth ff0eebf1ff Also change RTL helper FPC_DIV_CARDINAL to FPC_DIV_DWORD 13 years ago
  svenbarth 8e07ddb2bc * made internal errors for M68K unique 13 years ago
  svenbarth 322dbe5b65 Various adjustments to the RTL for m68k: 13 years ago
  svenbarth 2db54da2b3 m68k also uses a non fixed stack with an equivalent to PUSH/POP so don't reorder parameters 13 years ago
  svenbarth 786e814d49 Use the correct frame pointer register: A6 on Unixes and A5 on everything else. The only 13 years ago
  svenbarth 43d8da7aa3 Replace DBRA instruction for Coldfire with a SUB/BRA combination in the for-loop-code- 13 years ago
  svenbarth d5523e6af6 For now completely disable (I)MUL/(I)DIV support for Coldfire and pass through the RTL routines 13 years ago
  svenbarth dea2a205c9 Fixed reference handling mostly for Coldfire CPUs. While they are conceptually based on 13 years ago
  svenbarth 63f4e44fd5 assemble.pas, texternalcompiler.makecmdline: 13 years ago
  svenbarth 72a47ea27a m68k/cgcpu.pas, tcg68k.g_proc_exit: 13 years ago
  svenbarth 81069a7eca rtl/linux/m68k/prt0.as: 13 years ago