Historique des commits

Auteur SHA1 Message Date
  nickysn c81f433795 + Z80: support conditional JR il y a 5 ans
  nickysn b164f5aa65 + support relative jumps in the Z80 internal asm writer il y a 5 ans
  nickysn 0a09359906 + support the RST instruction in the Z80 internal asm writer il y a 5 ans
  nickysn be26429159 * preserve the actual file size (before aligning it to even bytes), when adding files to .a archives il y a 5 ans
  nickysn 6422e9a803 + align files in generated .a files not by #0, but by #10 (Line Feed). This is il y a 5 ans
  nickysn 381be050a5 + support creating ar files in the Z80 internal obj writer il y a 5 ans
  nickysn 43686720c3 + fix for conditional JP in the Z80 internal asm writer il y a 5 ans
  nickysn 3e14eddaf6 + support conditional operations in the Z80 internal asm il y a 5 ans
  nickysn 58d6d64fba + Z80 internal asm: support OT_REF_ADDR16 in taicpu.gencode.WrinteNN il y a 5 ans
  nickysn 4fed57adc1 + lots of fixes to the Z80 internal asm writer il y a 5 ans
  yury 7dc6049de9 * Release registers which have been used for a function call before adjusting the stack pointer. On i386 this allows to use eax,ecx,edx in POP instructions for stack adjustment. il y a 5 ans
  florian a4695a7015 * xtensa-embedded: fix setting of the fpu and abi il y a 5 ans
  nickysn 3ab5acccb1 * the parameter of WriteWord should be word, not byte :) il y a 5 ans
  nickysn 5193e8332c + also write the relocations in the .rel internal obj writer il y a 5 ans
  pierre f2b924573a Do not use inherited first_int_to_real when arm FPU_HAS_FPA is in fpu_capabilities il y a 5 ans
  pierre df275152c2 Add -Wp option description for riscv32 and xtensa compiler il y a 5 ans
  pierre 1b5ee0d063 * Put all code adding cs_fp_emulation by default inside one big il y a 5 ans
  michael a03ea37cfc * CeateArray uses 0-based loop il y a 5 ans
  nickysn 0d11b5bf29 + added method TRelRelocation.EncodeFlags that encodes the flags to string that can be included in the .rel file il y a 5 ans
  nickysn 03acadaf1e + initialize size and relflags in TRelRelocation il y a 5 ans
  nickysn 732f1d9df6 + added TRelRelocationFlags il y a 5 ans
  nickysn 569c406116 + introduced the TRelRelocation class il y a 5 ans
  nickysn f1f819516e + write the section data in the .rel internal object writer (relocations aren't written, yet) il y a 5 ans
  florian 724676db43 * Xtensa: patch by Christo Crause: fix addmi/addi handling, resolves #37015 il y a 5 ans
  Jonas Maebe 0fbb1b259e * re-added "protected" accidentally removed in r45236, fixes JVM compilation il y a 5 ans
  michael 2073e518cc * Better uses clause for Delphi, less warnings il y a 5 ans
  nickysn ab878adfff + actually produce relocations in TRelObjData.writeReloc il y a 5 ans
  nickysn 256597be58 + Z80 internal asm: produce correct opcodes for register operands il y a 5 ans
  nickysn 90ee079cd1 + partial implementation of pass2 asm opcode generation for the Z80 internal asm writer il y a 5 ans
  nickysn 5d2be4da1c * Z80: match both signed and unsigned 16-bit constants as OT_IMM16 in the asm instab lookup il y a 5 ans