 pierre
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2a49627d48
Allow compilation of ppc386 compiler using FPC_SOFT_FPUX80, i.e. soft float 80-bit extended float
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7 years ago |
 nickysn
|
627f45abac
+ define cpucg64shiftsupport for i8086, which enables the 64-bit inline sar
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8 years ago |
 florian
|
7f286eb54e
+ define cpudelayslot: set during compiler compilation for CPUs having branch instructions with delay slot (MIPS, SPARC)
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8 years ago |
 Károly Balogh
|
0b561b6c8f
powerpc: enable SUPPORT_GET_FRAME
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8 years ago |
|
Károly Balogh
|
30176f3116
m68k: enable inlined get_frame for m68k
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8 years ago |
|
Károly Balogh
|
cf8aebf00f
m68k: enabled safecall exception wrappers with linux
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8 years ago |
|
nickysn
|
408b7a8807
+ enable the code page aware compiler messages for all unices
|
8 years ago |
|
nickysn
|
a34f531661
+ implemented support for codepage aware compiler messages. It can be enabled
|
8 years ago |
|
florian
|
8b19610509
+ sparc32 for normal sparc to be used in the compiler
|
8 years ago |
|
florian
|
188ec0f0c7
+ basics for sparc64 support, we continue to use the name "sparc" for sparc32, both sparc are identified by sparcgen (dirs, defines etc.)
|
8 years ago |
|
Károly Balogh
|
b3157aa5ea
m68k: generate MUL helpers for CPUs without 32bit MUL already in pass 1
|
8 years ago |
|
Károly Balogh
|
3e8ee48458
m68k: define cpurox and enabled the rotate-related optimizations on CPUs which support rotate instructionsoptions.pas
|
8 years ago |
|
nickysn
|
d7c8a081a1
+ enable using the cg64 ops OP_SHR/OP_SHL/OP_SAR on i386 for implementing the
|
8 years ago |
|
nickysn
|
321876252b
+ enabled the rol/ror intrinsic on i8086
|
8 years ago |
|
Károly Balogh
|
4ee4099fca
m68k: introduce a register calling convention, inspired by VBCC. volatile registers are used to pass arguments
|
8 years ago |
|
florian
|
046b148f5f
* i386 and i8086 have an index register, so define cpurefshaveindexreg
|
9 years ago |
|
pierre
|
885b0034c5
Allow use of stabs for 64-bit systems with -dUSE_STABS_64
|
9 years ago |
 Jonas Maebe
|
1c2bac7608
- removed FPC_HAS_VARSETS-related checks, FPC 2.6.4 has it
|
10 years ago |
|
Jonas Maebe
|
3f9f498e0d
- removed leftover alpha, ia64 and vis code
|
10 years ago |
|
florian
|
ba1297b1ab
+ provide also 8 and 16 bit div/mod helper
|
10 years ago |
|
Jonas Maebe
|
3ab62fc36e
* define TSymStr as ansistring for llvm, as its type definitions can be quite long
|
10 years ago |
|
Jonas Maebe
|
67b8aceaee
* synchronized with privatetrunk till r30095
|
10 years ago |
|
Jonas Maebe
|
41fba0c4f7
* switched to using the stack pointer as base register for the temp allocator
|
10 years ago |
|
Jonas Maebe
|
7949bebb8d
* synchronised with r28168 of trunk
|
11 years ago |
 sergei
|
0262514939
* m68k: Transform 32-bit div/mod nodes into helper calls during pass 1. This is consistent with the way other targets do it, and results in pretty much nicer code.
|
11 years ago |
|
Jonas Maebe
|
bacd303208
* synchronized with trunk up to r27758
|
11 years ago |
|
sergei
|
96dd464bf2
* Moved fixup_jmps to target-specific classes for powerpc,powerpc64 and MIPS, cleaned out remaining $ifdef's. A slight functionality change is that fixup_jmps is now called before adding the procedure end symbol, not after, but that should not matter.
|
11 years ago |
|
Jonas Maebe
|
e9268a0a14
* synchronised with trunk up till r26975
|
11 years ago |
 yury
|
c58340f8dd
* Enabled safecall for mips.
|
11 years ago |
|
florian
|
e210d5f30e
+ cpu_capabilites for x86_64 and i386
|
11 years ago |
