 sergei
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472310d83f
* ARM: Fixed interface wrapper generation after r28542 for targets without BX instruction.
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il y a 10 ans |
 Jeppe Johansen
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2ac11e4b82
Use proper relocation type for Thumb-2 BLX.
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il y a 10 ans |
|
Jeppe Johansen
|
6976af8365
Change .thumb_func to be an ait_directive instead of it's own tai type.
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il y a 10 ans |
|
Jeppe Johansen
|
9e5979e8be
Implemented UAL syntax support in the ARM assembler reader. Can be toggled with a field for now, but not implemented yet. Still using pre-UAL syntax for now.
|
il y a 10 ans |
 Károly Balogh
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1b0a1f4508
ARM: mimic what GNU C does while calling the profiling mcount on ARM
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il y a 11 ans |
|
Károly Balogh
|
739c66291d
ARM: first naive attempt to get gprofiling work for arm-linux. (Work-In-Progress, but at least for me it doesn't explode)
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il y a 11 ans |
 florian
|
3f71b059e5
* improve ldr*/str* handling for arm thumb
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il y a 11 ans |
|
florian
|
8a7c16327c
* fixes reference handling for arm thumb and ldrh, not perfect yet
|
il y a 11 ans |
|
florian
|
81c717fc06
+ implemented tthumbcgarm.g_external_wrapper in a way which does not destroy lr
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il y a 11 ans |
|
florian
|
dffdde7d53
* fixes reference handling for arm thumb and ldrb, not perfect yet and other ldr/str types might need similiar fixes
|
il y a 11 ans |
|
florian
|
836a6e46ca
* several issues with interface wrappers for thumb fixed
|
il y a 11 ans |
 Jonas Maebe
|
b745dcc64c
* moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because
|
il y a 11 ans |
|
sergei
|
e4fea2ebc8
* Dummy implementations of a_bit_scan_reg_reg and g_stackpointer_alloc in tcg, removes the need to override these methods in every descendant code generator solely to avoid "constructing a class with abstract method" warning.
|
il y a 11 ans |
|
Jeppe Johansen
|
a1197460e1
Constrained a number of optimizations and updated reference offsets for ARM Thumb.
|
il y a 11 ans |
 masta
|
0cb1a129b3
{ARM} Implement usage of generic division-by-const optimization
|
il y a 11 ans |
|
Károly Balogh
|
af95876eba
arm: an attempt to improve the a_op_const_ref patch in r27881
|
il y a 11 ans |
|
Károly Balogh
|
5b262df7d0
arm: have a CPU specific op_const_ref, so the reference doesn't get fixed up both in a_load_reg_ref and a_load_ref_reg
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il y a 11 ans |
|
florian
|
8dfcc2b399
* do not reuse tmp. registers in tbasecgarm.handle_load_store
|
il y a 11 ans |
|
florian
|
9464dad2b4
* handle vldr/vstr references with offsets correctly
|
il y a 11 ans |
|
florian
|
686a2d2f3f
+ Support omitting the frame pointer on arm even in procedures with incoming parameters
|
il y a 11 ans |
|
florian
|
6deb0b35b5
* handle fpu_vfpv3_d16 properly for thumb2
|
il y a 11 ans |
|
masta
|
2d2cab0e7a
Fix some internalerror codes in the ARM CG
|
il y a 11 ans |
|
sergei
|
9c1f917e3a
* a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.
|
il y a 11 ans |
|
Jeppe Johansen
|
07b2982e77
Don't do ARM FoldShiftLdrStr peephole optimization if there's an offset in the reference.
|
il y a 11 ans |
|
masta
|
0736bf4ded
Try to change typical constant AND-masking operations into shifts for ARM
|
il y a 11 ans |
 nickysn
|
85dd9e5789
+ added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1)
|
il y a 11 ans |
|
masta
|
3ab665e554
Try to split constant XORs into two shiftimms on ARM.
|
il y a 11 ans |
|
masta
|
f8889e3d6d
Use optimize_op_const in ARM cg
|
il y a 11 ans |
|
florian
|
561ec1f782
* unified internal errors
|
il y a 11 ans |
|
florian
|
4d5119bf1c
* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables
|
il y a 11 ans |
