 sergei
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f80ce76a69
+ MIPS: emulate "flags", i.e. support LOC_FLAGS location. This allows to generate differently optimized code for branching and for conversion to register, typically saving a register and instruction per compare.
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12 年之前 |
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sergei
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9a6edd0fb8
* MIPS: handle restoring GP after calls without GAS macro processing, removes ugly workaround for GAS bug.
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12 年之前 |
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sergei
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9e4cc57768
* MIPS: handle 8 and 16-bit arithmetic shifts internally, by shifting argument left by 24/16 bits, followed with 32-bit arithmetic shift right by appropriately adjusted amount.
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12 年之前 |
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sergei
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59d6df4fca
* MIPS: replaced opcode mapping functions with array, much shorter that way. Separate "overflow" mapping is also no longer needed.
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12 年之前 |
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sergei
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7a28815182
* r24895 used wrong expression for swapping sides of comparison, and it went undetected by tests. Fixed.
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12 年之前 |
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sergei
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c855868a3d
* MIPS: get rid of macros in comparison operations, use immediate operands for comparison with constants when possible.
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12 年之前 |
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sergei
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89c9cdf6c4
+ MIPS: implemented parameter location reusing, eliminating second copy of (potentially large) records passed by value. When parameter is passed both in registers and stack, let it have a single LOC_REFERENCE location on callee side, and store relevant registers on stack (into 16-byte area reserved by ABI) early in prologue.
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12 年之前 |
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sergei
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8b8553991a
+ MIPS: prevent coalescing written-to registers with $sp,$fp,$zero and $at.
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12 年之前 |
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sergei
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6a8e4f0381
* MIPS: generate real instructions, not macros, for comparisons with $zero.
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12 年之前 |
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sergei
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fb88cc4257
* TCGMIPS.a_load_reg_reg: reduce code duplication, and don't generate same register move for OS_32->OS_S32 and vice versa. Such moves explode into at least 4 instructions if register needs spilling, after which they are no longer recognized and cannot be removed by reg.allocator. So it's much better not to generate them in first place.
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12 年之前 |
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sergei
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7e0ae2e984
* MIPS: fixed cgsize2subreg to return correct result for float registers.
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12 年之前 |
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sergei
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562714129f
* MIPS: get completely rid of LI macro, generate equivalent CPU instructions instead.
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12 年之前 |
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sergei
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c31321c2fe
* TCGMIPS.handle_reg_const_reg(): fixed to generate 'real' CPU instructions, so macro processing by assembler is no longer needed.
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12 年之前 |
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sergei
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d367148f75
- Removed obsolete comments (copypasted from other CPU code, most likely).
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12 年之前 |
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sergei
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300289dd89
* MIPS: reworked 64-bit code generation, implemented overflow checking and optimized operations with constants.
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12 年之前 |
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sergei
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bfd7401541
* MIPS: overflow checking added in r24445 works only when source and destination of operation are different registers. Fixed cases of operations on same register.
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12 年之前 |
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sergei
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7cfc737866
* MIPS: rewrote 32-bit code generation methods, reducing code duplication.
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12 年之前 |
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sergei
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504b6754b7
* MIPS small improvements:
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12 年之前 |
 pierre
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702effaad0
Force use of PIC compatible calling for register variable calls as procvars might be internal or external and thus require PIC
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12 年之前 |
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sergei
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6f1997f5e5
+ MIPS: added profiling support
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12 年之前 |
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sergei
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1c652eb8f9
MIPS procinfo improvements:
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12 年之前 |
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sergei
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823e3ea398
MIPS: reworked PIC/call code:
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12 年之前 |
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sergei
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a1b50f643e
- removed never used function.
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12 年之前 |
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sergei
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d190d4676b
- MIPS: removed comment generation in function prologues, it clutters listing more than it helps. Also removed some unused variables.
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12 年之前 |
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sergei
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354ebb822a
* MIPS: fixed layout of stack frame in case procedure does only low-level calls (via a_call_name, etc.). A 16-byte outgoing parameter area must be allocated regardless of actual parameter count.
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12 年之前 |
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sergei
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69c8f6cf7d
* Typo in previous commit
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12 年之前 |
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sergei
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d7c96dea8b
* MIPS: refactoring: removed handle_load_store and handle_load_store_fpu.
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12 年之前 |
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sergei
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30247d8961
* MIPS: fixed parameter handling for big-endian targets, and removed a lot of garbage.
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12 年之前 |
|
pierre
|
2916235cfe
Fix make_simple_ref for pic address with big offsets
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12 年之前 |
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sergei
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d82387ff72
* MIPS: fixed parameter management to properly align records smaller than 32 bits on big-endian targets.
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12 年之前 |
