 michael
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dff39e9ecb
* Fix test case
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il y a 8 ans |
 nickysn
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881cb790a9
+ added tests that check side effect removal behaviour for the simplifications
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il y a 8 ans |
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nickysn
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7821d729cd
+ a very basic test for correctness for the various simplifications, implemented
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il y a 8 ans |
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nickysn
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f65f0b125a
+ optimize sar(0,x) to 0 and sar(-1,x) to -1
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il y a 8 ans |
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nickysn
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c028362f31
* added the missing pop directive after the push directive in handle_const_rox
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il y a 8 ans |
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nickysn
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855cd616f0
+ optimize rol(0, x) and ror(0, x) to 0; also optimize the case with all ones,
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il y a 8 ans |
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nickysn
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de1e0c405e
+ optimize '0 shl x' and '0 shr x' to 0
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il y a 8 ans |
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nickysn
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546e993c25
* use resultdef for the type of the resulting zero const from the '0*x' and
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il y a 8 ans |
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nickysn
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f26a844b19
* only do the '0*x' and '0 and x' optimization if x has no side effects (except
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il y a 8 ans |
 Mattias Gaertner
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142d95e0d2
pastojs: implemented SetLength(string,int)
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il y a 8 ans |
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nickysn
|
e79f49a2b4
+ mask only the low bits that matter for the const of OP_ROL and OP_ROR in
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il y a 8 ans |
|
Mattias Gaertner
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a4e26a7222
pastojs: implemented inc/dec for var/out arg
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il y a 8 ans |
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nickysn
|
f44f2f9194
* do the optimizations in r36027 at level -O3 or higher
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il y a 8 ans |
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nickysn
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6d589f415b
* do the left.equals(right) check before might_have_sideeffects, because
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il y a 8 ans |
|
nickysn
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056e742684
+ enable the internal 8-bit and 16-bit sar on i8086
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il y a 8 ans |
|
nickysn
|
29429cca3c
+ mask the shift/rotate count value in the rol/ror/sar inline nodes, before
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il y a 8 ans |
|
nickysn
|
217d39abf1
* fixed bug in r36027 (I had it fixed already, but accidentally committed the
|
il y a 8 ans |
|
nickysn
|
5aeb73b940
+ optimizations (at -O2 level) for (where 'a' is an integer expression, without
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il y a 8 ans |
|
nickysn
|
ed984e0c76
- removed missing file from project
|
il y a 8 ans |
|
nickysn
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b17d97050f
+ also simplify rol(x,0) and ror(x,0) to x
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il y a 8 ans |
|
nickysn
|
8ac84ce43a
+ simplify sar(x,0) to x
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il y a 8 ans |
|
nickysn
|
d8ec0eff8e
+ implemented inline code generation for 64-bit sar (the SarInt64 intrinsic) on
|
il y a 8 ans |
|
nickysn
|
4e4e5d6d07
+ allocate and free the flags register (when necessary), when generating code
|
il y a 8 ans |
 Károly Balogh
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a25912da0d
fcl-passrc: fixed build broken since r36006
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il y a 8 ans |
|
Károly Balogh
|
01ebb52ba8
morphos: added tf_needs_smybol_type and tf_needs_symbol_size flags. fixes generated executables to not be falsely recognized as PowerUP but native binaries
|
il y a 8 ans |
|
nickysn
|
b8c4dd9e18
+ implemented 64-bit OP_SHR,OP_SHL and OP_SAR in a_op64_reg_reg for i8086 and
|
il y a 8 ans |
|
nickysn
|
a82c89d894
+ implemented OP_SHR,OP_SHL and OP_SAR in a_op64_const_reg for i8086. The shlshr
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il y a 8 ans |
|
Mattias Gaertner
|
20cd2d9ded
pastojs: clean up
|
il y a 8 ans |
|
Mattias Gaertner
|
d7163d3854
fcl-passrc: parser: create usesclause
|
il y a 8 ans |
|
nickysn
|
d5d53e7017
* fixed operand order in the check for sse movsd in i386's
|
il y a 8 ans |
