Commit History

Autor SHA1 Mensaxe Data
  Interferon b293825a1a There is code in the register allocator to restrict register allocation to the %!s(int64=2) %!d(string=hai) anos
  Interferon b0adc3cf0c Added generic WCH32Vx RISC-V processor types using memory size suffixes %!s(int64=2) %!d(string=hai) anos
  Jeppe Johansen 2678522db5 - RISC-V: Add controller types for common RV32 MCUs. %!s(int64=5) %!d(string=hai) anos