Auteur | SHA1 Message | Date |
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a05aa25aad * Risc-V: allow also register aliases in register modification lists after asm blocks, last part to resolve #39738 | il y a 3 ans |
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ea659cbc20 * "fast lane" code and comment fixed | il y a 3 ans |
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f1b166d6b8 * zero is a valid Risc-V register alias | il y a 3 ans |
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d1fb44044f * unified RiscV32 and RiscV64 GAS readers | il y a 4 ans |
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2b78a8fd3d - Add support for .option directive in riscv assembler. | il y a 6 ans |