 florian
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9198630ce3
* fix armv7m compiler
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12 years ago |
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florian
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1eeeb309c7
* intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet
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12 years ago |
 yury
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d8902af3d6
* Do not replace ADD by SUB and vice-versa when overflow checking is enabled. Fixes tw15304 for ARM.
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12 years ago |
 Jonas Maebe
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69c29a415f
* pass the procdef to getintparaloc instead of only the proccalloption, so
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12 years ago |
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florian
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47d43750e4
* remove unused units from uses statements
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12 years ago |
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florian
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3143f0e1be
* fix by Jeppe Johansen for bitscan which was broken by the last fix for normal arm code
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12 years ago |
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florian
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1520bcc4f0
* fix bsf for armv7+
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12 years ago |
 Jeppe Johansen
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628d46f2d3
Fixed Bsf* functions on platforms that support RBIT
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13 years ago |
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Jeppe Johansen
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4e84431dde
Fix some optimizations which assume that there are 3 operands
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13 years ago |
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Jeppe Johansen
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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Jonas Maebe
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1a97e61619
* factored out fixref from handle_load_store, and handle indirect symbol
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13 years ago |
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florian
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5facc6ad5e
* BsrX(0) should return 255 instead of $ffffffff
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13 years ago |
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florian
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d67af82228
* patch by Jeppe Johansen: Thumb2-only targets don't support the BLX <label>, and have to use BL <label>, resolves #22770
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13 years ago |
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florian
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d63ebe6464
* bsr implementation for armv5+ using clz
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13 years ago |
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florian
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59012afe26
* better heuristics to decide when a mul by a constant shall be replaced by shift/add/sub sequences
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13 years ago |
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florian
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2f8027c63f
+ more sophisticated code to optimize multiplications on arm
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13 years ago |
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florian
|
45383fd32d
+ a lot missing flag allocs/deallocs added
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13 years ago |
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florian
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d8161c185c
+ track usage of flags by using a new register RS_/NR_DEFAULTFLAGS
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13 years ago |
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florian
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7588896775
* make use of cpuflags in the arm compiler
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13 years ago |
 masta
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aa21845cd9
Small optimization for OP_AND on ARM
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13 years ago |
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florian
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7513291ad8
* generate different code for OS_S8 -> OS_16 conversion which might fold better, idea by Nico Erfurth
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13 years ago |
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masta
|
6529307d9e
Don't emit useless AND/BICs in ARM CG
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13 years ago |
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florian
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f619a1aaf6
* fld/fst can have a base register+offset
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13 years ago |
|
florian
|
e81ba0f82e
+ make use of the armv6+ sign/zero extension instructions if appropriate
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13 years ago |
|
florian
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19ed835f2b
* don't generate an extra indirection when loading vfp constants
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13 years ago |
|
masta
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c16871e129
Generate better code in Tthumb2cgarm.g_flags2reg
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13 years ago |
|
masta
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57b67dfa30
Better SP adjustments on entry/exit for ARM
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13 years ago |
|
florian
|
95732625cc
* use r11 as a normal register if no frame pointer is needed
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13 years ago |
|
masta
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dbf0404fb0
More consolidation of OP_SHL/SHR/ROR/SAR in ARM CodeGen
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13 years ago |
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masta
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d2d5d17557
Consolidate handling of OP_SHL/SHR/ROL/ROR/SAR in ARM CodeGen
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13 years ago |
