Commit History

Author SHA1 Message Date
  Jeppe Johansen 0dc39b5d63 Applied patch from Michael Ring that adds some startup code for some new stm32f0 and stm32f1 controllers, and fixes naming on some LPC ARMv6m controllers. 11 years ago
  florian 686a2d2f3f + Support omitting the frame pointer on arm even in procedures with incoming parameters 11 years ago
  masta e5b3d89a5d Add CPUARM_HAS_UMULL flag 11 years ago
  florian 73e6af4864 + cpu flag CPUARM_HAS_THUMB_IDIV 11 years ago
  florian d4968e054b + arm: tsettings.instructionset 12 years ago
  florian 0e9b8adb7a patch by Michael Ring: 12 years ago
  florian b434b7bc7d * armv6-m has no blx <immediate> 12 years ago
  florian c2baf7b4c0 Merge r23058 12 years ago
  florian 086ae4b999 Merge r22905 and r22906 12 years ago
  florian 21c154d60a Merged r22903 12 years ago
  florian 1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet 12 years ago
  florian bcd48ac1a1 + patch by Justin Smyth to support the lpc1343, resolves #23844 12 years ago
  Jeppe Johansen 3ee29eb219 Fixed ARMv7-EM code generation and RTL compilation 12 years ago
  tom_at_work 312e8b8ecc Add implementations for read/write barrier code for ARM 12 years ago
  Jeppe Johansen 628d46f2d3 Fixed Bsf* functions on platforms that support RBIT 12 years ago
  Jeppe Johansen 4e84431dde Fix some optimizations which assume that there are 3 operands 12 years ago
  Jeppe Johansen 84ea70fddc Fixed some minor formating issues 12 years ago
  Jeppe Johansen 14879a9e82 Added all STM32F1 configurations 12 years ago
  Jeppe Johansen a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU 12 years ago
  Jeppe Johansen 80bb3febea Fixed assembler calling command line for cpus>ARMv5TE. EDSP instructions will generate errors while assembling, due to RTL assembler routines 13 years ago
  Jeppe Johansen 8b17a358e4 Remove all traces of the interrupt vector table generation mechanism 13 years ago
  florian d67af82228 * patch by Jeppe Johansen: Thumb2-only targets don't support the BLX <label>, and have to use BL <label>, resolves #22770 13 years ago
  florian 91156f8652 + cpuflag CPUARM_HAS_CLZ for arm 13 years ago
  florian 765fb18679 + add a description to the cpuflags where I know the exact meaning/definition 13 years ago
  florian ba6ba52e7f * instruction scheduling is pretty slow so make it a level 3 optimization for now 13 years ago
  florian 5ceeb8aaa9 * enable scheduler when compiling at least with -O2 13 years ago
  florian 354cac2bb6 + completed arm architectures 13 years ago
  florian 7588896775 * make use of cpuflags in the arm compiler 13 years ago
  florian e4f89fe524 + introduce cpuflags for arm 13 years ago
  florian 4d86d25c6c * -O4 switch for optimizations which are correct but which might have unexpected effects 13 years ago