Histórico de Commits

Autor SHA1 Mensagem Data
  Pierre Muller 6f3582954c Use same features for riscv32 as for arm and xtensa CPUs há 2 anos atrás
  pierre 546a679f4e Add -SfPROCESSES for arm cpu, to be able to compile fcl-base package as for xtensa há 5 anos atrás
  florian 702e63e59f * build more units for FreeRTOS há 5 anos atrás
  florian 391512546e + initial FreeRTOS RTL support, largely based on the Embedded target, limited to Xtensa so far há 5 anos atrás