提交历史

作者 SHA1 备注 提交日期
  sergei 06ee500352 * MIPS: improved code generation in make_simple_ref 10 年之前
  sergei ac64c4600f + MIPS: make use of instructions MUL,SEB and SEH that are available in modern cores. 11 年之前
  sergei 768e090006 - MIPS: don't create reg.allocator for MM registers. 11 年之前
  sergei d9a7d28838 + MIPS: support floating point conditions in its emulated flags, on MIPS4+ convert such flags to registers using conditional move instructions (i.e. without branching). For older cores generated code remains the same. 11 年之前
  sergei f0496001fb - MIPS: removed allocation of stack/frame pointer registers in prologue, hacks like this are no longer needed since r27104. 11 年之前
  sergei f1d1fd4f24 * Inserted explicit typecasts in order to prevent range check errors at some places where signed and unsigned types are assigned to each other (mostly MIPS-specific, but one was necessary in generic code). 11 年之前
  sergei e4fea2ebc8 * Dummy implementations of a_bit_scan_reg_reg and g_stackpointer_alloc in tcg, removes the need to override these methods in every descendant code generator solely to avoid "constructing a class with abstract method" warning. 11 年之前
  sergei cd27d64cd5 + Support (as target-independent as possible) optimization of division by constants: 11 年之前
  sergei 4202343033 * MIPS: emit ".set nomips16" and ".set noreorder" directives for procedures declared as "assembler nostackframe", as it is done for regular procedures. Handwritten assembler routines typically utilize delay slots, and it is desirable that assembler does not mess it up. 11 年之前
  sergei ed1555b918 * Moved generation of .ent/.end directives out of generic code generator. 11 年之前
  sergei d7c7ee2c2a * MIPS: fixed 8/16 bit arithmetic shifting to be done without using an additional register. 11 年之前
  sergei 0d3f36eebf - Remove references to global variable 'cg' from methods of tcg and some of its descendants. 11 年之前
  nickysn 85dd9e5789 + added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1) 11 年之前
  sergei 2a112ad01b * MIPS: don't optimize reference twice for 64-bit loads and stores. Now loading/storing 64-bit value to global variable takes typically 3 instructions. 11 年之前
  sergei e10e383b8e * MIPS: ".set macro"/".set nomacro" directives around ".cprestore" are necessary only when offset is outside smallint range. Otherwise they just clutter the assembler file. 11 年之前
  sergei 9494fadf08 * MIPS: set pi_do_call flag for assembler procedures with stackframes, so in PIC mode it further receives pi_needs_got in PIC mode and allocates the GP save temp. 12 年之前
  sergei f80ce76a69 + MIPS: emulate "flags", i.e. support LOC_FLAGS location. This allows to generate differently optimized code for branching and for conversion to register, typically saving a register and instruction per compare. 12 年之前
  sergei 9a6edd0fb8 * MIPS: handle restoring GP after calls without GAS macro processing, removes ugly workaround for GAS bug. 12 年之前
  sergei 9e4cc57768 * MIPS: handle 8 and 16-bit arithmetic shifts internally, by shifting argument left by 24/16 bits, followed with 32-bit arithmetic shift right by appropriately adjusted amount. 12 年之前
  sergei 59d6df4fca * MIPS: replaced opcode mapping functions with array, much shorter that way. Separate "overflow" mapping is also no longer needed. 12 年之前
  sergei 7a28815182 * r24895 used wrong expression for swapping sides of comparison, and it went undetected by tests. Fixed. 12 年之前
  sergei c855868a3d * MIPS: get rid of macros in comparison operations, use immediate operands for comparison with constants when possible. 12 年之前
  sergei 89c9cdf6c4 + MIPS: implemented parameter location reusing, eliminating second copy of (potentially large) records passed by value. When parameter is passed both in registers and stack, let it have a single LOC_REFERENCE location on callee side, and store relevant registers on stack (into 16-byte area reserved by ABI) early in prologue. 12 年之前
  sergei 8b8553991a + MIPS: prevent coalescing written-to registers with $sp,$fp,$zero and $at. 12 年之前
  sergei 6a8e4f0381 * MIPS: generate real instructions, not macros, for comparisons with $zero. 12 年之前
  sergei fb88cc4257 * TCGMIPS.a_load_reg_reg: reduce code duplication, and don't generate same register move for OS_32->OS_S32 and vice versa. Such moves explode into at least 4 instructions if register needs spilling, after which they are no longer recognized and cannot be removed by reg.allocator. So it's much better not to generate them in first place. 12 年之前
  sergei 7e0ae2e984 * MIPS: fixed cgsize2subreg to return correct result for float registers. 12 年之前
  sergei 562714129f * MIPS: get completely rid of LI macro, generate equivalent CPU instructions instead. 12 年之前
  sergei c31321c2fe * TCGMIPS.handle_reg_const_reg(): fixed to generate 'real' CPU instructions, so macro processing by assembler is no longer needed. 12 年之前
  sergei d367148f75 - Removed obsolete comments (copypasted from other CPU code, most likely). 12 年之前