Commit Verlauf

Autor SHA1 Nachricht Datum
  sergei dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. vor 11 Jahren
  florian 842e027a9f + prove of concept how FMA4 could be supported in inline assembler vor 11 Jahren
  florian a79be2b05c + support for FMA instructions in inline assembler vor 11 Jahren
  florian aa107b914c * merged avx2 branch, developed by Torsten Grundke vor 11 Jahren
  florian 13cb468a8e * fixed modification information for some avx instructions vor 11 Jahren
  florian be0a29da95 * fix modification information for bmi instructions vor 11 Jahren
  Jonas Maebe a1eb9a0f99 * fixed spilling of CMOVcc instruction: it "reads" operand two (in the sense vor 11 Jahren
  florian 8989a40b4f * more flags to mark changes fixed vor 11 Jahren
  florian 2ec5a649d7 * set Ch_* for more operations vor 11 Jahren
  florian 7028210817 + tzcnt assembler instruction vor 11 Jahren
  nickysn f6e846c574 + added the NEC V20/V30 instructions vor 12 Jahren
  nickysn 4929bc5694 * regenerated the i8086 ins files vor 12 Jahren
  nickysn 107a6f6552 * i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc vor 12 Jahren