daopt386.pas 95 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,OS_NO);
  48. {********************************* Types *********************************}
  49. type
  50. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  51. TRegSet = Set of RS_EAX..RS_ESP;
  52. toptreginfo = Record
  53. NewRegsEncountered, OldRegsEncountered: TRegSet;
  54. RegsLoadedForRef: TRegSet;
  55. lastReload: array[RS_EAX..RS_ESP] of tai;
  56. New2OldReg: TRegArray;
  57. end;
  58. {possible actions on an operand: read, write or modify (= read & write)}
  59. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  60. {the possible states of a flag}
  61. TFlagContents = (F_Unknown, F_notSet, F_Set);
  62. TContent = Packed Record
  63. {start and end of block instructions that defines the
  64. content of this register.}
  65. StartMod: tai;
  66. MemWrite: taicpu;
  67. {how many instructions starting with StarMod does the block consist of}
  68. NrOfMods: Word;
  69. {the type of the content of the register: unknown, memory, constant}
  70. Typ: Byte;
  71. case byte of
  72. {starts at 0, gets increased everytime the register is written to}
  73. 1: (WState: Byte;
  74. {starts at 0, gets increased everytime the register is read from}
  75. RState: Byte);
  76. { to compare both states in one operation }
  77. 2: (state: word);
  78. end;
  79. {Contents of the integer registers}
  80. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  81. {contents of the FPU registers}
  82. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  83. {$ifdef tempOpts}
  84. { linked list which allows searching/deleting based on value, no extra frills}
  85. PSearchLinkedListItem = ^TSearchLinkedListItem;
  86. TSearchLinkedListItem = object(TLinkedList_Item)
  87. constructor init;
  88. function equals(p: PSearchLinkedListItem): boolean; virtual;
  89. end;
  90. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  91. TSearchDoubleIntItem = object(TLinkedList_Item)
  92. constructor init(_int1,_int2: longint);
  93. function equals(p: PSearchLinkedListItem): boolean; virtual;
  94. private
  95. int1, int2: longint;
  96. end;
  97. PSearchLinkedList = ^TSearchLinkedList;
  98. TSearchLinkedList = object(TLinkedList)
  99. function searchByValue(p: PSearchLinkedListItem): boolean;
  100. procedure removeByValue(p: PSearchLinkedListItem);
  101. end;
  102. {$endif tempOpts}
  103. {information record with the contents of every register. Every tai object
  104. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  105. TtaiProp = Record
  106. Regs: TRegContent;
  107. { FPURegs: TRegFPUContent;} {currently not yet used}
  108. { allocated Registers }
  109. UsedRegs: TRegSet;
  110. { status of the direction flag }
  111. DirFlag: TFlagContents;
  112. {$ifdef tempOpts}
  113. { currently used temps }
  114. tempAllocs: PSearchLinkedList;
  115. {$endif tempOpts}
  116. { can this instruction be removed? }
  117. CanBeRemoved: Boolean;
  118. { are the resultflags set by this instruction used? }
  119. FlagsUsed: Boolean;
  120. end;
  121. ptaiprop = ^TtaiProp;
  122. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  123. PtaiPropBlock = ^TtaiPropBlock;
  124. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  125. TLabelTableItem = Record
  126. taiObj: tai;
  127. {$ifDef JumpAnal}
  128. InstrNr: Longint;
  129. RefsFound: Word;
  130. JmpsProcessed: Word
  131. {$endif JumpAnal}
  132. end;
  133. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  134. PLabelTable = ^TLabelTable;
  135. {*********************** procedures and functions ************************}
  136. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  137. function RefsEqual(const R1, R2: TReference): Boolean;
  138. function isgp32reg(supreg: tsuperregister): Boolean;
  139. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  140. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  141. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  142. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function reginop(supreg: tsuperregister; const o:toper): boolean;
  144. function instrWritesFlags(p: tai): boolean;
  145. function instrReadsFlags(p: tai): boolean;
  146. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  147. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  148. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  149. const c: tcontent): boolean;
  150. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  151. const c: tcontent; var memwritedestroyed: boolean): boolean;
  152. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  153. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  154. procedure SkipHead(var p: tai);
  155. function labelCanBeSkipped(p: tai_label): boolean;
  156. procedure RemoveLastDeallocForFuncRes(asmL: TAAsmOutput; p: tai);
  157. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  158. hp: tai): boolean;
  159. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  160. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  161. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  162. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  163. function sizescompatible(loadsize,newsize: topsize): boolean;
  164. function OpsEqual(const o1,o2:toper): Boolean;
  165. type
  166. tdfaobj = class
  167. constructor create(_list: taasmoutput); virtual;
  168. function pass_1(_blockstart: tai): tai;
  169. function pass_2: boolean;
  170. procedure clear;
  171. function getlabelwithsym(sym: tasmlabel): tai;
  172. private
  173. { Walks through the list to find the lowest and highest label number, inits the }
  174. { labeltable and fixes/optimizes some regallocs }
  175. procedure initlabeltable;
  176. function initdfapass2: boolean;
  177. procedure dodfapass2;
  178. { asm list we're working on }
  179. list: taasmoutput;
  180. { current part of the asm list }
  181. blockstart, blockend: tai;
  182. { the amount of taiObjects in the current part of the assembler list }
  183. nroftaiobjs: longint;
  184. { Array which holds all TtaiProps }
  185. taipropblock: ptaipropblock;
  186. { all labels in the current block: their value mapped to their location }
  187. lolab, hilab, labdif: longint;
  188. labeltable: plabeltable;
  189. end;
  190. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  191. procedure incState(var S: Byte; amount: longint);
  192. {******************************* Variables *******************************}
  193. var
  194. dfa: tdfaobj;
  195. {*********************** end of Interface section ************************}
  196. Implementation
  197. Uses
  198. {$ifdef csdebug}
  199. cutils,
  200. {$else}
  201. {$ifdef statedebug}
  202. cutils,
  203. {$else}
  204. {$ifdef allocregdebug}
  205. cutils,
  206. {$endif}
  207. {$endif}
  208. {$endif}
  209. globals, systems, verbose, symconst, cgobj,procinfo;
  210. Type
  211. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  212. var
  213. {How many instructions are between the current instruction and the last one
  214. that modified the register}
  215. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  216. {$ifdef tempOpts}
  217. constructor TSearchLinkedListItem.init;
  218. begin
  219. end;
  220. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  221. begin
  222. equals := false;
  223. end;
  224. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  225. begin
  226. int1 := _int1;
  227. int2 := _int2;
  228. end;
  229. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  230. begin
  231. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  232. (TSearchDoubleIntItem(p).int2 = int2);
  233. end;
  234. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  235. var temp: PSearchLinkedListItem;
  236. begin
  237. temp := first;
  238. while (temp <> last.next) and
  239. not(temp.equals(p)) do
  240. temp := temp.next;
  241. searchByValue := temp <> last.next;
  242. end;
  243. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  244. begin
  245. temp := first;
  246. while (temp <> last.next) and
  247. not(temp.equals(p)) do
  248. temp := temp.next;
  249. if temp <> last.next then
  250. begin
  251. remove(temp);
  252. dispose(temp,done);
  253. end;
  254. end;
  255. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  256. {updates UsedRegs with the RegAlloc Information coming after p}
  257. begin
  258. repeat
  259. while assigned(p) and
  260. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  261. ((p.typ = ait_label) and
  262. labelCanBeSkipped(tai_label(current)))) Do
  263. p := tai(p.next);
  264. while assigned(p) and
  265. (p.typ=ait_RegAlloc) Do
  266. begin
  267. case tai_regalloc(p).ratype of
  268. ra_alloc :
  269. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  270. ra_dealloc :
  271. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  272. end;
  273. p := tai(p.next);
  274. end;
  275. until not(assigned(p)) or
  276. (not(p.typ in SkipInstr) and
  277. not((p.typ = ait_label) and
  278. labelCanBeSkipped(tai_label(current))));
  279. end;
  280. {$endif tempOpts}
  281. {************************ Create the Label table ************************}
  282. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  283. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  284. { starting with Starttai and ending with the next "real" instruction }
  285. begin
  286. findregalloc := false;
  287. repeat
  288. while assigned(starttai) and
  289. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  290. ((starttai.typ = ait_label) and
  291. labelcanbeskipped(tai_label(starttai)))) do
  292. starttai := tai(starttai.next);
  293. if assigned(starttai) and
  294. (starttai.typ = ait_regalloc) then
  295. begin
  296. if (tai_regalloc(Starttai).ratype = ratyp) and
  297. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  298. begin
  299. findregalloc:=true;
  300. break;
  301. end;
  302. starttai := tai(starttai.next);
  303. end
  304. else
  305. break;
  306. until false;
  307. end;
  308. procedure RemoveLastDeallocForFuncRes(asml: taasmoutput; p: tai);
  309. procedure DoRemoveLastDeallocForFuncRes(asml: taasmoutput; supreg: tsuperregister);
  310. var
  311. hp2: tai;
  312. begin
  313. hp2 := p;
  314. repeat
  315. hp2 := tai(hp2.previous);
  316. if assigned(hp2) and
  317. (hp2.typ = ait_regalloc) and
  318. (tai_regalloc(hp2).ratype=ra_dealloc) and
  319. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  320. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  321. begin
  322. asml.remove(hp2);
  323. hp2.free;
  324. break;
  325. end;
  326. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  327. end;
  328. begin
  329. case current_procinfo.procdef.rettype.def.deftype of
  330. arraydef,recorddef,pointerdef,
  331. stringdef,enumdef,procdef,objectdef,errordef,
  332. filedef,setdef,procvardef,
  333. classrefdef,forwarddef:
  334. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  335. orddef:
  336. if current_procinfo.procdef.rettype.def.size <> 0 then
  337. begin
  338. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  339. { for int64/qword }
  340. if current_procinfo.procdef.rettype.def.size = 8 then
  341. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  342. end;
  343. end;
  344. end;
  345. procedure getNoDeallocRegs(var regs: tregset);
  346. var
  347. regCounter: TSuperRegister;
  348. begin
  349. regs := [];
  350. case current_procinfo.procdef.rettype.def.deftype of
  351. arraydef,recorddef,pointerdef,
  352. stringdef,enumdef,procdef,objectdef,errordef,
  353. filedef,setdef,procvardef,
  354. classrefdef,forwarddef:
  355. regs := [RS_EAX];
  356. orddef:
  357. if current_procinfo.procdef.rettype.def.size <> 0 then
  358. begin
  359. regs := [RS_EAX];
  360. { for int64/qword }
  361. if current_procinfo.procdef.rettype.def.size = 8 then
  362. regs := regs + [RS_EDX];
  363. end;
  364. end;
  365. for regCounter := RS_EAX to RS_EBX do
  366. { if not(regCounter in rg.usableregsint) then}
  367. include(regs,regcounter);
  368. end;
  369. procedure AddRegDeallocFor(asml: taasmoutput; reg: tregister; p: tai);
  370. var
  371. hp1: tai;
  372. funcResRegs: tregset;
  373. funcResReg: boolean;
  374. begin
  375. { if not(supreg in rg.usableregsint) then
  376. exit;}
  377. { if not(supreg in [RS_EDI]) then
  378. exit;}
  379. getNoDeallocRegs(funcresregs);
  380. { funcResRegs := funcResRegs - rg.usableregsint;}
  381. { funcResRegs := funcResRegs - [RS_EDI];}
  382. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  383. funcResReg := getsupreg(reg) in funcresregs;
  384. hp1 := p;
  385. {
  386. while not(funcResReg and
  387. (p.typ = ait_instruction) and
  388. (taicpu(p).opcode = A_JMP) and
  389. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  390. getLastInstruction(p, p) and
  391. not(regInInstruction(supreg, p)) do
  392. hp1 := p;
  393. }
  394. { don't insert a dealloc for registers which contain the function result }
  395. { if they are followed by a jump to the exit label (for exit(...)) }
  396. { if not(funcResReg) or
  397. not((hp1.typ = ait_instruction) and
  398. (taicpu(hp1).opcode = A_JMP) and
  399. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  400. begin
  401. p := tai_regalloc.deAlloc(reg,nil);
  402. insertLLItem(AsmL, hp1.previous, hp1, p);
  403. end;
  404. end;
  405. {************************ Search the Label table ************************}
  406. function findlabel(l: tasmlabel; var hp: tai): boolean;
  407. {searches for the specified label starting from hp as long as the
  408. encountered instructions are labels, to be able to optimize constructs like
  409. jne l2 jmp l2
  410. jmp l3 and l1:
  411. l1: l2:
  412. l2:}
  413. var
  414. p: tai;
  415. begin
  416. p := hp;
  417. while assigned(p) and
  418. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  419. if (p.typ <> ait_Label) or
  420. (tai_label(p).l <> l) then
  421. GetNextInstruction(p, p)
  422. else
  423. begin
  424. hp := p;
  425. findlabel := true;
  426. exit
  427. end;
  428. findlabel := false;
  429. end;
  430. {************************ Some general functions ************************}
  431. function tch2reg(ch: tinschange): tsuperregister;
  432. {converts a TChange variable to a TRegister}
  433. const
  434. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  435. begin
  436. if (ch <= CH_REDI) then
  437. tch2reg := ch2reg[ch]
  438. else if (ch <= CH_WEDI) then
  439. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  440. else if (ch <= CH_RWEDI) then
  441. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  442. else if (ch <= CH_MEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  444. else
  445. InternalError($db)
  446. end;
  447. { inserts new_one between prev and foll }
  448. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  449. begin
  450. if assigned(prev) then
  451. if assigned(foll) then
  452. begin
  453. if assigned(new_one) then
  454. begin
  455. new_one.previous := prev;
  456. new_one.next := foll;
  457. prev.next := new_one;
  458. foll.previous := new_one;
  459. { shgould we update line information }
  460. if (not (tai(new_one).typ in SkipLineInfo)) and
  461. (not (tai(foll).typ in SkipLineInfo)) then
  462. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  463. end;
  464. end
  465. else
  466. asml.Concat(new_one)
  467. else
  468. if assigned(foll) then
  469. asml.Insert(new_one)
  470. end;
  471. {********************* Compare parts of tai objects *********************}
  472. function regssamesize(reg1, reg2: tregister): boolean;
  473. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  474. 8bit, 16bit or 32bit)}
  475. begin
  476. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  477. internalerror(2003111602);
  478. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  479. end;
  480. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  481. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  482. OldReg and NewReg have the same size (has to be chcked in advance with
  483. RegsSameSize) and that neither equals RS_INVALID}
  484. var
  485. newsupreg, oldsupreg: tsuperregister;
  486. begin
  487. if (newreg = NR_NO) or (oldreg = NR_NO) then
  488. internalerror(2003111601);
  489. newsupreg := getsupreg(newreg);
  490. oldsupreg := getsupreg(oldreg);
  491. with RegInfo Do
  492. begin
  493. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  494. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  495. New2OldReg[newsupreg] := oldsupreg;
  496. end;
  497. end;
  498. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  499. begin
  500. case o.typ Of
  501. top_reg:
  502. if (o.reg <> NR_NO) then
  503. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  504. top_ref:
  505. begin
  506. if o.ref^.base <> NR_NO then
  507. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  508. if o.ref^.index <> NR_NO then
  509. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  510. end;
  511. end;
  512. end;
  513. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  514. begin
  515. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  516. if RegsSameSize(oldreg, newreg) then
  517. with reginfo do
  518. {here we always check for the 32 bit component, because it is possible that
  519. the 8 bit component has not been set, event though NewReg already has been
  520. processed. This happens if it has been compared with a register that doesn't
  521. have an 8 bit component (such as EDI). in that case the 8 bit component is
  522. still set to RS_NO and the comparison in the else-part will fail}
  523. if (getsupreg(oldReg) in OldRegsEncountered) then
  524. if (getsupreg(NewReg) in NewRegsEncountered) then
  525. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  526. { if we haven't encountered the new register yet, but we have encountered the
  527. old one already, the new one can only be correct if it's being written to
  528. (and consequently the old one is also being written to), otherwise
  529. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  530. movl (%eax), %eax movl (%edx), %edx
  531. are considered equivalent}
  532. else
  533. if (opact = opact_write) then
  534. begin
  535. AddReg2RegInfo(oldreg, newreg, reginfo);
  536. RegsEquivalent := true
  537. end
  538. else
  539. Regsequivalent := false
  540. else
  541. if not(getsupreg(newreg) in NewRegsEncountered) and
  542. ((opact = opact_write) or
  543. ((newreg = oldreg) and
  544. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  545. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  546. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  547. begin
  548. AddReg2RegInfo(oldreg, newreg, reginfo);
  549. RegsEquivalent := true
  550. end
  551. else
  552. RegsEquivalent := false
  553. else
  554. RegsEquivalent := false
  555. else
  556. RegsEquivalent := oldreg = newreg
  557. end;
  558. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  559. begin
  560. RefsEquivalent :=
  561. (r1.offset = r2.offset) and
  562. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  563. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  564. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  565. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  566. (r1.relsymbol = r2.relsymbol);
  567. end;
  568. function refsequal(const r1, r2: treference): boolean;
  569. begin
  570. refsequal :=
  571. (r1.offset = r2.offset) and
  572. (r1.segment = r2.segment) and (r1.base = r2.base) and
  573. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  574. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  575. (r1.relsymbol = r2.relsymbol);
  576. end;
  577. {$ifdef q+}
  578. {$q-}
  579. {$define overflowon}
  580. {$endif q+}
  581. // checks whether a write to r2 of size "size" contains address r1
  582. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  583. var
  584. realsize1, realsize2: aint;
  585. begin
  586. realsize1 := tcgsize2size[size1];
  587. realsize2 := tcgsize2size[size2];
  588. refsoverlapping :=
  589. (r2.offset <= r1.offset+realsize1) and
  590. (r1.offset <= r2.offset+realsize2) and
  591. (r1.segment = r2.segment) and (r1.base = r2.base) and
  592. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  593. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  594. (r1.relsymbol = r2.relsymbol);
  595. end;
  596. {$ifdef overflowon}
  597. {$q+}
  598. {$undef overflowon}
  599. {$endif overflowon}
  600. function isgp32reg(supreg: tsuperregister): boolean;
  601. {Checks if the register is a 32 bit general purpose register}
  602. begin
  603. isgp32reg := false;
  604. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  605. isgp32reg := true
  606. end;
  607. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  608. begin {checks whether ref contains a reference to reg}
  609. reginref :=
  610. ((ref.base <> NR_NO) and
  611. (getsupreg(ref.base) = supreg)) or
  612. ((ref.index <> NR_NO) and
  613. (getsupreg(ref.index) = supreg))
  614. end;
  615. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  616. var
  617. p: taicpu;
  618. opcount: longint;
  619. begin
  620. RegReadByInstruction := false;
  621. if hp.typ <> ait_instruction then
  622. exit;
  623. p := taicpu(hp);
  624. case p.opcode of
  625. A_CALL:
  626. regreadbyinstruction := true;
  627. A_IMUL:
  628. case p.ops of
  629. 1:
  630. regReadByInstruction :=
  631. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  632. 2,3:
  633. regReadByInstruction :=
  634. reginop(supreg,p.oper[0]^) or
  635. reginop(supreg,p.oper[1]^);
  636. end;
  637. A_IDIV,A_DIV,A_MUL:
  638. begin
  639. regReadByInstruction :=
  640. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  641. end;
  642. else
  643. begin
  644. for opcount := 0 to p.ops-1 do
  645. if (p.oper[opCount]^.typ = top_ref) and
  646. reginref(supreg,p.oper[opcount]^.ref^) then
  647. begin
  648. RegReadByInstruction := true;
  649. exit
  650. end;
  651. for opcount := 1 to maxinschanges do
  652. case insprop[p.opcode].ch[opcount] of
  653. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  654. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  655. begin
  656. RegReadByInstruction := true;
  657. exit
  658. end;
  659. CH_RWOP1,CH_ROP1,CH_MOP1:
  660. if //(p.oper[0]^.typ = top_reg) and
  661. reginop(supreg,p.oper[0]^) then
  662. begin
  663. RegReadByInstruction := true;
  664. exit
  665. end;
  666. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  667. if //(p.oper[1]^.typ = top_reg) and
  668. reginop(supreg,p.oper[1]^) then
  669. begin
  670. RegReadByInstruction := true;
  671. exit
  672. end;
  673. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  674. if //(p.oper[2]^.typ = top_reg) and
  675. reginop(supreg,p.oper[2]^) then
  676. begin
  677. RegReadByInstruction := true;
  678. exit
  679. end;
  680. end;
  681. end;
  682. end;
  683. end;
  684. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  685. { Checks if reg is used by the instruction p1 }
  686. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  687. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  688. var
  689. p: taicpu;
  690. opcount: longint;
  691. begin
  692. regInInstruction := false;
  693. if p1.typ <> ait_instruction then
  694. exit;
  695. p := taicpu(p1);
  696. case p.opcode of
  697. A_CALL:
  698. regininstruction := true;
  699. A_IMUL:
  700. case p.ops of
  701. 1:
  702. regInInstruction :=
  703. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  704. 2,3:
  705. regInInstruction :=
  706. reginop(supreg,p.oper[0]^) or
  707. reginop(supreg,p.oper[1]^) or
  708. (assigned(p.oper[2]) and
  709. reginop(supreg,p.oper[2]^));
  710. end;
  711. A_IDIV,A_DIV,A_MUL:
  712. regInInstruction :=
  713. reginop(supreg,p.oper[0]^) or
  714. (supreg in [RS_EAX,RS_EDX])
  715. else
  716. begin
  717. for opcount := 1 to maxinschanges do
  718. case insprop[p.opcode].Ch[opCount] of
  719. CH_REAX..CH_MEDI:
  720. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  721. begin
  722. regInInstruction := true;
  723. exit;
  724. end;
  725. CH_ROp1..CH_MOp1:
  726. if reginop(supreg,p.oper[0]^) then
  727. begin
  728. regInInstruction := true;
  729. exit
  730. end;
  731. Ch_ROp2..Ch_MOp2:
  732. if reginop(supreg,p.oper[1]^) then
  733. begin
  734. regInInstruction := true;
  735. exit
  736. end;
  737. Ch_ROp3..Ch_MOp3:
  738. if reginop(supreg,p.oper[2]^) then
  739. begin
  740. regInInstruction := true;
  741. exit
  742. end;
  743. end;
  744. end;
  745. end;
  746. end;
  747. function reginop(supreg: tsuperregister; const o:toper): boolean;
  748. begin
  749. reginop := false;
  750. case o.typ Of
  751. top_reg:
  752. reginop :=
  753. (getregtype(o.reg) = R_INTREGISTER) and
  754. (supreg = getsupreg(o.reg));
  755. top_ref:
  756. reginop :=
  757. ((o.ref^.base <> NR_NO) and
  758. (supreg = getsupreg(o.ref^.base))) or
  759. ((o.ref^.index <> NR_NO) and
  760. (supreg = getsupreg(o.ref^.index)));
  761. end;
  762. end;
  763. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  764. var
  765. InstrProp: TInsProp;
  766. TmpResult: Boolean;
  767. Cnt: Word;
  768. begin
  769. TmpResult := False;
  770. if supreg = RS_INVALID then
  771. exit;
  772. if (p1.typ = ait_instruction) then
  773. case taicpu(p1).opcode of
  774. A_IMUL:
  775. With taicpu(p1) Do
  776. TmpResult :=
  777. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  778. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  779. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  780. A_DIV, A_IDIV, A_MUL:
  781. With taicpu(p1) Do
  782. TmpResult :=
  783. (supreg in [RS_EAX,RS_EDX]);
  784. else
  785. begin
  786. Cnt := 1;
  787. InstrProp := InsProp[taicpu(p1).OpCode];
  788. while (Cnt <= maxinschanges) and
  789. (InstrProp.Ch[Cnt] <> Ch_None) and
  790. not(TmpResult) Do
  791. begin
  792. case InstrProp.Ch[Cnt] Of
  793. Ch_WEAX..Ch_MEDI:
  794. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  795. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  796. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  797. reginop(supreg,taicpu(p1).oper[0]^);
  798. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  799. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  800. reginop(supreg,taicpu(p1).oper[1]^);
  801. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  802. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  803. reginop(supreg,taicpu(p1).oper[2]^);
  804. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  805. Ch_ALL: TmpResult := true;
  806. end;
  807. inc(Cnt)
  808. end
  809. end
  810. end;
  811. RegModifiedByInstruction := TmpResult
  812. end;
  813. function instrWritesFlags(p: tai): boolean;
  814. var
  815. l: longint;
  816. begin
  817. instrWritesFlags := true;
  818. case p.typ of
  819. ait_instruction:
  820. begin
  821. for l := 1 to maxinschanges do
  822. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  823. exit;
  824. end;
  825. ait_label:
  826. exit;
  827. end;
  828. instrWritesFlags := false;
  829. end;
  830. function instrReadsFlags(p: tai): boolean;
  831. var
  832. l: longint;
  833. begin
  834. instrReadsFlags := true;
  835. case p.typ of
  836. ait_instruction:
  837. begin
  838. for l := 1 to maxinschanges do
  839. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  840. exit;
  841. end;
  842. ait_label:
  843. exit;
  844. end;
  845. instrReadsFlags := false;
  846. end;
  847. {********************* GetNext and GetLastInstruction *********************}
  848. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  849. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  850. { next tai object in Next. Returns false if there isn't any }
  851. begin
  852. repeat
  853. if (Current.typ = ait_marker) and
  854. (tai_Marker(current).Kind = AsmBlockStart) then
  855. begin
  856. GetNextInstruction := False;
  857. Next := Nil;
  858. Exit
  859. end;
  860. Current := tai(current.Next);
  861. while assigned(Current) and
  862. ((current.typ in skipInstr) or
  863. ((current.typ = ait_label) and
  864. labelCanBeSkipped(tai_label(current)))) do
  865. Current := tai(current.Next);
  866. { if assigned(Current) and
  867. (current.typ = ait_Marker) and
  868. (tai_Marker(current).Kind = NoPropInfoStart) then
  869. begin
  870. while assigned(Current) and
  871. ((current.typ <> ait_Marker) or
  872. (tai_Marker(current).Kind <> NoPropInfoend)) Do
  873. Current := tai(current.Next);
  874. end;}
  875. until not(assigned(Current)) or
  876. (current.typ <> ait_Marker) or
  877. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  878. Next := Current;
  879. if assigned(Current) and
  880. not((current.typ in SkipInstr) or
  881. ((current.typ = ait_label) and
  882. labelCanBeSkipped(tai_label(current))))
  883. then
  884. GetNextInstruction :=
  885. not((current.typ = ait_marker) and
  886. (tai_marker(current).kind = asmBlockStart))
  887. else
  888. begin
  889. GetNextInstruction := False;
  890. Next := nil;
  891. end;
  892. end;
  893. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  894. {skips the ait-types in SkipInstr puts the previous tai object in
  895. Last. Returns false if there isn't any}
  896. begin
  897. repeat
  898. Current := tai(current.previous);
  899. while assigned(Current) and
  900. (((current.typ = ait_Marker) and
  901. not(tai_Marker(current).Kind in [AsmBlockend{,NoPropInfoend}])) or
  902. (current.typ in SkipInstr) or
  903. ((current.typ = ait_label) and
  904. labelCanBeSkipped(tai_label(current)))) Do
  905. Current := tai(current.previous);
  906. { if assigned(Current) and
  907. (current.typ = ait_Marker) and
  908. (tai_Marker(current).Kind = NoPropInfoend) then
  909. begin
  910. while assigned(Current) and
  911. ((current.typ <> ait_Marker) or
  912. (tai_Marker(current).Kind <> NoPropInfoStart)) Do
  913. Current := tai(current.previous);
  914. end;}
  915. until not(assigned(Current)) or
  916. (current.typ <> ait_Marker) or
  917. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  918. if not(assigned(Current)) or
  919. (current.typ in SkipInstr) or
  920. ((current.typ = ait_label) and
  921. labelCanBeSkipped(tai_label(current))) or
  922. ((current.typ = ait_Marker) and
  923. (tai_Marker(current).Kind = AsmBlockend))
  924. then
  925. begin
  926. Last := nil;
  927. GetLastInstruction := False
  928. end
  929. else
  930. begin
  931. Last := Current;
  932. GetLastInstruction := True;
  933. end;
  934. end;
  935. procedure SkipHead(var p: tai);
  936. var
  937. oldp: tai;
  938. begin
  939. repeat
  940. oldp := p;
  941. if (p.typ in SkipInstr) or
  942. ((p.typ = ait_marker) and
  943. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend])) then
  944. GetNextInstruction(p,p)
  945. else if ((p.Typ = Ait_Marker) and
  946. (tai_Marker(p).Kind = nopropinfostart)) then
  947. {a marker of the NoPropInfoStart can't be the first instruction of a
  948. TAAsmoutput list}
  949. GetNextInstruction(tai(p.previous),p);
  950. until p = oldp
  951. end;
  952. function labelCanBeSkipped(p: tai_label): boolean;
  953. begin
  954. labelCanBeSkipped := not(p.l.is_used) or p.l.is_addr;
  955. end;
  956. {******************* The Data Flow Analyzer functions ********************}
  957. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  958. hp: tai): boolean;
  959. { assumes reg is a 32bit register }
  960. var
  961. p: taicpu;
  962. begin
  963. if not assigned(hp) or
  964. (hp.typ <> ait_instruction) then
  965. begin
  966. regLoadedWithNewValue := false;
  967. exit;
  968. end;
  969. p := taicpu(hp);
  970. regLoadedWithNewValue :=
  971. (((p.opcode = A_MOV) or
  972. (p.opcode = A_MOVZX) or
  973. (p.opcode = A_MOVSX) or
  974. (p.opcode = A_LEA)) and
  975. (p.oper[1]^.typ = top_reg) and
  976. (getsupreg(p.oper[1]^.reg) = supreg) and
  977. (canDependOnPrevValue or
  978. (p.oper[0]^.typ <> top_ref) or
  979. not regInRef(supreg,p.oper[0]^.ref^)) or
  980. ((p.opcode = A_POP) and
  981. (getsupreg(p.oper[0]^.reg) = supreg)));
  982. end;
  983. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  984. {updates UsedRegs with the RegAlloc Information coming after p}
  985. begin
  986. repeat
  987. while assigned(p) and
  988. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  989. ((p.typ = ait_label) and
  990. labelCanBeSkipped(tai_label(p))) or
  991. ((p.typ = ait_marker) and
  992. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend]))) do
  993. p := tai(p.next);
  994. while assigned(p) and
  995. (p.typ=ait_RegAlloc) Do
  996. begin
  997. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  998. begin
  999. case tai_regalloc(p).ratype of
  1000. ra_alloc :
  1001. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1002. ra_dealloc :
  1003. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1004. end;
  1005. end;
  1006. p := tai(p.next);
  1007. end;
  1008. until not(assigned(p)) or
  1009. (not(p.typ in SkipInstr) and
  1010. not((p.typ = ait_label) and
  1011. labelCanBeSkipped(tai_label(p))));
  1012. end;
  1013. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1014. { allocates register reg between (and including) instructions p1 and p2 }
  1015. { the type of p1 and p2 must not be in SkipInstr }
  1016. { note that this routine is both called from the peephole optimizer }
  1017. { where optinfo is not yet initialised) and from the cse (where it is) }
  1018. var
  1019. hp, start: tai;
  1020. removedsomething,
  1021. firstRemovedWasAlloc,
  1022. lastRemovedWasDealloc: boolean;
  1023. supreg: tsuperregister;
  1024. begin
  1025. {$ifdef EXTDEBUG}
  1026. if assigned(p1.optinfo) and
  1027. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1028. internalerror(2004101010);
  1029. {$endif EXTDEBUG}
  1030. start := p1;
  1031. if (reg = NR_ESP) or
  1032. (reg = current_procinfo.framepointer) or
  1033. not(assigned(p1)) then
  1034. { this happens with registers which are loaded implicitely, outside the }
  1035. { current block (e.g. esi with self) }
  1036. exit;
  1037. supreg := getsupreg(reg);
  1038. { make sure we allocate it for this instruction }
  1039. getnextinstruction(p2,p2);
  1040. lastRemovedWasDealloc := false;
  1041. removedSomething := false;
  1042. firstRemovedWasAlloc := false;
  1043. {$ifdef allocregdebug}
  1044. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1045. ' from here...'));
  1046. insertllitem(asml,p1.previous,p1,hp);
  1047. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1048. ' till here...'));
  1049. insertllitem(asml,p2,p2.next,hp);
  1050. {$endif allocregdebug}
  1051. if not(supreg in initialusedregs) then
  1052. begin
  1053. hp := tai_regalloc.alloc(reg,nil);
  1054. insertllItem(asmL,p1.previous,p1,hp);
  1055. end;
  1056. while assigned(p1) and
  1057. (p1 <> p2) do
  1058. begin
  1059. if assigned(p1.optinfo) then
  1060. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1061. p1 := tai(p1.next);
  1062. repeat
  1063. while assigned(p1) and
  1064. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1065. p1 := tai(p1.next);
  1066. { remove all allocation/deallocation info about the register in between }
  1067. if assigned(p1) and
  1068. (p1.typ = ait_regalloc) then
  1069. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1070. begin
  1071. if not removedSomething then
  1072. begin
  1073. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1074. removedSomething := true;
  1075. end;
  1076. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1077. hp := tai(p1.Next);
  1078. asml.Remove(p1);
  1079. p1.free;
  1080. p1 := hp;
  1081. end
  1082. else p1 := tai(p1.next);
  1083. until not(assigned(p1)) or
  1084. not(p1.typ in SkipInstr);
  1085. end;
  1086. if assigned(p1) then
  1087. begin
  1088. if firstRemovedWasAlloc then
  1089. begin
  1090. hp := tai_regalloc.Alloc(reg,nil);
  1091. insertLLItem(asmL,start.previous,start,hp);
  1092. end;
  1093. if lastRemovedWasDealloc then
  1094. begin
  1095. hp := tai_regalloc.DeAlloc(reg,nil);
  1096. insertLLItem(asmL,p1.previous,p1,hp);
  1097. end;
  1098. end;
  1099. end;
  1100. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1101. var
  1102. hp: tai;
  1103. first: boolean;
  1104. begin
  1105. findregdealloc := false;
  1106. first := true;
  1107. while assigned(p.previous) and
  1108. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1109. ((tai(p.previous).typ = ait_label) and
  1110. labelCanBeSkipped(tai_label(p.previous)))) do
  1111. begin
  1112. p := tai(p.previous);
  1113. if (p.typ = ait_regalloc) and
  1114. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1115. if (tai_regalloc(p).ratype=ra_dealloc) then
  1116. if first then
  1117. begin
  1118. findregdealloc := true;
  1119. break;
  1120. end
  1121. else
  1122. begin
  1123. findRegDealloc :=
  1124. getNextInstruction(p,hp) and
  1125. regLoadedWithNewValue(supreg,false,hp);
  1126. break
  1127. end
  1128. else
  1129. first := false;
  1130. end
  1131. end;
  1132. procedure incState(var S: Byte; amount: longint);
  1133. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1134. errors}
  1135. begin
  1136. if (s <= $ff - amount) then
  1137. inc(s, amount)
  1138. else s := longint(s) + amount - $ff;
  1139. end;
  1140. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1141. { Content is the sequence of instructions that describes the contents of }
  1142. { seqReg. reg is being overwritten by the current instruction. if the }
  1143. { content of seqReg depends on reg (ie. because of a }
  1144. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1145. var
  1146. p: tai;
  1147. Counter: Word;
  1148. TmpResult: Boolean;
  1149. RegsChecked: TRegSet;
  1150. begin
  1151. RegsChecked := [];
  1152. p := Content.StartMod;
  1153. TmpResult := False;
  1154. Counter := 1;
  1155. while not(TmpResult) and
  1156. (Counter <= Content.NrOfMods) Do
  1157. begin
  1158. if (p.typ = ait_instruction) and
  1159. ((taicpu(p).opcode = A_MOV) or
  1160. (taicpu(p).opcode = A_MOVZX) or
  1161. (taicpu(p).opcode = A_MOVSX) or
  1162. (taicpu(p).opcode = A_LEA)) and
  1163. (taicpu(p).oper[0]^.typ = top_ref) then
  1164. With taicpu(p).oper[0]^.ref^ Do
  1165. if ((base = current_procinfo.FramePointer) or
  1166. (assigned(symbol) and (base = NR_NO))) and
  1167. (index = NR_NO) then
  1168. begin
  1169. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1170. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1171. break;
  1172. end
  1173. else
  1174. tmpResult :=
  1175. regReadByInstruction(supreg,p) and
  1176. regModifiedByInstruction(seqReg,p)
  1177. else
  1178. tmpResult :=
  1179. regReadByInstruction(supreg,p) and
  1180. regModifiedByInstruction(seqReg,p);
  1181. inc(Counter);
  1182. GetNextInstruction(p,p)
  1183. end;
  1184. sequenceDependsonReg := TmpResult
  1185. end;
  1186. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1187. var
  1188. counter: tsuperregister;
  1189. begin
  1190. for counter := RS_EAX to RS_EDI do
  1191. if counter <> supreg then
  1192. with p1^.regs[counter] Do
  1193. begin
  1194. if (typ in [con_ref,con_noRemoveRef]) and
  1195. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1196. if typ in [con_ref, con_invalid] then
  1197. typ := con_invalid
  1198. { con_noRemoveRef = con_unknown }
  1199. else
  1200. typ := con_unknown;
  1201. if assigned(memwrite) and
  1202. regInRef(counter,memwrite.oper[1]^.ref^) then
  1203. memwrite := nil;
  1204. end;
  1205. end;
  1206. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1207. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1208. contents of registers are loaded with a memory location based on reg.
  1209. doincState is false when this register has to be destroyed not because
  1210. it's contents are directly modified/overwritten, but because of an indirect
  1211. action (e.g. this register holds the contents of a variable and the value
  1212. of the variable in memory is changed) }
  1213. begin
  1214. { the following happens for fpu registers }
  1215. if (supreg < low(NrOfInstrSinceLastMod)) or
  1216. (supreg > high(NrOfInstrSinceLastMod)) then
  1217. exit;
  1218. NrOfInstrSinceLastMod[supreg] := 0;
  1219. with p1^.regs[supreg] do
  1220. begin
  1221. if doincState then
  1222. begin
  1223. incState(wstate,1);
  1224. typ := con_unknown;
  1225. startmod := nil;
  1226. end
  1227. else
  1228. if typ in [con_ref,con_const,con_invalid] then
  1229. typ := con_invalid
  1230. { con_noRemoveRef = con_unknown }
  1231. else
  1232. typ := con_unknown;
  1233. memwrite := nil;
  1234. end;
  1235. invalidateDependingRegs(p1,supreg);
  1236. end;
  1237. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1238. begin
  1239. if (p.typ = ait_instruction) then
  1240. begin
  1241. case taicpu(p).oper[0]^.typ Of
  1242. top_reg:
  1243. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1244. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1245. top_ref:
  1246. With TReference(taicpu(p).oper[0]^) Do
  1247. begin
  1248. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1249. then RegSet := RegSet + [base];
  1250. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1251. then RegSet := RegSet + [index];
  1252. end;
  1253. end;
  1254. case taicpu(p).oper[1]^.typ Of
  1255. top_reg:
  1256. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1257. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1258. top_ref:
  1259. With TReference(taicpu(p).oper[1]^) Do
  1260. begin
  1261. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1262. then RegSet := RegSet + [base];
  1263. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1264. then RegSet := RegSet + [index];
  1265. end;
  1266. end;
  1267. end;
  1268. end;}
  1269. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1270. begin {checks whether the two ops are equivalent}
  1271. OpsEquivalent := False;
  1272. if o1.typ=o2.typ then
  1273. case o1.typ Of
  1274. top_reg:
  1275. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1276. top_ref:
  1277. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1278. Top_Const:
  1279. OpsEquivalent := o1.val = o2.val;
  1280. Top_None:
  1281. OpsEquivalent := True
  1282. end;
  1283. end;
  1284. function OpsEqual(const o1,o2:toper): Boolean;
  1285. begin {checks whether the two ops are equal}
  1286. OpsEqual := False;
  1287. if o1.typ=o2.typ then
  1288. case o1.typ Of
  1289. top_reg :
  1290. OpsEqual:=o1.reg=o2.reg;
  1291. top_ref :
  1292. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1293. Top_Const :
  1294. OpsEqual:=o1.val=o2.val;
  1295. Top_None :
  1296. OpsEqual := True
  1297. end;
  1298. end;
  1299. function sizescompatible(loadsize,newsize: topsize): boolean;
  1300. begin
  1301. case loadsize of
  1302. S_B,S_BW,S_BL:
  1303. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1304. S_W,S_WL:
  1305. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1306. else
  1307. sizescompatible := newsize = S_L;
  1308. end;
  1309. end;
  1310. function opscompatible(p1,p2: taicpu): boolean;
  1311. begin
  1312. case p1.opcode of
  1313. A_MOVZX,A_MOVSX:
  1314. opscompatible :=
  1315. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1316. sizescompatible(p1.opsize,p2.opsize);
  1317. else
  1318. opscompatible :=
  1319. (p1.opcode = p2.opcode) and
  1320. (p1.ops = p2.ops) and
  1321. (p1.opsize = p2.opsize);
  1322. end;
  1323. end;
  1324. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1325. {$ifdef csdebug}
  1326. var
  1327. hp: tai;
  1328. {$endif csdebug}
  1329. begin {checks whether two taicpu instructions are equal}
  1330. if assigned(p1) and assigned(p2) and
  1331. (tai(p1).typ = ait_instruction) and
  1332. (tai(p2).typ = ait_instruction) and
  1333. opscompatible(taicpu(p1),taicpu(p2)) and
  1334. (not(assigned(taicpu(p1).oper[0])) or
  1335. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1336. (not(assigned(taicpu(p1).oper[1])) or
  1337. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1338. (not(assigned(taicpu(p1).oper[2])) or
  1339. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1340. {both instructions have the same structure:
  1341. "<operator> <operand of type1>, <operand of type 2>"}
  1342. if ((taicpu(p1).opcode = A_MOV) or
  1343. (taicpu(p1).opcode = A_MOVZX) or
  1344. (taicpu(p1).opcode = A_MOVSX) or
  1345. (taicpu(p1).opcode = A_LEA)) and
  1346. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1347. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1348. {the "old" instruction is a load of a register with a new value, not with
  1349. a value based on the contents of this register (so no "mov (reg), reg")}
  1350. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1351. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1352. {the "new" instruction is also a load of a register with a new value, and
  1353. this value is fetched from the same memory location}
  1354. begin
  1355. With taicpu(p2).oper[0]^.ref^ Do
  1356. begin
  1357. if (base <> NR_NO) and
  1358. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1359. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1360. if (index <> NR_NO) and
  1361. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1362. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1363. end;
  1364. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1365. from the reference are the same in the old and in the new instruction
  1366. sequence}
  1367. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1368. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1369. InstructionsEquivalent :=
  1370. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1371. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1372. end
  1373. {the registers are loaded with values from different memory locations. if
  1374. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1375. would be considered equivalent}
  1376. else
  1377. InstructionsEquivalent := False
  1378. else
  1379. {load register with a value based on the current value of this register}
  1380. begin
  1381. With taicpu(p2).oper[0]^.ref^ Do
  1382. begin
  1383. if (base <> NR_NO) and
  1384. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1385. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1386. {it won't do any harm if the register is already in RegsLoadedForRef}
  1387. begin
  1388. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1389. {$ifdef csdebug}
  1390. Writeln(std_regname(base), ' added');
  1391. {$endif csdebug}
  1392. end;
  1393. if (index <> NR_NO) and
  1394. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1395. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1396. begin
  1397. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1398. {$ifdef csdebug}
  1399. Writeln(std_regname(index), ' added');
  1400. {$endif csdebug}
  1401. end;
  1402. end;
  1403. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1404. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1405. begin
  1406. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1407. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1408. {$ifdef csdebug}
  1409. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1410. {$endif csdebug}
  1411. end;
  1412. InstructionsEquivalent :=
  1413. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1414. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1415. end
  1416. else
  1417. {an instruction <> mov, movzx, movsx}
  1418. begin
  1419. {$ifdef csdebug}
  1420. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1421. hp.previous := p2;
  1422. hp.next := p2.next;
  1423. p2.next.previous := hp;
  1424. p2.next := hp;
  1425. {$endif csdebug}
  1426. InstructionsEquivalent :=
  1427. (not(assigned(taicpu(p1).oper[0])) or
  1428. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1429. (not(assigned(taicpu(p1).oper[1])) or
  1430. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1431. (not(assigned(taicpu(p1).oper[2])) or
  1432. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1433. end
  1434. {the instructions haven't even got the same structure, so they're certainly
  1435. not equivalent}
  1436. else
  1437. begin
  1438. {$ifdef csdebug}
  1439. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1440. hp.previous := p2;
  1441. hp.next := p2.next;
  1442. p2.next.previous := hp;
  1443. p2.next := hp;
  1444. {$endif csdebug}
  1445. InstructionsEquivalent := False;
  1446. end;
  1447. {$ifdef csdebug}
  1448. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1449. hp.previous := p2;
  1450. hp.next := p2.next;
  1451. p2.next.previous := hp;
  1452. p2.next := hp;
  1453. {$endif csdebug}
  1454. end;
  1455. (*
  1456. function InstructionsEqual(p1, p2: tai): Boolean;
  1457. begin {checks whether two taicpu instructions are equal}
  1458. InstructionsEqual :=
  1459. assigned(p1) and assigned(p2) and
  1460. ((tai(p1).typ = ait_instruction) and
  1461. (tai(p1).typ = ait_instruction) and
  1462. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1463. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1464. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1465. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1466. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1467. end;
  1468. *)
  1469. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1470. begin
  1471. if supreg in [RS_EAX..RS_EDI] then
  1472. incState(p^.regs[supreg].rstate,1)
  1473. end;
  1474. procedure readref(p: ptaiprop; const ref: preference);
  1475. begin
  1476. if ref^.base <> NR_NO then
  1477. readreg(p, getsupreg(ref^.base));
  1478. if ref^.index <> NR_NO then
  1479. readreg(p, getsupreg(ref^.index));
  1480. end;
  1481. procedure ReadOp(p: ptaiprop;const o:toper);
  1482. begin
  1483. case o.typ Of
  1484. top_reg: readreg(p, getsupreg(o.reg));
  1485. top_ref: readref(p, o.ref);
  1486. end;
  1487. end;
  1488. function RefInInstruction(const ref: TReference; p: tai;
  1489. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1490. {checks whehter ref is used in p}
  1491. var
  1492. mysize: tcgsize;
  1493. TmpResult: Boolean;
  1494. begin
  1495. TmpResult := False;
  1496. if (p.typ = ait_instruction) then
  1497. begin
  1498. mysize := topsize2tcgsize[taicpu(p).opsize];
  1499. if (taicpu(p).ops >= 1) and
  1500. (taicpu(p).oper[0]^.typ = top_ref) then
  1501. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1502. if not(TmpResult) and
  1503. (taicpu(p).ops >= 2) and
  1504. (taicpu(p).oper[1]^.typ = top_ref) then
  1505. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1506. if not(TmpResult) and
  1507. (taicpu(p).ops >= 3) and
  1508. (taicpu(p).oper[2]^.typ = top_ref) then
  1509. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1510. end;
  1511. RefInInstruction := TmpResult;
  1512. end;
  1513. function RefInSequence(const ref: TReference; Content: TContent;
  1514. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1515. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1516. tai objects) to see whether ref is used somewhere}
  1517. var p: tai;
  1518. Counter: Word;
  1519. TmpResult: Boolean;
  1520. begin
  1521. p := Content.StartMod;
  1522. TmpResult := False;
  1523. Counter := 1;
  1524. while not(TmpResult) and
  1525. (Counter <= Content.NrOfMods) Do
  1526. begin
  1527. if (p.typ = ait_instruction) and
  1528. RefInInstruction(ref, p, RefsEq, size)
  1529. then TmpResult := True;
  1530. inc(Counter);
  1531. GetNextInstruction(p,p)
  1532. end;
  1533. RefInSequence := TmpResult
  1534. end;
  1535. {$ifdef q+}
  1536. {$q-}
  1537. {$define overflowon}
  1538. {$endif q+}
  1539. // checks whether a write to r2 of size "size" contains address r1
  1540. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1541. var
  1542. realsize1, realsize2: aint;
  1543. begin
  1544. realsize1 := tcgsize2size[size1];
  1545. realsize2 := tcgsize2size[size2];
  1546. arrayrefsoverlapping :=
  1547. (r2.offset <= r1.offset+realsize1) and
  1548. (r1.offset <= r2.offset+realsize2) and
  1549. (r1.segment = r2.segment) and
  1550. (r1.symbol=r2.symbol) and
  1551. (r1.base = r2.base)
  1552. end;
  1553. {$ifdef overflowon}
  1554. {$q+}
  1555. {$undef overflowon}
  1556. {$endif overflowon}
  1557. function isSimpleRef(const ref: treference): boolean;
  1558. { returns true if ref is reference to a local or global variable, to a }
  1559. { parameter or to an object field (this includes arrays). Returns false }
  1560. { otherwise. }
  1561. begin
  1562. isSimpleRef :=
  1563. assigned(ref.symbol) or
  1564. (ref.base = current_procinfo.framepointer);
  1565. end;
  1566. function containsPointerRef(p: tai): boolean;
  1567. { checks if an instruction contains a reference which is a pointer location }
  1568. var
  1569. hp: taicpu;
  1570. count: longint;
  1571. begin
  1572. containsPointerRef := false;
  1573. if p.typ <> ait_instruction then
  1574. exit;
  1575. hp := taicpu(p);
  1576. for count := 0 to hp.ops-1 do
  1577. begin
  1578. case hp.oper[count]^.typ of
  1579. top_ref:
  1580. if not isSimpleRef(hp.oper[count]^.ref^) then
  1581. begin
  1582. containsPointerRef := true;
  1583. exit;
  1584. end;
  1585. top_none:
  1586. exit;
  1587. end;
  1588. end;
  1589. end;
  1590. function containsPointerLoad(c: tcontent): boolean;
  1591. { checks whether the contents of a register contain a pointer reference }
  1592. var
  1593. p: tai;
  1594. count: longint;
  1595. begin
  1596. containsPointerLoad := false;
  1597. p := c.startmod;
  1598. for count := c.nrOfMods downto 1 do
  1599. begin
  1600. if containsPointerRef(p) then
  1601. begin
  1602. containsPointerLoad := true;
  1603. exit;
  1604. end;
  1605. getnextinstruction(p,p);
  1606. end;
  1607. end;
  1608. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1609. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1610. { returns whether the contents c of reg are invalid after regWritten is }
  1611. { is written to ref }
  1612. var
  1613. refsEq: trefCompare;
  1614. begin
  1615. if isSimpleRef(ref) then
  1616. begin
  1617. if (ref.index <> NR_NO) or
  1618. (assigned(ref.symbol) and
  1619. (ref.base <> NR_NO)) then
  1620. { local/global variable or parameter which is an array }
  1621. refsEq := {$ifdef fpc}@{$endif}arrayRefsOverlapping
  1622. else
  1623. { local/global variable or parameter which is not an array }
  1624. refsEq := {$ifdef fpc}@{$endif}refsOverlapping;
  1625. invalsmemwrite :=
  1626. assigned(c.memwrite) and
  1627. ((not(cs_uncertainOpts in aktglobalswitches) and
  1628. containsPointerRef(c.memwrite)) or
  1629. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1630. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1631. begin
  1632. writeToMemDestroysContents := false;
  1633. exit;
  1634. end;
  1635. { write something to a parameter, a local or global variable, so }
  1636. { * with uncertain optimizations on: }
  1637. { - destroy the contents of registers whose contents have somewhere a }
  1638. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1639. { are being written to memory) is not destroyed if it's StartMod is }
  1640. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1641. { expression based on ref) }
  1642. { * with uncertain optimizations off: }
  1643. { - also destroy registers that contain any pointer }
  1644. with c do
  1645. writeToMemDestroysContents :=
  1646. (typ in [con_ref,con_noRemoveRef]) and
  1647. ((not(cs_uncertainOpts in aktglobalswitches) and
  1648. containsPointerLoad(c)
  1649. ) or
  1650. (refInSequence(ref,c,refsEq,size) and
  1651. ((supreg <> regWritten) or
  1652. not((nrOfMods = 1) and
  1653. {StarMod is always of the type ait_instruction}
  1654. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1655. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1656. )
  1657. )
  1658. )
  1659. );
  1660. end
  1661. else
  1662. { write something to a pointer location, so }
  1663. { * with uncertain optimzations on: }
  1664. { - do not destroy registers which contain a local/global variable or }
  1665. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1666. { * with uncertain optimzations off: }
  1667. { - destroy every register which contains a memory location }
  1668. begin
  1669. invalsmemwrite :=
  1670. assigned(c.memwrite) and
  1671. (not(cs_UncertainOpts in aktglobalswitches) or
  1672. containsPointerRef(c.memwrite));
  1673. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1674. begin
  1675. writeToMemDestroysContents := false;
  1676. exit;
  1677. end;
  1678. with c do
  1679. writeToMemDestroysContents :=
  1680. (typ in [con_ref,con_noRemoveRef]) and
  1681. (not(cs_UncertainOpts in aktglobalswitches) or
  1682. { for movsl }
  1683. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1684. { don't destroy if reg contains a parameter, local or global variable }
  1685. containsPointerLoad(c)
  1686. );
  1687. end;
  1688. end;
  1689. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1690. const c: tcontent): boolean;
  1691. { returns whether the contents c of reg are invalid after destReg is }
  1692. { modified }
  1693. begin
  1694. writeToRegDestroysContents :=
  1695. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1696. sequenceDependsOnReg(c,supreg,destReg);
  1697. end;
  1698. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1699. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1700. { returns whether the contents c of reg are invalid after regWritten is }
  1701. { is written to op }
  1702. begin
  1703. memwritedestroyed := false;
  1704. case op.typ of
  1705. top_reg:
  1706. writeDestroysContents :=
  1707. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1708. top_ref:
  1709. writeDestroysContents :=
  1710. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1711. else
  1712. writeDestroysContents := false;
  1713. end;
  1714. end;
  1715. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1716. { destroys all registers which possibly contain a reference to ref, regWritten }
  1717. { is the register whose contents are being written to memory (if this proc }
  1718. { is called because of a "mov?? %reg, (mem)" instruction) }
  1719. var
  1720. counter: tsuperregister;
  1721. destroymemwrite: boolean;
  1722. begin
  1723. for counter := RS_EAX to RS_EDI Do
  1724. begin
  1725. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1726. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1727. destroyReg(ptaiprop(p.optInfo), counter, false)
  1728. else if destroymemwrite then
  1729. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1730. end;
  1731. end;
  1732. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1733. var Counter: tsuperregister;
  1734. begin {initializes/desrtoys all registers}
  1735. For Counter := RS_EAX To RS_EDI Do
  1736. begin
  1737. if read then
  1738. readreg(p, Counter);
  1739. DestroyReg(p, Counter, written);
  1740. p^.regs[counter].MemWrite := nil;
  1741. end;
  1742. p^.DirFlag := F_Unknown;
  1743. end;
  1744. procedure DestroyOp(taiObj: tai; const o:Toper);
  1745. {$ifdef statedebug}
  1746. var
  1747. hp: tai;
  1748. {$endif statedebug}
  1749. begin
  1750. case o.typ Of
  1751. top_reg:
  1752. begin
  1753. {$ifdef statedebug}
  1754. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1755. hp.next := taiobj.next;
  1756. hp.previous := taiobj;
  1757. taiobj.next := hp;
  1758. if assigned(hp.next) then
  1759. hp.next.previous := hp;
  1760. {$endif statedebug}
  1761. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1762. end;
  1763. top_ref:
  1764. begin
  1765. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1766. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1767. end;
  1768. end;
  1769. end;
  1770. procedure AddInstr2RegContents({$ifdef statedebug} asml: taasmoutput; {$endif}
  1771. p: taicpu; supreg: tsuperregister);
  1772. {$ifdef statedebug}
  1773. var
  1774. hp: tai;
  1775. {$endif statedebug}
  1776. begin
  1777. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1778. if (typ in [con_ref,con_noRemoveRef]) then
  1779. begin
  1780. incState(wstate,1);
  1781. { also store how many instructions are part of the sequence in the first }
  1782. { instructions ptaiprop, so it can be easily accessed from within }
  1783. { CheckSequence}
  1784. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1785. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1786. NrOfInstrSinceLastMod[supreg] := 0;
  1787. invalidateDependingRegs(p.optinfo,supreg);
  1788. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1789. {$ifdef StateDebug}
  1790. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1791. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1792. InsertLLItem(AsmL, p, p.next, hp);
  1793. {$endif StateDebug}
  1794. end
  1795. else
  1796. begin
  1797. {$ifdef statedebug}
  1798. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1799. insertllitem(asml,p,p.next,hp);
  1800. {$endif statedebug}
  1801. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1802. {$ifdef StateDebug}
  1803. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1804. InsertLLItem(AsmL, p, p.next, hp);
  1805. {$endif StateDebug}
  1806. end
  1807. end;
  1808. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAAsmoutput; {$endif}
  1809. p: taicpu; const oper: TOper);
  1810. begin
  1811. if oper.typ = top_reg then
  1812. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1813. else
  1814. begin
  1815. ReadOp(ptaiprop(p.optinfo), oper);
  1816. DestroyOp(p, oper);
  1817. end
  1818. end;
  1819. {*************************************************************************************}
  1820. {************************************** TDFAOBJ **************************************}
  1821. {*************************************************************************************}
  1822. constructor tdfaobj.create(_list: taasmoutput);
  1823. begin
  1824. list := _list;
  1825. blockstart := nil;
  1826. blockend := nil;
  1827. nroftaiobjs := 0;
  1828. taipropblock := nil;
  1829. lolab := 0;
  1830. hilab := 0;
  1831. labdif := 0;
  1832. labeltable := nil;
  1833. end;
  1834. procedure tdfaobj.initlabeltable;
  1835. var
  1836. labelfound: boolean;
  1837. p, prev: tai;
  1838. hp1, hp2: tai;
  1839. {$ifdef i386}
  1840. regcounter,
  1841. supreg : tsuperregister;
  1842. {$endif i386}
  1843. usedregs, nodeallocregs: tregset;
  1844. begin
  1845. labelfound := false;
  1846. lolab := maxlongint;
  1847. hilab := 0;
  1848. p := blockstart;
  1849. prev := p;
  1850. while assigned(p) do
  1851. begin
  1852. if (tai(p).typ = ait_label) then
  1853. if not labelcanbeskipped(tai_label(p)) then
  1854. begin
  1855. labelfound := true;
  1856. if (tai_Label(p).l.labelnr < lolab) then
  1857. lolab := tai_label(p).l.labelnr;
  1858. if (tai_Label(p).l.labelnr > hilab) then
  1859. hilab := tai_label(p).l.labelnr;
  1860. end;
  1861. prev := p;
  1862. getnextinstruction(p, p);
  1863. end;
  1864. if (prev.typ = ait_marker) and
  1865. (tai_marker(prev).kind = asmblockstart) then
  1866. blockend := prev
  1867. else blockend := nil;
  1868. if labelfound then
  1869. labdif := hilab+1-lolab
  1870. else labdif := 0;
  1871. usedregs := [];
  1872. if (labdif <> 0) then
  1873. begin
  1874. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1875. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1876. end;
  1877. p := blockstart;
  1878. prev := p;
  1879. while (p <> blockend) do
  1880. begin
  1881. case p.typ of
  1882. ait_label:
  1883. if not labelcanbeskipped(tai_label(p)) then
  1884. labeltable^[tai_label(p).l.labelnr-lolab].taiobj := p;
  1885. {$ifdef i386}
  1886. ait_regalloc:
  1887. begin
  1888. supreg:=getsupreg(tai_regalloc(p).reg);
  1889. case tai_regalloc(p).ratype of
  1890. ra_alloc :
  1891. begin
  1892. if not(supreg in usedregs) then
  1893. include(usedregs, supreg)
  1894. else
  1895. begin
  1896. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1897. hp1 := tai(p.previous);
  1898. list.remove(p);
  1899. p.free;
  1900. p := hp1;
  1901. end;
  1902. end;
  1903. ra_dealloc :
  1904. begin
  1905. exclude(usedregs, supreg);
  1906. hp1 := p;
  1907. hp2 := nil;
  1908. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1909. getnextinstruction(hp1, hp1) and
  1910. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1911. hp2 := hp1;
  1912. if hp2 <> nil then
  1913. begin
  1914. hp1 := tai(p.previous);
  1915. list.remove(p);
  1916. insertllitem(list, hp2, tai(hp2.next), p);
  1917. p := hp1;
  1918. end
  1919. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1920. and getnextinstruction(p,hp1) then
  1921. begin
  1922. hp1 := tai(p.previous);
  1923. list.remove(p);
  1924. p.free;
  1925. p := hp1;
  1926. // don't include here, since then the allocation will be removed when it's processed
  1927. // include(usedregs,supreg);
  1928. end;
  1929. end;
  1930. end;
  1931. end;
  1932. {$endif i386}
  1933. end;
  1934. repeat
  1935. prev := p;
  1936. p := tai(p.next);
  1937. until not(assigned(p)) or
  1938. (p = blockend) or
  1939. not(p.typ in (skipinstr - [ait_regalloc]));
  1940. end;
  1941. {$ifdef i386}
  1942. { don't add deallocation for function result variable or for regvars}
  1943. getNoDeallocRegs(noDeallocRegs);
  1944. usedRegs := usedRegs - noDeallocRegs;
  1945. for regCounter := RS_EAX to RS_EDI do
  1946. if regCounter in usedRegs then
  1947. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1948. {$endif i386}
  1949. end;
  1950. function tdfaobj.pass_1(_blockstart: tai): tai;
  1951. begin
  1952. blockstart := _blockstart;
  1953. initlabeltable;
  1954. pass_1 := blockend;
  1955. end;
  1956. function tdfaobj.initdfapass2: boolean;
  1957. {reserves memory for the PtaiProps in one big memory block when not using
  1958. TP, returns False if not enough memory is available for the optimizer in all
  1959. cases}
  1960. var
  1961. p: tai;
  1962. count: Longint;
  1963. { TmpStr: String; }
  1964. begin
  1965. p := blockstart;
  1966. skiphead(p);
  1967. nroftaiobjs := 0;
  1968. while (p <> blockend) do
  1969. begin
  1970. {$ifDef JumpAnal}
  1971. case p.typ of
  1972. ait_label:
  1973. begin
  1974. if not labelcanbeskipped(tai_label(p)) then
  1975. labeltable^[tai_label(p).l.labelnr-lolab].instrnr := nroftaiobjs
  1976. end;
  1977. ait_instruction:
  1978. begin
  1979. if taicpu(p).is_jmp then
  1980. begin
  1981. if (tasmlabel(taicpu(p).oper[0]^.sym).labelnr >= lolab) and
  1982. (tasmlabel(taicpu(p).oper[0]^.sym).labelnr <= hilab) then
  1983. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-lolab].refsfound);
  1984. end;
  1985. end;
  1986. { ait_instruction:
  1987. begin
  1988. if (taicpu(p).opcode = A_PUSH) and
  1989. (taicpu(p).oper[0]^.typ = top_symbol) and
  1990. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1991. begin
  1992. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  1993. if}
  1994. end;
  1995. {$endif JumpAnal}
  1996. inc(NrOftaiObjs);
  1997. getnextinstruction(p,p);
  1998. end;
  1999. if nroftaiobjs <> 0 then
  2000. begin
  2001. initdfapass2 := True;
  2002. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2003. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2004. p := blockstart;
  2005. skiphead(p);
  2006. for count := 1 To nroftaiobjs do
  2007. begin
  2008. ptaiprop(p.optinfo) := @taipropblock^[count];
  2009. getnextinstruction(p, p);
  2010. end;
  2011. end
  2012. else
  2013. initdfapass2 := false;
  2014. end;
  2015. procedure tdfaobj.dodfapass2;
  2016. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2017. contents for the instructions starting with p. Returns the last tai which has
  2018. been processed}
  2019. var
  2020. curprop, LastFlagsChangeProp: ptaiprop;
  2021. Cnt, InstrCnt : Longint;
  2022. InstrProp: TInsProp;
  2023. UsedRegs: TRegSet;
  2024. prev,p : tai;
  2025. tmpref: TReference;
  2026. tmpsupreg: tsuperregister;
  2027. {$ifdef statedebug}
  2028. hp : tai;
  2029. {$endif}
  2030. {$ifdef AnalyzeLoops}
  2031. hp : tai;
  2032. TmpState: Byte;
  2033. {$endif AnalyzeLoops}
  2034. begin
  2035. p := BlockStart;
  2036. LastFlagsChangeProp := nil;
  2037. prev := nil;
  2038. UsedRegs := [];
  2039. UpdateUsedregs(UsedRegs, p);
  2040. SkipHead(p);
  2041. BlockStart := p;
  2042. InstrCnt := 1;
  2043. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2044. while (p <> Blockend) Do
  2045. begin
  2046. curprop := @taiPropBlock^[InstrCnt];
  2047. if assigned(prev)
  2048. then
  2049. begin
  2050. {$ifdef JumpAnal}
  2051. if (p.Typ <> ait_label) then
  2052. {$endif JumpAnal}
  2053. begin
  2054. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2055. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2056. curprop^.FlagsUsed := false;
  2057. end
  2058. end
  2059. else
  2060. begin
  2061. fillchar(curprop^, SizeOf(curprop^), 0);
  2062. { For tmpreg := RS_EAX to RS_EDI Do
  2063. curprop^.regs[tmpreg].WState := 1;}
  2064. end;
  2065. curprop^.UsedRegs := UsedRegs;
  2066. curprop^.CanBeRemoved := False;
  2067. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2068. For tmpsupreg := RS_EAX To RS_EDI Do
  2069. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2070. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2071. else
  2072. begin
  2073. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2074. curprop^.regs[tmpsupreg].typ := con_unknown;
  2075. end;
  2076. case p.typ Of
  2077. ait_marker:;
  2078. ait_label:
  2079. {$ifndef JumpAnal}
  2080. if not labelCanBeSkipped(tai_label(p)) then
  2081. DestroyAllRegs(curprop,false,false);
  2082. {$else JumpAnal}
  2083. begin
  2084. if not labelCanBeSkipped(tai_label(p)) then
  2085. With LTable^[tai_Label(p).l^.labelnr-LoLab] Do
  2086. {$ifDef AnalyzeLoops}
  2087. if (RefsFound = tai_Label(p).l^.RefCount)
  2088. {$else AnalyzeLoops}
  2089. if (JmpsProcessed = tai_Label(p).l^.RefCount)
  2090. {$endif AnalyzeLoops}
  2091. then
  2092. {all jumps to this label have been found}
  2093. {$ifDef AnalyzeLoops}
  2094. if (JmpsProcessed > 0)
  2095. then
  2096. {$endif AnalyzeLoops}
  2097. {we've processed at least one jump to this label}
  2098. begin
  2099. if (GetLastInstruction(p, hp) and
  2100. not(((hp.typ = ait_instruction)) and
  2101. (taicpu_labeled(hp).is_jmp))
  2102. then
  2103. {previous instruction not a JMP -> the contents of the registers after the
  2104. previous intruction has been executed have to be taken into account as well}
  2105. For tmpsupreg := RS_EAX to RS_EDI Do
  2106. begin
  2107. if (curprop^.regs[tmpsupreg].WState <>
  2108. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2109. then DestroyReg(curprop, tmpsupreg, true)
  2110. end
  2111. end
  2112. {$ifDef AnalyzeLoops}
  2113. else
  2114. {a label from a backward jump (e.g. a loop), no jump to this label has
  2115. already been processed}
  2116. if GetLastInstruction(p, hp) and
  2117. not(hp.typ = ait_instruction) and
  2118. (taicpu_labeled(hp).opcode = A_JMP))
  2119. then
  2120. {previous instruction not a jmp, so keep all the registers' contents from the
  2121. previous instruction}
  2122. begin
  2123. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2124. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2125. end
  2126. else
  2127. {previous instruction a jmp and no jump to this label processed yet}
  2128. begin
  2129. hp := p;
  2130. Cnt := InstrCnt;
  2131. {continue until we find a jump to the label or a label which has already
  2132. been processed}
  2133. while GetNextInstruction(hp, hp) and
  2134. not((hp.typ = ait_instruction) and
  2135. (taicpu(hp).is_jmp) and
  2136. (tasmlabel(taicpu(hp).oper[0]^.sym).labelnr = tai_Label(p).l^.labelnr)) and
  2137. not((hp.typ = ait_label) and
  2138. (LTable^[tai_Label(hp).l^.labelnr-LoLab].RefsFound
  2139. = tai_Label(hp).l^.RefCount) and
  2140. (LTable^[tai_Label(hp).l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2141. inc(Cnt);
  2142. if (hp.typ = ait_label)
  2143. then
  2144. {there's a processed label after the current one}
  2145. begin
  2146. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2147. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2148. end
  2149. else
  2150. {there's no label anymore after the current one, or they haven't been
  2151. processed yet}
  2152. begin
  2153. GetLastInstruction(p, hp);
  2154. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2155. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2156. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2157. end
  2158. end
  2159. {$endif AnalyzeLoops}
  2160. else
  2161. {not all references to this label have been found, so destroy all registers}
  2162. begin
  2163. GetLastInstruction(p, hp);
  2164. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2165. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2166. DestroyAllRegs(curprop,true,true)
  2167. end;
  2168. end;
  2169. {$endif JumpAnal}
  2170. {$ifdef GDB}
  2171. ait_stabs, ait_stabn, ait_stab_function_name:;
  2172. {$endif GDB}
  2173. ait_align: ; { may destroy flags !!! }
  2174. ait_instruction:
  2175. begin
  2176. if taicpu(p).is_jmp or
  2177. (taicpu(p).opcode = A_JMP) then
  2178. begin
  2179. {$ifNDef JumpAnal}
  2180. for tmpsupreg := RS_EAX to RS_EDI do
  2181. with curprop^.regs[tmpsupreg] do
  2182. case typ of
  2183. con_ref: typ := con_noRemoveRef;
  2184. con_const: typ := con_noRemoveConst;
  2185. con_invalid: typ := con_unknown;
  2186. end;
  2187. {$else JumpAnal}
  2188. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-LoLab] Do
  2189. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2190. begin
  2191. if (InstrCnt < InstrNr)
  2192. then
  2193. {forward jump}
  2194. if (JmpsProcessed = 0) then
  2195. {no jump to this label has been processed yet}
  2196. begin
  2197. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2198. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2199. inc(JmpsProcessed);
  2200. end
  2201. else
  2202. begin
  2203. For tmpreg := RS_EAX to RS_EDI Do
  2204. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2205. curprop^.regs[tmpreg].WState) then
  2206. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2207. inc(JmpsProcessed);
  2208. end
  2209. {$ifdef AnalyzeLoops}
  2210. else
  2211. { backward jump, a loop for example}
  2212. { if (JmpsProcessed > 0) or
  2213. not(GetLastInstruction(taiObj, hp) and
  2214. (hp.typ = ait_labeled_instruction) and
  2215. (taicpu_labeled(hp).opcode = A_JMP))
  2216. then}
  2217. {instruction prior to label is not a jmp, or at least one jump to the label
  2218. has yet been processed}
  2219. begin
  2220. inc(JmpsProcessed);
  2221. For tmpreg := RS_EAX to RS_EDI Do
  2222. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2223. curprop^.regs[tmpreg].WState)
  2224. then
  2225. begin
  2226. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2227. Cnt := InstrNr;
  2228. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2229. begin
  2230. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2231. inc(Cnt);
  2232. end;
  2233. while (Cnt <= InstrCnt) Do
  2234. begin
  2235. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2236. inc(Cnt)
  2237. end
  2238. end;
  2239. end
  2240. { else }
  2241. {instruction prior to label is a jmp and no jumps to the label have yet been
  2242. processed}
  2243. { begin
  2244. inc(JmpsProcessed);
  2245. For tmpreg := RS_EAX to RS_EDI Do
  2246. begin
  2247. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2248. Cnt := InstrNr;
  2249. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2250. begin
  2251. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2252. inc(Cnt);
  2253. end;
  2254. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2255. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2256. begin
  2257. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2258. inc(Cnt);
  2259. end;
  2260. while (Cnt <= InstrCnt) Do
  2261. begin
  2262. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2263. inc(Cnt)
  2264. end
  2265. end
  2266. end}
  2267. {$endif AnalyzeLoops}
  2268. end;
  2269. {$endif JumpAnal}
  2270. end
  2271. else
  2272. begin
  2273. InstrProp := InsProp[taicpu(p).opcode];
  2274. case taicpu(p).opcode Of
  2275. A_MOV, A_MOVZX, A_MOVSX:
  2276. begin
  2277. case taicpu(p).oper[0]^.typ Of
  2278. top_ref, top_reg:
  2279. case taicpu(p).oper[1]^.typ Of
  2280. top_reg:
  2281. begin
  2282. {$ifdef statedebug}
  2283. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2284. insertllitem(list,p,p.next,hp);
  2285. {$endif statedebug}
  2286. readOp(curprop, taicpu(p).oper[0]^);
  2287. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2288. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2289. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2290. begin
  2291. with curprop^.regs[tmpsupreg] Do
  2292. begin
  2293. incState(wstate,1);
  2294. { also store how many instructions are part of the sequence in the first }
  2295. { instruction's ptaiprop, so it can be easily accessed from within }
  2296. { CheckSequence }
  2297. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2298. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2299. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2300. { Destroy the contents of the registers }
  2301. { that depended on the previous value of }
  2302. { this register }
  2303. invalidateDependingRegs(curprop,tmpsupreg);
  2304. curprop^.regs[tmpsupreg].memwrite := nil;
  2305. end;
  2306. end
  2307. else
  2308. begin
  2309. {$ifdef statedebug}
  2310. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2311. insertllitem(list,p,p.next,hp);
  2312. {$endif statedebug}
  2313. destroyReg(curprop, tmpsupreg, true);
  2314. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2315. with curprop^.regs[tmpsupreg] Do
  2316. begin
  2317. typ := con_ref;
  2318. startmod := p;
  2319. nrOfMods := 1;
  2320. end
  2321. end;
  2322. {$ifdef StateDebug}
  2323. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2324. insertllitem(list,p,p.next,hp);
  2325. {$endif StateDebug}
  2326. end;
  2327. top_ref:
  2328. begin
  2329. readref(curprop, taicpu(p).oper[1]^.ref);
  2330. if taicpu(p).oper[0]^.typ = top_reg then
  2331. begin
  2332. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2333. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2334. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2335. taicpu(p);
  2336. end
  2337. else
  2338. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2339. end;
  2340. end;
  2341. top_Const:
  2342. begin
  2343. case taicpu(p).oper[1]^.typ Of
  2344. top_reg:
  2345. begin
  2346. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2347. {$ifdef statedebug}
  2348. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2349. insertllitem(list,p,p.next,hp);
  2350. {$endif statedebug}
  2351. With curprop^.regs[tmpsupreg] Do
  2352. begin
  2353. DestroyReg(curprop, tmpsupreg, true);
  2354. typ := Con_Const;
  2355. StartMod := p;
  2356. end
  2357. end;
  2358. top_ref:
  2359. begin
  2360. readref(curprop, taicpu(p).oper[1]^.ref);
  2361. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2362. end;
  2363. end;
  2364. end;
  2365. end;
  2366. end;
  2367. A_DIV, A_IDIV, A_MUL:
  2368. begin
  2369. ReadOp(curprop, taicpu(p).oper[0]^);
  2370. readreg(curprop,RS_EAX);
  2371. if (taicpu(p).OpCode = A_IDIV) or
  2372. (taicpu(p).OpCode = A_DIV) then
  2373. begin
  2374. readreg(curprop,RS_EDX);
  2375. end;
  2376. {$ifdef statedebug}
  2377. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2378. insertllitem(list,p,p.next,hp);
  2379. {$endif statedebug}
  2380. { DestroyReg(curprop, RS_EAX, true);}
  2381. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2382. taicpu(p), RS_EAX);
  2383. DestroyReg(curprop, RS_EDX, true);
  2384. LastFlagsChangeProp := curprop;
  2385. end;
  2386. A_IMUL:
  2387. begin
  2388. ReadOp(curprop,taicpu(p).oper[0]^);
  2389. if (taicpu(p).ops >= 2) then
  2390. ReadOp(curprop,taicpu(p).oper[1]^);
  2391. if (taicpu(p).ops <= 2) then
  2392. if (taicpu(p).ops=1) then
  2393. begin
  2394. readreg(curprop,RS_EAX);
  2395. {$ifdef statedebug}
  2396. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2397. insertllitem(list,p,p.next,hp);
  2398. {$endif statedebug}
  2399. { DestroyReg(curprop, RS_EAX, true); }
  2400. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2401. taicpu(p), RS_EAX);
  2402. DestroyReg(curprop,RS_EDX, true)
  2403. end
  2404. else
  2405. AddInstr2OpContents(
  2406. {$ifdef statedebug}list,{$endif}
  2407. taicpu(p), taicpu(p).oper[1]^)
  2408. else
  2409. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2410. taicpu(p), taicpu(p).oper[2]^);
  2411. LastFlagsChangeProp := curprop;
  2412. end;
  2413. A_LEA:
  2414. begin
  2415. readop(curprop,taicpu(p).oper[0]^);
  2416. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2417. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2418. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2419. else
  2420. begin
  2421. {$ifdef statedebug}
  2422. hp := tai_comment.Create(strpnew('destroying & initing'+
  2423. std_regname(taicpu(p).oper[1]^.reg)));
  2424. insertllitem(list,p,p.next,hp);
  2425. {$endif statedebug}
  2426. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2427. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2428. begin
  2429. typ := con_ref;
  2430. startmod := p;
  2431. nrOfMods := 1;
  2432. end
  2433. end;
  2434. end;
  2435. else
  2436. begin
  2437. Cnt := 1;
  2438. while (Cnt <= maxinschanges) and
  2439. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2440. begin
  2441. case InstrProp.Ch[Cnt] Of
  2442. Ch_REAX..Ch_REDI:
  2443. begin
  2444. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2445. readreg(curprop,tmpsupreg);
  2446. end;
  2447. Ch_WEAX..Ch_RWEDI:
  2448. begin
  2449. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2450. begin
  2451. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2452. readreg(curprop,tmpsupreg);
  2453. end;
  2454. {$ifdef statedebug}
  2455. hp := tai_comment.Create(strpnew('destroying '+
  2456. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2457. insertllitem(list,p,p.next,hp);
  2458. {$endif statedebug}
  2459. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2460. DestroyReg(curprop,tmpsupreg, true);
  2461. end;
  2462. Ch_MEAX..Ch_MEDI:
  2463. begin
  2464. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2465. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2466. taicpu(p),tmpsupreg);
  2467. end;
  2468. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2469. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2470. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2471. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2472. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2473. Ch_Wop1..Ch_RWop1:
  2474. begin
  2475. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2476. ReadOp(curprop, taicpu(p).oper[0]^);
  2477. DestroyOp(p, taicpu(p).oper[0]^);
  2478. end;
  2479. Ch_Mop1:
  2480. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2481. taicpu(p), taicpu(p).oper[0]^);
  2482. Ch_Wop2..Ch_RWop2:
  2483. begin
  2484. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2485. ReadOp(curprop, taicpu(p).oper[1]^);
  2486. DestroyOp(p, taicpu(p).oper[1]^);
  2487. end;
  2488. Ch_Mop2:
  2489. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2490. taicpu(p), taicpu(p).oper[1]^);
  2491. Ch_WOp3..Ch_RWOp3:
  2492. begin
  2493. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2494. ReadOp(curprop, taicpu(p).oper[2]^);
  2495. DestroyOp(p, taicpu(p).oper[2]^);
  2496. end;
  2497. Ch_Mop3:
  2498. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2499. taicpu(p), taicpu(p).oper[2]^);
  2500. Ch_WMemEDI:
  2501. begin
  2502. readreg(curprop, RS_EDI);
  2503. fillchar(tmpref, SizeOf(tmpref), 0);
  2504. tmpref.base := NR_EDI;
  2505. tmpref.index := NR_EDI;
  2506. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2507. end;
  2508. Ch_RFlags:
  2509. if assigned(LastFlagsChangeProp) then
  2510. LastFlagsChangeProp^.FlagsUsed := true;
  2511. Ch_WFlags:
  2512. LastFlagsChangeProp := curprop;
  2513. Ch_RWFlags:
  2514. begin
  2515. if assigned(LastFlagsChangeProp) then
  2516. LastFlagsChangeProp^.FlagsUsed := true;
  2517. LastFlagsChangeProp := curprop;
  2518. end;
  2519. Ch_FPU:;
  2520. else
  2521. begin
  2522. {$ifdef statedebug}
  2523. hp := tai_comment.Create(strpnew(
  2524. 'destroying all regs for prev instruction'));
  2525. insertllitem(list,p, p.next,hp);
  2526. {$endif statedebug}
  2527. DestroyAllRegs(curprop,true,true);
  2528. LastFlagsChangeProp := curprop;
  2529. end;
  2530. end;
  2531. inc(Cnt);
  2532. end
  2533. end;
  2534. end;
  2535. end;
  2536. end
  2537. else
  2538. begin
  2539. {$ifdef statedebug}
  2540. hp := tai_comment.Create(strpnew(
  2541. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2542. insertllitem(list,p, p.next,hp);
  2543. {$endif statedebug}
  2544. DestroyAllRegs(curprop,true,true);
  2545. end;
  2546. end;
  2547. inc(InstrCnt);
  2548. prev := p;
  2549. GetNextInstruction(p, p);
  2550. end;
  2551. end;
  2552. function tdfaobj.pass_2: boolean;
  2553. begin
  2554. if initdfapass2 then
  2555. begin
  2556. dodfapass2;
  2557. pass_2 := true
  2558. end
  2559. else
  2560. pass_2 := false;
  2561. end;
  2562. {$ifopt r+}
  2563. {$define rangewason}
  2564. {$r-}
  2565. {$endif}
  2566. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2567. begin
  2568. if (sym.labelnr >= lolab) and
  2569. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2570. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2571. else
  2572. getlabelwithsym := nil;
  2573. end;
  2574. {$ifdef rangewason}
  2575. {$r+}
  2576. {$undef rangewason}
  2577. {$endif}
  2578. procedure tdfaobj.clear;
  2579. begin
  2580. if labdif <> 0 then
  2581. begin
  2582. freemem(labeltable);
  2583. labeltable := nil;
  2584. end;
  2585. if assigned(taipropblock) then
  2586. begin
  2587. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2588. taipropblock := nil;
  2589. end;
  2590. end;
  2591. end.