cpubase.pas 8.4 KB

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  1. {
  2. $Id$
  3. Copyright (C) 2000 by Florian Klaempfl
  4. this unit implements an asmlistitem class for the iA-64 architecture
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cpubase;
  19. interface
  20. uses
  21. cutils,strings,systems,cobjects,globals,aasm,cpuinfo;
  22. type
  23. tasmop = (A_ADD,A_SUB,A_ADDP4,A_AND,A_ANDCM,A_OR,A_XOR,A_SHLADD,
  24. A_SHLADDP4,A_ADDS,A_ADDL,A_CMP,A_CMP4,A_PADD1,A_PADD2,
  25. A_PADD4,A_PSUB1,A_PSUB2,A_PSUB4,A_PAVG1,A_PAVG2,A_PAVGSUB1,
  26. A_PAVGSUB2,A_PCMP1,A_PCMP2,A_PCMP4,A_PSHLADD2,A_PSHRADD2,
  27. A_PMPY2,A_MIX1,A_MIX2,A_MIX4,A_PACK2,A_PACK4,A_UNPACK2,
  28. A_UNPACK4,A_PMIN1,A_PMAX1,A_PMIN2,A_PMAX2,A_PSAD1,A_MUX1,
  29. A_MUX2,A_PSHR2,A_PSHR4,A_SHR,A_PSHL2,A_SHL4,A_SHL,
  30. A_POPCNT,A_SHRP,A_EXTR,A_DEP,A_TBIT,A_TNAT,A_BREAK,
  31. A_NOP,A_CHK,A_MOV,A_ZX1,A_ZX2,A_ZXT4,A_SXT1,A_SXT2,A_SXT4,
  32. A_CXZ1,A_CZX2,A_LD1,A_LD2,A_LD4,A_LD8,A_ST1,A_ST2,A_ST4,
  33. A_ST8,A_LDFS,A_LDFD,A_LDF8,A_LDFE,A_LDF,A_STFS,A_STFD,A_STF8,
  34. A_STFE,A_STF,A_LDFPS,A_LDFPD,A_LDFP8,A_LFETCH,A_CMPXCHG1,
  35. A_CMPXCHG2,A_CMPXHG4,A_CMPXCHG8,A_XCHG1,A_XCHG2,A_XCHG4,
  36. A_XCHG8,A_FETCHADD4,A_FETCHADD8,A_SETF,A_GETF,
  37. A_INVALA,A_MF,A_SRLZ,A_SYNC,A_FLUSHRS,A_FC,A_ALLOC,A_SUM,
  38. A_RUM,A_BR,A_CLRRRB,A_FMA,A_FPMA,A_FMS,A_FPMS,A_FNMA,A_FPNMA,
  39. A_XMA,A_FSELECT,A_FCLASS,A_FRCPA,A_FPRCPA,A_FRSQRTA,
  40. A_FPRSQRTA,A_FMIN,A_FMAX,A_FAMIN,A_FAMAX,A_FPMIN,A_FPMAX,
  41. A_FPAMIN,A_FPAMAX,A_FPCMP,A_FMERGE,A_FMIX,A_FSXT,A_FPACK,
  42. A_FSWAP,A_FAND,A_FANDCM,A_FOR,A_FXOR,A_FPMERGE,A_FCVT,
  43. A_FPCVT,A_FSETC,A_FCLRT,A_FCHKF,A_MOVL);
  44. Const
  45. firstop = low(tasmop);
  46. lastop = high(tasmop);
  47. type
  48. TAsmCond = (C_NONE,C_LT,C_LTU,C_EQ,C_LT_UNC,C_LTU_UNC,C_EQ_UNC,
  49. C_EQ_AND,C_EQ_OR,C_EQ_OR_ANDCM,C_NE_AND,C_NE_OR);
  50. THint = (H_NONE,H_NT1,H_NT2,H_NTA);
  51. TLdStType = (LST_NONE,LST_S,LST_A,LSR_SA,LST_BIAS,LST_ACQ,LST_C_CLR,
  52. LST_FILL,LST_C_NC,LST_C_CLR_ACQ,LST_REL,
  53. LST_SPILL);
  54. Type
  55. TRegister = (R_NO, { R_NO is Mandatory, signifies no register }
  56. R_0,R_1,R_2,R_3,R_4,R_5,R_6,R_7,R_8,R_9,
  57. R_10,R_11,R_12,R_13,R_14,R_15,R_16,R_17,R_18,R_19,
  58. R_20,R_21,R_22,R_23,R_24,R_25,R_26,R_27,R_28,R_29,
  59. R_30,R_31,
  60. R_F0,R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7,R_F8,R_F9,
  61. R_F10,R_F11,R_F12,R_F13,R_F14,R_F15,R_F16,R_F17,R_F18,R_F19,
  62. R_F20,R_F21,R_F22,R_F23,R_F24,R_F25,R_F26,R_F27,R_F28,R_F29,
  63. R_F30,R_F31);
  64. TRegisterset = Set of TRegister;
  65. { -1 indicates no qualifying prediction }
  66. tqp = -1..63;
  67. const
  68. qp_none : tqp = -1;
  69. { Constants describing the registers }
  70. Const
  71. Firstreg = R_0;
  72. LastReg = R_F31;
  73. stack_pointer = R_30;
  74. frame_pointer = R_15;
  75. self_pointer = R_16;
  76. accumulator = R_0;
  77. global_pointer = R_29;
  78. return_pointer = R_26;
  79. { it is used to pass the offset to the destructor helper routine }
  80. vmt_offset_reg = R_1;
  81. max_scratch_regs = 2;
  82. scratch_regs : array[1..max_scratch_regs] of tregister = (R_1,R_2);
  83. { low and high of the available maximum width integer general purpose }
  84. { registers }
  85. LoGPReg = R_0;
  86. HiGPReg = R_31;
  87. { low and high of every possible width general purpose register (same as }
  88. { above on most architctures apart from the 80x86) }
  89. LoReg = R_0;
  90. HiReg = R_31;
  91. cpuflags = [cf_64bitaddr];
  92. { sizes }
  93. pointersize = 8;
  94. extended_size = 16;
  95. general_registers = [R_0..R_31];
  96. intregs = [R_0..R_31];
  97. fpuregs = [R_F0..R_F31];
  98. mmregs = [];
  99. availabletempregsint = [R_0..R_14,R_16..R_25,R_28];
  100. availabletempregsfpu = [R_F0..R_F30];
  101. availabletempregsmm = [];
  102. c_countusableregsint = 26;
  103. c_countusableregsfpu = 31;
  104. c_countusableregsmm = 0;
  105. maxfpuvarregs = 128;
  106. maxvarregs = 128;
  107. max_operands = 4;
  108. registers_saved_on_cdecl = [R_9..R_14,R_F2..R_F9];
  109. varregs : Array [1..6] of Tregister =
  110. (R_9,R_10,R_11,R_12,R_13,R_14);
  111. Type
  112. TReference = record
  113. offset : aword;
  114. symbol : pasmsymbol;
  115. base : tregister;
  116. is_immediate : boolean;
  117. offsetfixup : word; {needed for inline}
  118. { the boundary to which the reference is surely aligned }
  119. alignment : byte;
  120. end;
  121. PReference = ^TReference;
  122. tloc = (LOC_INVALID,
  123. LOC_REGISTER,
  124. LOC_FPU,
  125. LOC_MEM,
  126. LOC_REFERENCE,
  127. LOC_JUMP,
  128. { the alpha doesn't have flags, but this }
  129. { avoid some conditional compiling }
  130. { DON'T USE for the alpha }
  131. LOC_FLAGS,
  132. LOC_CREGISTER,
  133. LOC_CFPUREGISTER,
  134. LOC_CONST);
  135. tlocation = record
  136. case loc : tloc of
  137. LOC_REFERENCE,LOC_MEM : (reference : treference);
  138. LOC_CREGISTER,
  139. LOC_REGISTER : (register : tregister);
  140. LOC_FLAGS : (qp : tqp);
  141. LOC_JUMP : ();
  142. end;
  143. {*****************************************************************************
  144. Opcode propeties (needed for optimizer)
  145. *****************************************************************************}
  146. {$ifndef NOOPT}
  147. Type
  148. {What an instruction can change}
  149. TInsChange = (Ch_None);
  150. {$endif}
  151. { resets all values of ref to defaults }
  152. procedure reset_reference(var ref : treference);
  153. { set mostly used values of a new reference }
  154. function new_reference(base : tregister;offset : longint) : preference;
  155. function newreference(const r : treference) : preference;
  156. procedure disposereference(var r : preference);
  157. procedure set_location(var destloc : tlocation;const sourceloc : tlocation);
  158. function reg2str(r : tregister) : string;
  159. {*****************************************************************************
  160. Init/Done
  161. *****************************************************************************}
  162. procedure InitCpu;
  163. procedure DoneCpu;
  164. implementation
  165. uses
  166. verbose;
  167. function reg2str(r : tregister) : string;
  168. begin
  169. if r in [R_0..R_31] then
  170. reg2str:='R'+tostr(longint(r)-longint(R_0))
  171. else if r in [R_F0..R_F31] then
  172. reg2str:='F'+tostr(longint(r)-longint(R_F0))
  173. else internalerror(38991);
  174. end;
  175. procedure reset_reference(var ref : treference);
  176. begin
  177. FillChar(ref,sizeof(treference),0);
  178. end;
  179. function new_reference(base : tregister;offset : longint) : preference;
  180. var
  181. r : preference;
  182. begin
  183. new(r);
  184. FillChar(r^,sizeof(treference),0);
  185. r^.offset:=offset;
  186. r^.alignment:=8;
  187. new_reference:=r;
  188. end;
  189. function newreference(const r : treference) : preference;
  190. var
  191. p : preference;
  192. begin
  193. new(p);
  194. p^:=r;
  195. newreference:=p;
  196. end;
  197. procedure disposereference(var r : preference);
  198. begin
  199. dispose(r);
  200. r:=Nil;
  201. end;
  202. procedure set_location(var destloc : tlocation;const sourceloc : tlocation);
  203. begin
  204. destloc:=sourceloc;
  205. end;
  206. {*****************************************************************************
  207. Init/Done
  208. *****************************************************************************}
  209. procedure InitCpu;
  210. begin
  211. end;
  212. procedure DoneCpu;
  213. begin
  214. end;
  215. end.
  216. {
  217. $Log$
  218. Revision 1.2 2001-01-05 17:36:58 florian
  219. * the info about exception frames is stored now on the stack
  220. instead on the heap
  221. Revision 1.1 2000/12/31 16:54:19 florian
  222. + initial revision
  223. Revision 1.1 2000/07/13 06:30:11 michael
  224. + Initial import
  225. Revision 1.1 2000/07/09 10:40:12 peter
  226. * renamed to lowercase
  227. Revision 1.1 2000/03/09 20:28:00 florian
  228. * initial release derieved from the ALPHA cpubase.pas, the
  229. file still contains some ALPHA stuff
  230. }