cg386mat.pas 42 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl
  4. Generate i386 assembler for math nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cg386mat;
  19. {$i defines.inc}
  20. interface
  21. uses
  22. tree;
  23. procedure secondmoddiv(var p : ptree);
  24. procedure secondshlshr(var p : ptree);
  25. procedure secondunaryminus(var p : ptree);
  26. procedure secondnot(var p : ptree);
  27. implementation
  28. uses
  29. globtype,systems,
  30. cutils,cobjects,verbose,globals,
  31. symconst,symtable,aasm,types,
  32. hcodegen,temp_gen,pass_2,
  33. cpubase,cpuasm,
  34. {$ifdef dummy}
  35. end { this overcomes the annoying highlighting problem in my TP IDE,
  36. the IDE assumes i386asm start a asm block (FK) }
  37. {$endif}
  38. cgai386,tgeni386;
  39. {*****************************************************************************
  40. SecondModDiv
  41. *****************************************************************************}
  42. procedure secondmoddiv(var p : ptree);
  43. var
  44. hreg1 : tregister;
  45. hreg2 : tregister;
  46. shrdiv, andmod, pushed,popeax,popedx : boolean;
  47. power : longint;
  48. hl : pasmlabel;
  49. hloc : tlocation;
  50. pushedreg : tpushed;
  51. typename,opname : string[6];
  52. begin
  53. shrdiv := false;
  54. andmod := false;
  55. secondpass(p^.left);
  56. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  57. secondpass(p^.right);
  58. if pushed then
  59. restore(p^.left,is_64bitint(p^.left^.resulttype));
  60. set_location(p^.location,p^.left^.location);
  61. if is_64bitint(p^.resulttype) then
  62. begin
  63. { save p^.lcoation, because we change it now }
  64. set_location(hloc,p^.location);
  65. release_qword_loc(p^.location);
  66. release_qword_loc(p^.right^.location);
  67. p^.location.registerlow:=getexplicitregister32(R_EAX);
  68. p^.location.registerhigh:=getexplicitregister32(R_EDX);
  69. pushusedregisters(pushedreg,$ff
  70. and not($80 shr byte(p^.location.registerlow))
  71. and not($80 shr byte(p^.location.registerhigh)));
  72. { the left operand is in hloc, because the
  73. location of left is p^.location but p^.location
  74. is already destroyed
  75. }
  76. emit_pushq_loc(hloc);
  77. clear_location(hloc);
  78. emit_pushq_loc(p^.right^.location);
  79. if porddef(p^.resulttype)^.typ=u64bit then
  80. typename:='QWORD'
  81. else
  82. typename:='INT64';
  83. if p^.treetype=divn then
  84. opname:='DIV_'
  85. else
  86. opname:='MOD_';
  87. emitcall('FPC_'+opname+typename);
  88. emit_reg_reg(A_MOV,S_L,R_EAX,p^.location.registerlow);
  89. emit_reg_reg(A_MOV,S_L,R_EDX,p^.location.registerhigh);
  90. popusedregisters(pushedreg);
  91. p^.location.loc:=LOC_REGISTER;
  92. end
  93. else
  94. begin
  95. { put numerator in register }
  96. if p^.left^.location.loc<>LOC_REGISTER then
  97. begin
  98. if p^.left^.location.loc=LOC_CREGISTER then
  99. begin
  100. hreg1:=getregister32;
  101. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,hreg1);
  102. end
  103. else
  104. begin
  105. del_reference(p^.left^.location.reference);
  106. hreg1:=getregister32;
  107. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  108. hreg1);
  109. end;
  110. clear_location(p^.left^.location);
  111. p^.left^.location.loc:=LOC_REGISTER;
  112. p^.left^.location.register:=hreg1;
  113. end
  114. else hreg1:=p^.left^.location.register;
  115. if (p^.treetype=divn) and (p^.right^.treetype=ordconstn) and
  116. ispowerof2(p^.right^.value,power) then
  117. Begin
  118. shrdiv := true;
  119. {for signed numbers, the numerator must be adjusted before the
  120. shift instruction, but not wih unsigned numbers! Otherwise,
  121. "Cardinal($ffffffff) div 16" overflows! (JM)}
  122. If is_signed(p^.left^.resulttype) Then
  123. Begin
  124. If (aktOptProcessor <> class386) and
  125. not(CS_LittleSize in aktglobalswitches) then
  126. { use a sequence without jumps, saw this in
  127. comp.compilers (JM) }
  128. begin
  129. { no jumps, but more operations }
  130. if (hreg1 = R_EAX) and
  131. (R_EDX in unused) then
  132. begin
  133. hreg2 := getexplicitregister32(R_EDX);
  134. emit_none(A_CDQ,S_NO);
  135. end
  136. else
  137. begin
  138. {$ifndef noAllocEdi}
  139. getexplicitregister32(R_EDI);
  140. {$endif noAllocEdi}
  141. hreg2 := R_EDI;
  142. emit_reg_reg(A_MOV,S_L,hreg1,R_EDI);
  143. { if the left value is signed, R_EDI := $ffffffff,
  144. otherwise 0 }
  145. emit_const_reg(A_SAR,S_L,31,R_EDI);
  146. { if signed, R_EDI := right value-1, otherwise 0 }
  147. end;
  148. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg2);
  149. { add to the left value }
  150. emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
  151. { release EDX if we used it }
  152. {$ifndef noAllocEdi}
  153. { also releas EDI }
  154. ungetregister32(hreg2);
  155. {$else noAllocEdi}
  156. if (hreg2 = R_EDX) then
  157. ungetregister32(hreg2);
  158. {$endif noAllocEdi}
  159. { do the shift }
  160. emit_const_reg(A_SAR,S_L,power,hreg1);
  161. end
  162. else
  163. begin
  164. { a jump, but less operations }
  165. emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
  166. getlabel(hl);
  167. emitjmp(C_NS,hl);
  168. if power=1 then
  169. emit_reg(A_INC,S_L,hreg1)
  170. else
  171. emit_const_reg(A_ADD,S_L,p^.right^.value-1,hreg1);
  172. emitlab(hl);
  173. emit_const_reg(A_SAR,S_L,power,hreg1);
  174. end
  175. End
  176. Else
  177. emit_const_reg(A_SHR,S_L,power,hreg1);
  178. End
  179. else
  180. if (p^.treetype=modn) and (p^.right^.treetype=ordconstn) and
  181. ispowerof2(p^.right^.value,power) and Not(is_signed(p^.left^.resulttype)) Then
  182. {is there a similar trick for MOD'ing signed numbers? (JM)}
  183. Begin
  184. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg1);
  185. andmod := true;
  186. End
  187. else
  188. begin
  189. { bring denominator to EDI }
  190. { EDI is always free, it's }
  191. { only used for temporary }
  192. { purposes }
  193. {$ifndef noAllocEdi}
  194. getexplicitregister32(R_EDI);
  195. {$endif noAllocEdi}
  196. if (p^.right^.location.loc<>LOC_REGISTER) and
  197. (p^.right^.location.loc<>LOC_CREGISTER) then
  198. begin
  199. del_reference(p^.right^.location.reference);
  200. p^.left^.location.loc:=LOC_REGISTER;
  201. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),R_EDI);
  202. end
  203. else
  204. begin
  205. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,R_EDI);
  206. ungetregister32(p^.right^.location.register);
  207. end;
  208. popedx:=false;
  209. popeax:=false;
  210. if hreg1=R_EDX then
  211. begin
  212. if not(R_EAX in unused) then
  213. begin
  214. emit_reg(A_PUSH,S_L,R_EAX);
  215. popeax:=true;
  216. end;
  217. emit_reg_reg(A_MOV,S_L,R_EDX,R_EAX);
  218. end
  219. else
  220. begin
  221. if not(R_EDX in unused) then
  222. begin
  223. emit_reg(A_PUSH,S_L,R_EDX);
  224. popedx:=true;
  225. end;
  226. if hreg1<>R_EAX then
  227. begin
  228. if not(R_EAX in unused) then
  229. begin
  230. emit_reg(A_PUSH,S_L,R_EAX);
  231. popeax:=true;
  232. end;
  233. emit_reg_reg(A_MOV,S_L,hreg1,R_EAX);
  234. end;
  235. end;
  236. { sign extension depends on the left type }
  237. if porddef(p^.left^.resulttype)^.typ=u32bit then
  238. emit_reg_reg(A_XOR,S_L,R_EDX,R_EDX)
  239. else
  240. emit_none(A_CDQ,S_NO);
  241. { division depends on the right type }
  242. if porddef(p^.right^.resulttype)^.typ=u32bit then
  243. emit_reg(A_DIV,S_L,R_EDI)
  244. else
  245. emit_reg(A_IDIV,S_L,R_EDI);
  246. {$ifndef noAllocEdi}
  247. ungetregister32(R_EDI);
  248. {$endif noAllocEdi}
  249. if p^.treetype=divn then
  250. begin
  251. { if result register is busy then copy }
  252. if popeax then
  253. begin
  254. if hreg1=R_EAX then
  255. internalerror(112);
  256. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1)
  257. end
  258. else
  259. if hreg1<>R_EAX then
  260. Begin
  261. ungetregister32(hreg1);
  262. hreg1 := getexplicitregister32(R_EAX);
  263. { I don't think it's possible that now hreg1 <> R_EAX
  264. since popeax is false, but for all certainty I do
  265. support that situation (JM)}
  266. if hreg1 <> R_EAX then
  267. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1);
  268. end;
  269. end
  270. else
  271. {if we did the mod by an "and", the result is in hreg1 and
  272. EDX certainly hasn't been pushed (JM)}
  273. if not(andmod) Then
  274. if popedx then
  275. {the mod was done by an (i)div (so the result is now in
  276. edx), but edx was occupied prior to the division, so
  277. move the result into a safe place (JM)}
  278. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1)
  279. else
  280. Begin
  281. {Get rid of the unnecessary hreg1 if possible (same as with
  282. EAX in divn) (JM)}
  283. ungetregister32(hreg1);
  284. hreg1 := getexplicitregister32(R_EDX);
  285. if hreg1 <> R_EDX then
  286. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1);;
  287. End;
  288. if popeax then
  289. emit_reg(A_POP,S_L,R_EAX);
  290. if popedx then
  291. emit_reg(A_POP,S_L,R_EDX);
  292. end;
  293. If not(andmod or shrdiv) then
  294. {andmod and shrdiv only use hreg1 (which is already in usedinproc,
  295. since it was acquired with getregister), the others also use both
  296. EAX and EDX (JM)}
  297. Begin
  298. usedinproc:=usedinproc or ($80 shr byte(R_EAX));
  299. usedinproc:=usedinproc or ($80 shr byte(R_EDX));
  300. End;
  301. clear_location(p^.location);
  302. p^.location.loc:=LOC_REGISTER;
  303. p^.location.register:=hreg1;
  304. end;
  305. end;
  306. {*****************************************************************************
  307. SecondShlShr
  308. *****************************************************************************}
  309. procedure secondshlshr(var p : ptree);
  310. var
  311. hregister1,hregister2,hregister3,
  312. hregisterhigh,hregisterlow : tregister;
  313. pushed,popecx : boolean;
  314. op : tasmop;
  315. l1,l2,l3 : pasmlabel;
  316. begin
  317. popecx:=false;
  318. secondpass(p^.left);
  319. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  320. secondpass(p^.right);
  321. if pushed then
  322. restore(p^.left,is_64bitint(p^.left^.resulttype));
  323. if is_64bitint(p^.left^.resulttype) then
  324. begin
  325. { load left operator in a register }
  326. if p^.left^.location.loc<>LOC_REGISTER then
  327. begin
  328. if p^.left^.location.loc=LOC_CREGISTER then
  329. begin
  330. hregisterlow:=getregister32;
  331. hregisterhigh:=getregister32;
  332. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,
  333. hregisterlow);
  334. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,
  335. hregisterlow);
  336. end
  337. else
  338. begin
  339. del_reference(p^.left^.location.reference);
  340. hregisterlow:=getregister32;
  341. hregisterhigh:=getregister32;
  342. emit_mov_ref_reg64(p^.left^.location.reference,
  343. hregisterlow,
  344. hregisterhigh);
  345. end;
  346. end
  347. else
  348. begin
  349. hregisterlow:=p^.left^.location.registerlow;
  350. hregisterhigh:=p^.left^.location.registerhigh;
  351. end;
  352. { shifting by a constant directly coded: }
  353. if (p^.right^.treetype=ordconstn) then
  354. begin
  355. { shrd/shl works only for values <=31 !! }
  356. if p^.right^.value>31 then
  357. begin
  358. if p^.treetype=shln then
  359. begin
  360. emit_reg_reg(A_XOR,S_L,hregisterhigh,
  361. hregisterhigh);
  362. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  363. hregisterlow);
  364. end
  365. else
  366. begin
  367. emit_reg_reg(A_XOR,S_L,hregisterlow,
  368. hregisterlow);
  369. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  370. hregisterhigh);
  371. end;
  372. p^.location.registerhigh:=hregisterlow;
  373. p^.location.registerlow:=hregisterhigh;
  374. end
  375. else
  376. begin
  377. if p^.treetype=shln then
  378. begin
  379. emit_const_reg_reg(A_SHLD,S_L,p^.right^.value and 31,
  380. hregisterlow,hregisterhigh);
  381. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  382. hregisterlow);
  383. end
  384. else
  385. begin
  386. emit_const_reg_reg(A_SHRD,S_L,p^.right^.value and 31,
  387. hregisterhigh,hregisterlow);
  388. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  389. hregisterhigh);
  390. end;
  391. p^.location.registerlow:=hregisterlow;
  392. p^.location.registerhigh:=hregisterhigh;
  393. end;
  394. p^.location.loc:=LOC_REGISTER;
  395. end
  396. else
  397. begin
  398. { load right operators in a register }
  399. if p^.right^.location.loc<>LOC_REGISTER then
  400. begin
  401. if p^.right^.location.loc=LOC_CREGISTER then
  402. begin
  403. hregister2:=getexplicitregister32(R_ECX);
  404. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  405. hregister2);
  406. end
  407. else
  408. begin
  409. del_reference(p^.right^.location.reference);
  410. hregister2:=getexplicitregister32(R_ECX);
  411. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  412. hregister2);
  413. end;
  414. end
  415. else
  416. hregister2:=p^.right^.location.register;
  417. { left operator is already in a register }
  418. { hence are both in a register }
  419. { is it in the case ECX ? }
  420. if (hregisterlow=R_ECX) then
  421. begin
  422. { then only swap }
  423. emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
  424. hregister3:=hregisterlow;
  425. hregisterlow:=hregister2;
  426. hregister2:=hregister3;
  427. end
  428. else if (hregisterhigh=R_ECX) then
  429. begin
  430. { then only swap }
  431. emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
  432. hregister3:=hregisterhigh;
  433. hregisterhigh:=hregister2;
  434. hregister2:=hregister3;
  435. end
  436. { if second operator not in ECX ? }
  437. else if (hregister2<>R_ECX) then
  438. begin
  439. { ECX occupied then push it }
  440. if not (R_ECX in unused) then
  441. begin
  442. popecx:=true;
  443. emit_reg(A_PUSH,S_L,R_ECX);
  444. end;
  445. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  446. end;
  447. if hregister2 <> R_ECX then
  448. ungetregister32(hregister2);
  449. { the damned shift instructions work only til a count of 32 }
  450. { so we've to do some tricks here }
  451. if p^.treetype=shln then
  452. begin
  453. getlabel(l1);
  454. getlabel(l2);
  455. getlabel(l3);
  456. emit_const_reg(A_CMP,S_L,64,R_ECX);
  457. emitjmp(C_L,l1);
  458. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  459. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  460. emitjmp(C_None,l3);
  461. emitlab(l1);
  462. emit_const_reg(A_CMP,S_L,32,R_ECX);
  463. emitjmp(C_L,l2);
  464. emit_const_reg(A_SUB,S_L,32,R_ECX);
  465. emit_reg_reg(A_SHL,S_L,R_CL,
  466. hregisterlow);
  467. emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
  468. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  469. emitjmp(C_None,l3);
  470. emitlab(l2);
  471. emit_reg_reg_reg(A_SHLD,S_L,R_CL,
  472. hregisterlow,hregisterhigh);
  473. emit_reg_reg(A_SHL,S_L,R_CL,
  474. hregisterlow);
  475. emitlab(l3);
  476. end
  477. else
  478. begin
  479. getlabel(l1);
  480. getlabel(l2);
  481. getlabel(l3);
  482. emit_const_reg(A_CMP,S_L,64,R_ECX);
  483. emitjmp(C_L,l1);
  484. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  485. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  486. emitjmp(C_None,l3);
  487. emitlab(l1);
  488. emit_const_reg(A_CMP,S_L,32,R_ECX);
  489. emitjmp(C_L,l2);
  490. emit_const_reg(A_SUB,S_L,32,R_ECX);
  491. emit_reg_reg(A_SHR,S_L,R_CL,
  492. hregisterhigh);
  493. emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
  494. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  495. emitjmp(C_None,l3);
  496. emitlab(l2);
  497. emit_reg_reg_reg(A_SHRD,S_L,R_CL,
  498. hregisterhigh,hregisterlow);
  499. emit_reg_reg(A_SHR,S_L,R_CL,
  500. hregisterhigh);
  501. emitlab(l3);
  502. end;
  503. { maybe put ECX back }
  504. if popecx then
  505. emit_reg(A_POP,S_L,R_ECX)
  506. else ungetregister32(R_ECX);
  507. p^.location.registerlow:=hregisterlow;
  508. p^.location.registerhigh:=hregisterhigh;
  509. end;
  510. end
  511. else
  512. begin
  513. { load left operators in a register }
  514. if p^.left^.location.loc<>LOC_REGISTER then
  515. begin
  516. if p^.left^.location.loc=LOC_CREGISTER then
  517. begin
  518. hregister1:=getregister32;
  519. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,
  520. hregister1);
  521. end
  522. else
  523. begin
  524. del_reference(p^.left^.location.reference);
  525. hregister1:=getregister32;
  526. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  527. hregister1);
  528. end;
  529. end
  530. else
  531. hregister1:=p^.left^.location.register;
  532. { determine operator }
  533. if p^.treetype=shln then
  534. op:=A_SHL
  535. else
  536. op:=A_SHR;
  537. { shifting by a constant directly coded: }
  538. if (p^.right^.treetype=ordconstn) then
  539. begin
  540. { l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
  541. if p^.right^.value<=31 then
  542. }
  543. emit_const_reg(op,S_L,p^.right^.value and 31,
  544. hregister1);
  545. {
  546. else
  547. emit_reg_reg(A_XOR,S_L,hregister1,
  548. hregister1);
  549. }
  550. p^.location.loc:=LOC_REGISTER;
  551. p^.location.register:=hregister1;
  552. end
  553. else
  554. begin
  555. { load right operators in a register }
  556. if p^.right^.location.loc<>LOC_REGISTER then
  557. begin
  558. if p^.right^.location.loc=LOC_CREGISTER then
  559. begin
  560. hregister2:=getexplicitregister32(R_ECX);
  561. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  562. hregister2);
  563. end
  564. else
  565. begin
  566. del_reference(p^.right^.location.reference);
  567. hregister2:=getexplicitregister32(R_ECX);
  568. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  569. hregister2);
  570. end;
  571. end
  572. else
  573. hregister2:=p^.right^.location.register;
  574. { left operator is already in a register }
  575. { hence are both in a register }
  576. { is it in the case ECX ? }
  577. if (hregister1=R_ECX) then
  578. begin
  579. { then only swap }
  580. emit_reg_reg(A_XCHG,S_L,hregister1,hregister2);
  581. hregister3:=hregister1;
  582. hregister1:=hregister2;
  583. hregister2:=hregister3;
  584. end
  585. { if second operator not in ECX ? }
  586. else if (hregister2<>R_ECX) then
  587. begin
  588. { ECX occupied then push it }
  589. if not (R_ECX in unused) then
  590. begin
  591. popecx:=true;
  592. emit_reg(A_PUSH,S_L,R_ECX);
  593. end;
  594. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  595. end;
  596. ungetregister32(hregister2);
  597. { right operand is in ECX }
  598. emit_reg_reg(op,S_L,R_CL,hregister1);
  599. { maybe ECX back }
  600. if popecx then
  601. emit_reg(A_POP,S_L,R_ECX);
  602. p^.location.register:=hregister1;
  603. end;
  604. end;
  605. end;
  606. {*****************************************************************************
  607. SecondUnaryMinus
  608. *****************************************************************************}
  609. procedure secondunaryminus(var p : ptree);
  610. {$ifdef SUPPORT_MMX}
  611. procedure do_mmx_neg;
  612. var
  613. op : tasmop;
  614. begin
  615. p^.location.loc:=LOC_MMXREGISTER;
  616. if cs_mmx_saturation in aktlocalswitches then
  617. case mmx_type(p^.resulttype) of
  618. mmxs8bit:
  619. op:=A_PSUBSB;
  620. mmxu8bit:
  621. op:=A_PSUBUSB;
  622. mmxs16bit,mmxfixed16:
  623. op:=A_PSUBSW;
  624. mmxu16bit:
  625. op:=A_PSUBUSW;
  626. end
  627. else
  628. case mmx_type(p^.resulttype) of
  629. mmxs8bit,mmxu8bit:
  630. op:=A_PSUBB;
  631. mmxs16bit,mmxu16bit,mmxfixed16:
  632. op:=A_PSUBW;
  633. mmxs32bit,mmxu32bit:
  634. op:=A_PSUBD;
  635. end;
  636. emit_reg_reg(op,S_NO,p^.location.register,R_MM7);
  637. emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register);
  638. end;
  639. {$endif}
  640. begin
  641. if is_64bitint(p^.left^.resulttype) then
  642. begin
  643. secondpass(p^.left);
  644. clear_location(p^.location);
  645. p^.location.loc:=LOC_REGISTER;
  646. case p^.left^.location.loc of
  647. LOC_REGISTER :
  648. begin
  649. p^.location.registerlow:=p^.left^.location.registerlow;
  650. p^.location.registerhigh:=p^.left^.location.registerhigh;
  651. end;
  652. LOC_CREGISTER :
  653. begin
  654. p^.location.registerlow:=getregister32;
  655. p^.location.registerhigh:=getregister32;
  656. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  657. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  658. end;
  659. LOC_REFERENCE,LOC_MEM :
  660. begin
  661. del_reference(p^.left^.location.reference);
  662. p^.location.registerlow:=getregister32;
  663. p^.location.registerhigh:=getregister32;
  664. emit_mov_ref_reg64(p^.left^.location.reference,
  665. p^.location.registerlow,
  666. p^.location.registerhigh);
  667. end;
  668. end;
  669. {
  670. emit_reg(A_NEG,S_L,p^.location.registerlow);
  671. emit_const_reg(A_ADC,S_L,0,p^.location.registerhigh);
  672. emit_reg(A_NEG,S_L,p^.location.registerhigh);
  673. }
  674. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  675. emit_reg(A_NEG,S_L,p^.location.registerlow);
  676. emit_const_reg(A_SBB,S_L,-1,p^.location.registerhigh);
  677. end
  678. else
  679. begin
  680. secondpass(p^.left);
  681. p^.location.loc:=LOC_REGISTER;
  682. case p^.left^.location.loc of
  683. LOC_REGISTER:
  684. begin
  685. p^.location.register:=p^.left^.location.register;
  686. emit_reg(A_NEG,S_L,p^.location.register);
  687. end;
  688. LOC_CREGISTER:
  689. begin
  690. p^.location.register:=getregister32;
  691. emit_reg_reg(A_MOV,S_L,p^.location.register,
  692. p^.location.register);
  693. emit_reg(A_NEG,S_L,p^.location.register);
  694. end;
  695. {$ifdef SUPPORT_MMX}
  696. LOC_MMXREGISTER:
  697. begin
  698. set_location(p^.location,p^.left^.location);
  699. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  700. do_mmx_neg;
  701. end;
  702. LOC_CMMXREGISTER:
  703. begin
  704. p^.location.register:=getregistermmx;
  705. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  706. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,
  707. p^.location.register);
  708. do_mmx_neg;
  709. end;
  710. {$endif SUPPORT_MMX}
  711. LOC_REFERENCE,LOC_MEM:
  712. begin
  713. del_reference(p^.left^.location.reference);
  714. if (p^.left^.resulttype^.deftype=floatdef) and
  715. (pfloatdef(p^.left^.resulttype)^.typ<>f32bit) then
  716. begin
  717. p^.location.loc:=LOC_FPU;
  718. floatload(pfloatdef(p^.left^.resulttype)^.typ,
  719. p^.left^.location.reference);
  720. emit_none(A_FCHS,S_NO);
  721. end
  722. {$ifdef SUPPORT_MMX}
  723. else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  724. begin
  725. p^.location.register:=getregistermmx;
  726. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  727. emit_ref_reg(A_MOVQ,S_NO,
  728. newreference(p^.left^.location.reference),
  729. p^.location.register);
  730. do_mmx_neg;
  731. end
  732. {$endif SUPPORT_MMX}
  733. else
  734. begin
  735. p^.location.register:=getregister32;
  736. emit_ref_reg(A_MOV,S_L,
  737. newreference(p^.left^.location.reference),
  738. p^.location.register);
  739. emit_reg(A_NEG,S_L,p^.location.register);
  740. end;
  741. end;
  742. LOC_FPU:
  743. begin
  744. p^.location.loc:=LOC_FPU;
  745. emit_none(A_FCHS,S_NO);
  746. end;
  747. LOC_CFPUREGISTER:
  748. begin
  749. emit_reg(A_FLD,S_NO,
  750. correct_fpuregister(p^.left^.location.register,fpuvaroffset));
  751. inc(fpuvaroffset);
  752. p^.location.loc:=LOC_FPU;
  753. emit_none(A_FCHS,S_NO);
  754. end;
  755. end;
  756. end;
  757. { Here was a problem... }
  758. { Operand to be negated always }
  759. { seems to be converted to signed }
  760. { 32-bit before doing neg!! }
  761. { So this is useless... }
  762. { that's not true: -2^31 gives an overflow error if it is negaded (FK) }
  763. { emitoverflowcheck(p);}
  764. end;
  765. {*****************************************************************************
  766. SecondNot
  767. *****************************************************************************}
  768. procedure secondnot(var p : ptree);
  769. const
  770. flagsinvers : array[F_E..F_BE] of tresflags =
  771. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
  772. F_BE,F_B,F_AE,F_A);
  773. var
  774. hl : pasmlabel;
  775. opsize : topsize;
  776. begin
  777. if is_boolean(p^.resulttype) then
  778. begin
  779. opsize:=def_opsize(p^.resulttype);
  780. { the second pass could change the location of left }
  781. { if it is a register variable, so we've to do }
  782. { this before the case statement }
  783. if p^.left^.location.loc in [LOC_REFERENCE,LOC_MEM,
  784. LOC_FLAGS,LOC_REGISTER,LOC_CREGISTER] then
  785. secondpass(p^.left);
  786. case p^.left^.location.loc of
  787. LOC_JUMP :
  788. begin
  789. hl:=truelabel;
  790. truelabel:=falselabel;
  791. falselabel:=hl;
  792. secondpass(p^.left);
  793. maketojumpbool(p^.left);
  794. hl:=truelabel;
  795. truelabel:=falselabel;
  796. falselabel:=hl;
  797. end;
  798. LOC_FLAGS :
  799. p^.location.resflags:=flagsinvers[p^.left^.location.resflags];
  800. LOC_REGISTER :
  801. begin
  802. {p^.location.register:=p^.left^.location.register;
  803. emit_const_reg(A_XOR,opsize,1,p^.location.register);}
  804. p^.location.loc:=LOC_FLAGS;
  805. p^.location.resflags:=F_E;
  806. emit_reg_reg(A_TEST,opsize,
  807. p^.left^.location.register,p^.left^.location.register);
  808. ungetregister(p^.left^.location.register);
  809. end;
  810. LOC_CREGISTER :
  811. begin
  812. clear_location(p^.location);
  813. p^.location.loc:=LOC_REGISTER;
  814. p^.location.register:=def_getreg(p^.resulttype);
  815. emit_reg_reg(A_MOV,opsize,p^.left^.location.register,p^.location.register);
  816. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  817. ungetregister(p^.location.register);
  818. p^.location.loc:=LOC_FLAGS;
  819. p^.location.resflags:=F_E;
  820. end;
  821. LOC_REFERENCE,
  822. LOC_MEM :
  823. begin
  824. clear_location(p^.location);
  825. p^.location.loc:=LOC_REGISTER;
  826. del_reference(p^.left^.location.reference);
  827. { this was placed before del_ref => internaalerror(10) }
  828. p^.location.register:=def_getreg(p^.resulttype);
  829. emit_ref_reg(A_MOV,opsize,
  830. newreference(p^.left^.location.reference),p^.location.register);
  831. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  832. ungetregister(p^.location.register);
  833. p^.location.loc:=LOC_FLAGS;
  834. p^.location.resflags:=F_E;
  835. end;
  836. end;
  837. end
  838. {$ifdef SUPPORT_MMX}
  839. else
  840. if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  841. begin
  842. secondpass(p^.left);
  843. p^.location.loc:=LOC_MMXREGISTER;
  844. { prepare EDI }
  845. {$ifndef noAllocEdi}
  846. getexplicitregister32(R_EDI);
  847. {$endif noAllocEdi}
  848. emit_const_reg(A_MOV,S_L,$ffffffff,R_EDI);
  849. { load operand }
  850. case p^.left^.location.loc of
  851. LOC_MMXREGISTER:
  852. set_location(p^.location,p^.left^.location);
  853. LOC_CMMXREGISTER:
  854. begin
  855. p^.location.register:=getregistermmx;
  856. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,p^.location.register);
  857. end;
  858. LOC_REFERENCE,LOC_MEM:
  859. begin
  860. del_reference(p^.left^.location.reference);
  861. p^.location.register:=getregistermmx;
  862. emit_ref_reg(A_MOVQ,S_NO,
  863. newreference(p^.left^.location.reference),p^.location.register);
  864. end;
  865. end;
  866. { load mask }
  867. emit_reg_reg(A_MOVD,S_NO,R_EDI,R_MM7);
  868. {$ifndef noAllocEdi}
  869. ungetregister32(R_EDI);
  870. {$endif noAllocEdi}
  871. { lower 32 bit }
  872. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  873. { shift mask }
  874. emit_const_reg(A_PSLLQ,S_NO,32,R_MM7);
  875. { higher 32 bit }
  876. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  877. end
  878. {$endif SUPPORT_MMX}
  879. else if is_64bitint(p^.left^.resulttype) then
  880. begin
  881. secondpass(p^.left);
  882. clear_location(p^.location);
  883. p^.location.loc:=LOC_REGISTER;
  884. case p^.left^.location.loc of
  885. LOC_REGISTER :
  886. begin
  887. p^.location.registerlow:=p^.left^.location.registerlow;
  888. p^.location.registerhigh:=p^.left^.location.registerhigh;
  889. emit_reg(A_NOT,S_L,p^.location.registerlow);
  890. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  891. end;
  892. LOC_CREGISTER :
  893. begin
  894. p^.location.registerlow:=getregister32;
  895. p^.location.registerhigh:=getregister32;
  896. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  897. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  898. emit_reg(A_NOT,S_L,p^.location.registerlow);
  899. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  900. end;
  901. LOC_REFERENCE,LOC_MEM :
  902. begin
  903. del_reference(p^.left^.location.reference);
  904. p^.location.registerlow:=getregister32;
  905. p^.location.registerhigh:=getregister32;
  906. emit_mov_ref_reg64(p^.left^.location.reference,
  907. p^.location.registerlow,
  908. p^.location.registerhigh);
  909. emit_reg(A_NOT,S_L,p^.location.registerlow);
  910. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  911. end;
  912. end;
  913. end
  914. else
  915. begin
  916. secondpass(p^.left);
  917. clear_location(p^.location);
  918. p^.location.loc:=LOC_REGISTER;
  919. case p^.left^.location.loc of
  920. LOC_REGISTER :
  921. begin
  922. p^.location.register:=p^.left^.location.register;
  923. emit_reg(A_NOT,S_L,p^.location.register);
  924. end;
  925. LOC_CREGISTER :
  926. begin
  927. p^.location.register:=getregister32;
  928. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,p^.location.register);
  929. emit_reg(A_NOT,S_L,p^.location.register);
  930. end;
  931. LOC_REFERENCE,LOC_MEM :
  932. begin
  933. del_reference(p^.left^.location.reference);
  934. p^.location.register:=getregister32;
  935. emit_ref_reg(A_MOV,S_L,
  936. newreference(p^.left^.location.reference),p^.location.register);
  937. emit_reg(A_NOT,S_L,p^.location.register);
  938. end;
  939. end;
  940. end;
  941. end;
  942. end.
  943. {
  944. $Log$
  945. Revision 1.1 2000-10-14 10:14:57 peter
  946. * moehrendorf oct 2000 rewrite
  947. Revision 1.7 2000/09/24 21:19:49 peter
  948. * delphi compile fixes
  949. Revision 1.6 2000/09/18 10:15:48 jonas
  950. * fixed bug in flagsinvers array for unsigned flags (fixed web bug
  951. 1139, not 1135 like I mentioned in the fixes branch) (merged from fixes)
  952. Revision 1.5 2000/08/27 16:11:49 peter
  953. * moved some util functions from globals,cobjects to cutils
  954. * splitted files into finput,fmodule
  955. Revision 1.4 2000/07/28 13:28:25 jonas
  956. * fixed bug in secondshlshr where ecx was released too soon in some
  957. cases causing a combination of -Or and -dnewoptimizations to generate
  958. wrong code
  959. (merged from fixes branch and since in 1.1 -dnewoptimizations has
  960. been released, it always generated wrong code here when using -O2 or
  961. higher)
  962. Revision 1.3 2000/07/14 05:11:48 michael
  963. + Patch to 1.1
  964. Revision 1.2 2000/07/13 11:32:35 michael
  965. + removed logs
  966. }