daopt386.pas 74 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1997-98 by Jonas Maebe
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. {$ifDef TP}
  20. {$UnDef JumpAnal}
  21. {$Endif TP}
  22. Unit DAOpt386;
  23. Interface
  24. Uses
  25. GlobType,
  26. CObjects,Aasm,
  27. cpubase,cpuasm;
  28. Type
  29. TRegArray = Array[R_EAX..R_BL] of TRegister;
  30. TRegSet = Set of R_EAX..R_BL;
  31. TRegInfo = Record
  32. NewRegsEncountered, OldRegsEncountered: TRegSet;
  33. RegsLoadedForRef: TRegSet;
  34. New2OldReg: TRegArray;
  35. End;
  36. {possible actions on an operand: read, write or modify (= read & write)}
  37. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  38. {*********************** Procedures and Functions ************************}
  39. Procedure InsertLLItem(AsmL: PAasmOutput; prev, foll, new_one: PLinkedList_Item);
  40. Function Reg32(Reg: TRegister): TRegister;
  41. Function RefsEquivalent(Const R1, R2: TReference; Var RegInfo: TRegInfo; OpAct: TOpAction): Boolean;
  42. Function RefsEqual(Const R1, R2: TReference): Boolean;
  43. Function IsGP32Reg(Reg: TRegister): Boolean;
  44. Function RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
  45. Function RegInInstruction(Reg: TRegister; p1: Pai): Boolean;
  46. Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
  47. Function GetNextInstruction(Current: Pai; Var Next: Pai): Boolean;
  48. Function GetLastInstruction(Current: Pai; Var Last: Pai): Boolean;
  49. Procedure SkipHead(var P: Pai);
  50. Procedure UpdateUsedRegs(Var UsedRegs: TRegSet; p: Pai);
  51. Function RegsEquivalent(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo; OpAct: TopAction): Boolean;
  52. Function InstructionsEquivalent(p1, p2: Pai; Var RegInfo: TRegInfo): Boolean;
  53. Function OpsEqual(const o1,o2:toper): Boolean;
  54. Function DFAPass1(AsmL: PAasmOutput; BlockStart: Pai): Pai;
  55. Function DFAPass2(
  56. {$ifdef statedebug}
  57. AsmL: PAasmOutPut;
  58. {$endif statedebug}
  59. BlockStart, BlockEnd: Pai): Boolean;
  60. Procedure ShutDownDFA;
  61. Function FindLabel(L: PasmLabel; Var hp: Pai): Boolean;
  62. {******************************* Constants *******************************}
  63. Const
  64. {ait_* types which don't result in executable code or which don't influence
  65. the way the program runs/behaves}
  66. SkipInstr = [ait_comment, ait_align, ait_symbol
  67. {$ifdef GDB}
  68. ,ait_stabs, ait_stabn, ait_stab_function_name
  69. {$endif GDB}
  70. ,ait_regalloc, ait_tempalloc
  71. ];
  72. {Possible register content types}
  73. con_Unknown = 0;
  74. con_ref = 1;
  75. con_const = 2;
  76. {********************************* Types *********************************}
  77. type
  78. {the possible states of a flag}
  79. TFlagContents = (F_Unknown, F_NotSet, F_Set);
  80. TContent = Packed Record
  81. {start and end of block instructions that defines the
  82. content of this register. If Typ = con_const, then
  83. Longint(StartMod) = value of the constant)}
  84. StartMod: pai;
  85. {starts at 0, gets increased everytime the register is written to}
  86. WState: Byte;
  87. {starts at 0, gets increased everytime the register is read from}
  88. RState: Byte;
  89. {how many instructions starting with StarMod does the block consist of}
  90. NrOfMods: Byte;
  91. {the type of the content of the register: unknown, memory, constant}
  92. Typ: Byte;
  93. End;
  94. {Contents of the integer registers}
  95. TRegContent = Array[R_EAX..R_EDI] Of TContent;
  96. {contents of the FPU registers}
  97. TRegFPUContent = Array[R_ST..R_ST7] Of TContent;
  98. {information record with the contents of every register. Every Pai object
  99. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  100. TPaiProp = Record
  101. Regs: TRegContent;
  102. { FPURegs: TRegFPUContent;} {currently not yet used}
  103. {allocated Registers}
  104. UsedRegs: TRegSet;
  105. {status of the direction flag}
  106. DirFlag: TFlagContents;
  107. {can this instruction be removed?}
  108. CanBeRemoved: Boolean;
  109. End;
  110. PPaiProp = ^TPaiProp;
  111. {$IfNDef TP}
  112. TPaiPropBlock = Array[1..250000] Of TPaiProp;
  113. PPaiPropBlock = ^TPaiPropBlock;
  114. {$EndIf TP}
  115. TInstrSinceLastMod = Array[R_EAX..R_EDI] Of Byte;
  116. TLabelTableItem = Record
  117. PaiObj: Pai;
  118. {$IfDef JumpAnal}
  119. InstrNr: Longint;
  120. RefsFound: Word;
  121. JmpsProcessed: Word
  122. {$EndIf JumpAnal}
  123. End;
  124. {$IfDef tp}
  125. TLabelTable = Array[0..10000] Of TLabelTableItem;
  126. {$Else tp}
  127. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  128. {$Endif tp}
  129. PLabelTable = ^TLabelTable;
  130. {******************************* Variables *******************************}
  131. Var
  132. {the amount of PaiObjects in the current assembler list}
  133. NrOfPaiObjs: Longint;
  134. {$IfNDef TP}
  135. {Array which holds all TPaiProps}
  136. PaiPropBlock: PPaiPropBlock;
  137. {$EndIf TP}
  138. LoLab, HiLab, LabDif: Longint;
  139. LTable: PLabelTable;
  140. {*********************** End of Interface section ************************}
  141. Implementation
  142. Uses
  143. globals, systems, strings, verbose, hcodegen;
  144. Type
  145. TRefCompare = function(const r1, r2: TReference): Boolean;
  146. Var
  147. {How many instructions are between the current instruction and the last one
  148. that modified the register}
  149. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  150. {************************ Create the Label table ************************}
  151. Function FindLoHiLabels(Var LowLabel, HighLabel, LabelDif: Longint; BlockStart: Pai): Pai;
  152. {Walks through the paasmlist to find the lowest and highest label number}
  153. Var LabelFound: Boolean;
  154. P: Pai;
  155. Begin
  156. LabelFound := False;
  157. LowLabel := MaxLongint;
  158. HighLabel := 0;
  159. P := BlockStart;
  160. While Assigned(P) And
  161. ((P^.typ <> Ait_Marker) Or
  162. (Pai_Marker(P)^.Kind <> AsmBlockStart)) Do
  163. Begin
  164. If (Pai(p)^.typ = ait_label) Then
  165. If (Pai_Label(p)^.l^.is_used)
  166. Then
  167. Begin
  168. LabelFound := True;
  169. If (Pai_Label(p)^.l^.labelnr < LowLabel) Then
  170. LowLabel := Pai_Label(p)^.l^.labelnr;
  171. If (Pai_Label(p)^.l^.labelnr > HighLabel) Then
  172. HighLabel := Pai_Label(p)^.l^.labelnr;
  173. End;
  174. GetNextInstruction(p, p);
  175. End;
  176. FindLoHiLabels := p;
  177. If LabelFound
  178. Then LabelDif := HighLabel+1-LowLabel
  179. Else LabelDif := 0;
  180. End;
  181. Function FindRegAlloc(Reg: TRegister; StartPai: Pai): Boolean;
  182. {Returns true if a ait_alloc object for Reg is found in the block of Pai's
  183. starting with StartPai and ending with the next "real" instruction}
  184. Begin
  185. FindRegAlloc:=False;
  186. Repeat
  187. While Assigned(StartPai) And
  188. ((StartPai^.typ in (SkipInstr - [ait_regAlloc])) Or
  189. ((StartPai^.typ = ait_label) and
  190. Not(Pai_Label(StartPai)^.l^.Is_Used))) Do
  191. StartPai := Pai(StartPai^.Next);
  192. If Assigned(StartPai) And
  193. (StartPai^.typ = ait_regAlloc) and (PairegAlloc(StartPai)^.allocation) Then
  194. Begin
  195. if PairegAlloc(StartPai)^.Reg = Reg then
  196. begin
  197. FindRegAlloc:=true;
  198. exit;
  199. end;
  200. StartPai := Pai(StartPai^.Next);
  201. End
  202. else
  203. exit;
  204. Until false;
  205. End;
  206. Procedure BuildLabelTableAndFixRegAlloc(AsmL: PAasmOutput; Var LabelTable: PLabelTable; LowLabel: Longint;
  207. Var LabelDif: Longint; BlockStart, BlockEnd: Pai);
  208. {Builds a table with the locations of the labels in the paasmoutput.
  209. Also fixes some RegDeallocs like "# %eax released; push (%eax)"}
  210. Var p, hp1, hp2: Pai;
  211. UsedRegs: TRegSet;
  212. Begin
  213. UsedRegs := [];
  214. If (LabelDif <> 0) Then
  215. Begin
  216. {$IfDef TP}
  217. If (MaxAvail >= LabelDif*SizeOf(Pai))
  218. Then
  219. Begin
  220. {$EndIf TP}
  221. GetMem(LabelTable, LabelDif*SizeOf(TLabelTableItem));
  222. FillChar(LabelTable^, LabelDif*SizeOf(TLabelTableItem), 0);
  223. p := BlockStart;
  224. While (P <> BlockEnd) Do
  225. Begin
  226. Case p^.typ Of
  227. ait_Label:
  228. If Pai_Label(p)^.l^.is_used Then
  229. LabelTable^[Pai_Label(p)^.l^.labelnr-LowLabel].PaiObj := p;
  230. ait_regAlloc:
  231. begin
  232. if PairegAlloc(p)^.Allocation then
  233. Begin
  234. If Not(PaiRegAlloc(p)^.Reg in UsedRegs) Then
  235. UsedRegs := UsedRegs + [PaiRegAlloc(p)^.Reg]
  236. Else
  237. Begin
  238. hp1 := p;
  239. hp2 := nil;
  240. While GetLastInstruction(hp1, hp1) And
  241. Not(RegInInstruction(PaiRegAlloc(p)^.Reg, hp1)) Do
  242. hp2 := hp1;
  243. If hp2 <> nil Then
  244. Begin
  245. hp1 := New(PaiRegAlloc, DeAlloc(PaiRegAlloc(p)^.Reg));
  246. InsertLLItem(AsmL, Pai(hp2^.previous), hp2, hp1);
  247. End;
  248. End;
  249. End
  250. else
  251. Begin
  252. UsedRegs := UsedRegs - [PaiRegAlloc(p)^.Reg];
  253. hp1 := p;
  254. hp2 := nil;
  255. While Not(FindRegAlloc(PaiRegAlloc(p)^.Reg, Pai(hp1^.Next))) And
  256. GetNextInstruction(hp1, hp1) And
  257. RegInInstruction(PaiRegAlloc(p)^.Reg, hp1) Do
  258. hp2 := hp1;
  259. If hp2 <> nil Then
  260. Begin
  261. hp1 := Pai(p^.previous);
  262. AsmL^.Remove(p);
  263. InsertLLItem(AsmL, hp2, Pai(hp2^.Next), p);
  264. p := hp1;
  265. End;
  266. End;
  267. end;
  268. End;
  269. P := Pai(p^.Next);
  270. While Assigned(p) And
  271. (p^.typ in (SkipInstr - [ait_regalloc])) Do
  272. P := Pai(P^.Next);
  273. End;
  274. {$IfDef TP}
  275. End
  276. Else LabelDif := 0;
  277. {$EndIf TP}
  278. End;
  279. End;
  280. {************************ Search the Label table ************************}
  281. Function FindLabel(L: PasmLabel; Var hp: Pai): Boolean;
  282. {searches for the specified label starting from hp as long as the
  283. encountered instructions are labels, to be able to optimize constructs like
  284. jne l2 jmp l2
  285. jmp l3 and l1:
  286. l1: l2:
  287. l2:}
  288. Var TempP: Pai;
  289. Begin
  290. TempP := hp;
  291. While Assigned(TempP) and
  292. (TempP^.typ In SkipInstr + [ait_label]) Do
  293. If (TempP^.typ <> ait_Label) Or
  294. (pai_label(TempP)^.l <> L)
  295. Then GetNextInstruction(TempP, TempP)
  296. Else
  297. Begin
  298. hp := TempP;
  299. FindLabel := True;
  300. exit
  301. End;
  302. FindLabel := False;
  303. End;
  304. {************************ Some general functions ************************}
  305. Function Reg32(Reg: TRegister): TRegister;
  306. {Returns the 32 bit component of Reg if it exists, otherwise Reg is returned}
  307. Begin
  308. Reg32 := Reg;
  309. If (Reg >= R_AX)
  310. Then
  311. If (Reg <= R_DI)
  312. Then Reg32 := Reg16ToReg32(Reg)
  313. Else
  314. If (Reg <= R_BL)
  315. Then Reg32 := Reg8toReg32(Reg);
  316. End;
  317. { inserts new_one between prev and foll }
  318. Procedure InsertLLItem(AsmL: PAasmOutput; prev, foll, new_one: PLinkedList_Item);
  319. Begin
  320. If Assigned(prev) Then
  321. If Assigned(foll) Then
  322. Begin
  323. If Assigned(new_one) Then
  324. Begin
  325. new_one^.previous := prev;
  326. new_one^.next := foll;
  327. prev^.next := new_one;
  328. foll^.previous := new_one;
  329. Pai(new_one)^.fileinfo := Pai(foll)^.fileinfo;
  330. End;
  331. End
  332. Else AsmL^.Concat(new_one)
  333. Else If Assigned(Foll) Then AsmL^.Insert(new_one)
  334. End;
  335. {********************* Compare parts of Pai objects *********************}
  336. Function RegsSameSize(Reg1, Reg2: TRegister): Boolean;
  337. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  338. 8bit, 16bit or 32bit)}
  339. Begin
  340. If (Reg1 <= R_EDI)
  341. Then RegsSameSize := (Reg2 <= R_EDI)
  342. Else
  343. If (Reg1 <= R_DI)
  344. Then RegsSameSize := (Reg2 in [R_AX..R_DI])
  345. Else
  346. If (Reg1 <= R_BL)
  347. Then RegsSameSize := (Reg2 in [R_AL..R_BL])
  348. Else RegsSameSize := False
  349. End;
  350. Procedure AddReg2RegInfo(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo);
  351. {updates the ???RegsEncountered and ???2???Reg fields of RegInfo. Assumes that
  352. OldReg and NewReg have the same size (has to be chcked in advance with
  353. RegsSameSize) and that neither equals R_NO}
  354. Begin
  355. With RegInfo Do
  356. Begin
  357. NewRegsEncountered := NewRegsEncountered + [NewReg];
  358. OldRegsEncountered := OldRegsEncountered + [OldReg];
  359. New2OldReg[NewReg] := OldReg;
  360. Case OldReg Of
  361. R_EAX..R_EDI:
  362. Begin
  363. NewRegsEncountered := NewRegsEncountered + [Reg32toReg16(NewReg)];
  364. OldRegsEncountered := OldRegsEncountered + [Reg32toReg16(OldReg)];
  365. New2OldReg[Reg32toReg16(NewReg)] := Reg32toReg16(OldReg);
  366. If (NewReg in [R_EAX..R_EBX]) And
  367. (OldReg in [R_EAX..R_EBX]) Then
  368. Begin
  369. NewRegsEncountered := NewRegsEncountered + [Reg32toReg8(NewReg)];
  370. OldRegsEncountered := OldRegsEncountered + [Reg32toReg8(OldReg)];
  371. New2OldReg[Reg32toReg8(NewReg)] := Reg32toReg8(OldReg);
  372. End;
  373. End;
  374. R_AX..R_DI:
  375. Begin
  376. NewRegsEncountered := NewRegsEncountered + [Reg16toReg32(NewReg)];
  377. OldRegsEncountered := OldRegsEncountered + [Reg16toReg32(OldReg)];
  378. New2OldReg[Reg16toReg32(NewReg)] := Reg16toReg32(OldReg);
  379. If (NewReg in [R_AX..R_BX]) And
  380. (OldReg in [R_AX..R_BX]) Then
  381. Begin
  382. NewRegsEncountered := NewRegsEncountered + [Reg16toReg8(NewReg)];
  383. OldRegsEncountered := OldRegsEncountered + [Reg16toReg8(OldReg)];
  384. New2OldReg[Reg16toReg8(NewReg)] := Reg16toReg8(OldReg);
  385. End;
  386. End;
  387. R_AL..R_BL:
  388. Begin
  389. NewRegsEncountered := NewRegsEncountered + [Reg8toReg32(NewReg)]
  390. + [Reg8toReg16(NewReg)];
  391. OldRegsEncountered := OldRegsEncountered + [Reg8toReg32(OldReg)]
  392. + [Reg8toReg16(OldReg)];
  393. New2OldReg[Reg8toReg32(NewReg)] := Reg8toReg32(OldReg);
  394. End;
  395. End;
  396. End;
  397. End;
  398. Procedure AddOp2RegInfo(const o:Toper; Var RegInfo: TRegInfo);
  399. Begin
  400. Case o.typ Of
  401. Top_Reg:
  402. If (o.reg <> R_NO) Then
  403. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  404. Top_Ref:
  405. Begin
  406. If o.ref^.base <> R_NO Then
  407. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  408. If o.ref^.index <> R_NO Then
  409. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  410. End;
  411. End;
  412. End;
  413. Function RegsEquivalent(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo; OPAct: TOpAction): Boolean;
  414. Begin
  415. If Not((OldReg = R_NO) Or (NewReg = R_NO)) Then
  416. If RegsSameSize(OldReg, NewReg) Then
  417. With RegInfo Do
  418. {here we always check for the 32 bit component, because it is possible that
  419. the 8 bit component has not been set, event though NewReg already has been
  420. processed. This happens if it has been compared with a register that doesn't
  421. have an 8 bit component (such as EDI). In that case the 8 bit component is
  422. still set to R_NO and the comparison in the Else-part will fail}
  423. If (Reg32(OldReg) in OldRegsEncountered) Then
  424. If (Reg32(NewReg) in NewRegsEncountered) Then
  425. RegsEquivalent := (OldReg = New2OldReg[NewReg])
  426. { If we haven't encountered the new register yet, but we have encountered the
  427. old one already, the new one can only be correct if it's being written to
  428. (and consequently the old one is also being written to), otherwise
  429. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  430. movl (%eax), %eax movl (%edx), %edx
  431. are considered equivalent}
  432. Else
  433. If (OpAct = OpAct_Write) Then
  434. Begin
  435. AddReg2RegInfo(OldReg, NewReg, RegInfo);
  436. RegsEquivalent := True
  437. End
  438. Else Regsequivalent := False
  439. Else
  440. If Not(Reg32(NewReg) in NewRegsEncountered) Then
  441. Begin
  442. AddReg2RegInfo(OldReg, NewReg, RegInfo);
  443. RegsEquivalent := True
  444. End
  445. Else RegsEquivalent := False
  446. Else RegsEquivalent := False
  447. Else RegsEquivalent := OldReg = NewReg
  448. End;
  449. Function RefsEquivalent(Const R1, R2: TReference; var RegInfo: TRegInfo; OpAct: TOpAction): Boolean;
  450. Begin
  451. If R1.is_immediate Then
  452. RefsEquivalent := R2.is_immediate and (R1.Offset = R2.Offset)
  453. Else
  454. RefsEquivalent := (R1.Offset+R1.OffsetFixup = R2.Offset+R2.OffsetFixup) And
  455. RegsEquivalent(R1.Base, R2.Base, RegInfo, OpAct) And
  456. RegsEquivalent(R1.Index, R2.Index, RegInfo, OpAct) And
  457. (R1.Segment = R2.Segment) And (R1.ScaleFactor = R2.ScaleFactor) And
  458. (R1.Symbol = R2.Symbol);
  459. End;
  460. Function RefsEqual(Const R1, R2: TReference): Boolean;
  461. Begin
  462. If R1.is_immediate Then
  463. RefsEqual := R2.is_immediate and (R1.Offset = R2.Offset)
  464. Else
  465. RefsEqual := (R1.Offset+R1.OffsetFixup = R2.Offset+R2.OffsetFixup) And
  466. (R1.Segment = R2.Segment) And (R1.Base = R2.Base) And
  467. (R1.Index = R2.Index) And (R1.ScaleFactor = R2.ScaleFactor) And
  468. (R1.Symbol=R2.Symbol);
  469. End;
  470. Function IsGP32Reg(Reg: TRegister): Boolean;
  471. {Checks if the register is a 32 bit general purpose register}
  472. Begin
  473. If (Reg >= R_EAX) and (Reg <= R_EBX)
  474. Then IsGP32Reg := True
  475. Else IsGP32reg := False
  476. End;
  477. Function RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
  478. Begin {checks whether Ref contains a reference to Reg}
  479. Reg := Reg32(Reg);
  480. RegInRef := (Ref.Base = Reg) Or (Ref.Index = Reg)
  481. End;
  482. Function RegInInstruction(Reg: TRegister; p1: Pai): Boolean;
  483. {checks if Reg is used by the instruction p1}
  484. Var Counter: Longint;
  485. TmpResult: Boolean;
  486. Begin
  487. TmpResult := False;
  488. If (Pai(p1)^.typ = ait_instruction) Then
  489. Begin
  490. Reg := Reg32(Reg);
  491. Counter := 0;
  492. Repeat
  493. Case Paicpu(p1)^.oper[Counter].typ Of
  494. Top_Reg: TmpResult := Reg = Reg32(Paicpu(p1)^.oper[Counter].reg);
  495. Top_Ref: TmpResult := RegInRef(Reg, Paicpu(p1)^.oper[Counter].ref^);
  496. End;
  497. Inc(Counter)
  498. Until (Counter = 3) or TmpResult;
  499. End;
  500. RegInInstruction := TmpResult
  501. End;
  502. {Function RegInOp(Reg: TRegister; const o:toper): Boolean;
  503. Begin
  504. RegInOp := False;
  505. Case opt Of
  506. top_reg: RegInOp := Reg = o.reg;
  507. top_ref: RegInOp := (Reg = o.ref^.Base) Or
  508. (Reg = o.ref^.Index);
  509. End;
  510. End;}
  511. Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
  512. {returns true if Reg is modified by the instruction p1. P1 is assumed to be
  513. of the type ait_instruction}
  514. Var hp: Pai;
  515. Begin
  516. If GetLastInstruction(p1, hp)
  517. Then
  518. RegModifiedByInstruction :=
  519. PPAiProp(p1^.OptInfo)^.Regs[Reg].WState <>
  520. PPAiProp(hp^.OptInfo)^.Regs[Reg].WState
  521. Else RegModifiedByInstruction := True;
  522. End;
  523. {********************* GetNext and GetLastInstruction *********************}
  524. Function GetNextInstruction(Current: Pai; Var Next: Pai): Boolean;
  525. {skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the
  526. next pai object in Next. Returns false if there isn't any}
  527. Begin
  528. Repeat
  529. If (Current^.typ = ait_marker) And
  530. (Pai_Marker(Current)^.Kind = AsmBlockStart) Then
  531. Begin
  532. GetNextInstruction := False;
  533. Next := Nil;
  534. Exit
  535. End;
  536. Current := Pai(Current^.Next);
  537. While Assigned(Current) And
  538. ((Current^.typ In SkipInstr) or
  539. ((Current^.typ = ait_label) And
  540. Not(Pai_Label(Current)^.l^.is_used))) Do
  541. Current := Pai(Current^.Next);
  542. If Assigned(Current) And
  543. (Current^.typ = ait_Marker) And
  544. (Pai_Marker(Current)^.Kind = NoPropInfoStart) Then
  545. Begin
  546. While Assigned(Current) And
  547. ((Current^.typ <> ait_Marker) Or
  548. (Pai_Marker(Current)^.Kind <> NoPropInfoEnd)) Do
  549. Current := Pai(Current^.Next);
  550. End;
  551. Until Not(Assigned(Current)) Or
  552. (Current^.typ <> ait_Marker) Or
  553. (Pai_Marker(Current)^.Kind <> NoPropInfoEnd);
  554. Next := Current;
  555. If Assigned(Current) And
  556. Not((Current^.typ In SkipInstr) or
  557. ((Current^.typ = ait_label) And
  558. Not(Pai_Label(Current)^.l^.is_used)))
  559. Then GetNextInstruction := True
  560. Else
  561. Begin
  562. GetNextInstruction := False;
  563. Next := Nil;
  564. End;
  565. End;
  566. Function GetLastInstruction(Current: Pai; Var Last: Pai): Boolean;
  567. {skips the ait-types in SkipInstr puts the previous pai object in
  568. Last. Returns false if there isn't any}
  569. Begin
  570. Repeat
  571. Current := Pai(Current^.previous);
  572. While Assigned(Current) And
  573. (((Current^.typ = ait_Marker) And
  574. Not(Pai_Marker(Current)^.Kind in [AsmBlockEnd,NoPropInfoEnd])) or
  575. (Current^.typ In SkipInstr) or
  576. ((Current^.typ = ait_label) And
  577. Not(Pai_Label(Current)^.l^.is_used))) Do
  578. Current := Pai(Current^.previous);
  579. If Assigned(Current) And
  580. (Current^.typ = ait_Marker) And
  581. (Pai_Marker(Current)^.Kind = NoPropInfoEnd) Then
  582. Begin
  583. While Assigned(Current) And
  584. ((Current^.typ <> ait_Marker) Or
  585. (Pai_Marker(Current)^.Kind <> NoPropInfoStart)) Do
  586. Current := Pai(Current^.previous);
  587. End;
  588. Until Not(Assigned(Current)) Or
  589. (Current^.typ <> ait_Marker) Or
  590. (Pai_Marker(Current)^.Kind <> NoPropInfoStart);
  591. If Not(Assigned(Current)) or
  592. (Current^.typ In SkipInstr) or
  593. ((Current^.typ = ait_label) And
  594. Not(Pai_Label(Current)^.l^.is_used)) or
  595. ((Current^.typ = ait_Marker) And
  596. (Pai_Marker(Current)^.Kind = AsmBlockEnd))
  597. Then
  598. Begin
  599. Last := Nil;
  600. GetLastInstruction := False
  601. End
  602. Else
  603. Begin
  604. Last := Current;
  605. GetLastInstruction := True;
  606. End;
  607. End;
  608. Procedure SkipHead(var P: Pai);
  609. Var OldP: Pai;
  610. Begin
  611. Repeat
  612. OldP := P;
  613. If (P^.typ in SkipInstr) Or
  614. ((P^.typ = ait_marker) And
  615. (Pai_Marker(P)^.Kind = AsmBlockEnd)) Then
  616. GetNextInstruction(P, P)
  617. Else If ((P^.Typ = Ait_Marker) And
  618. (Pai_Marker(P)^.Kind = NoPropInfoStart)) Then
  619. {a marker of the NoPropInfoStart can't be the first instruction of a
  620. paasmoutput list}
  621. GetNextInstruction(Pai(P^.Previous),P);
  622. If (P^.Typ = Ait_Marker) And
  623. (Pai_Marker(P)^.Kind = AsmBlockStart) Then
  624. Begin
  625. P := Pai(P^.Next);
  626. While (P^.typ <> Ait_Marker) Or
  627. (Pai_Marker(P)^.Kind <> AsmBlockEnd) Do
  628. P := Pai(P^.Next)
  629. End;
  630. Until P = OldP
  631. End;
  632. {******************* The Data Flow Analyzer functions ********************}
  633. Procedure UpdateUsedRegs(Var UsedRegs: TRegSet; p: Pai);
  634. {updates UsedRegs with the RegAlloc Information coming after P}
  635. Begin
  636. Repeat
  637. While Assigned(p) And
  638. ((p^.typ in (SkipInstr - [ait_RegAlloc])) or
  639. ((p^.typ = ait_label) And
  640. Not(Pai_Label(p)^.l^.is_used))) Do
  641. p := Pai(p^.next);
  642. While Assigned(p) And
  643. (p^.typ=ait_RegAlloc) Do
  644. Begin
  645. if pairegalloc(p)^.allocation then
  646. UsedRegs := UsedRegs + [PaiRegAlloc(p)^.Reg]
  647. else
  648. UsedRegs := UsedRegs - [PaiRegAlloc(p)^.Reg];
  649. p := pai(p^.next);
  650. End;
  651. Until Not(Assigned(p)) Or
  652. (Not(p^.typ in SkipInstr) And
  653. Not((p^.typ = ait_label) And
  654. Not(Pai_Label(p)^.l^.is_used)));
  655. End;
  656. (*Function FindZeroreg(p: Pai; Var Result: TRegister): Boolean;
  657. {Finds a register which contains the constant zero}
  658. Var Counter: TRegister;
  659. Begin
  660. Counter := R_EAX;
  661. FindZeroReg := True;
  662. While (Counter <= R_EDI) And
  663. ((PPaiProp(p^.OptInfo)^.Regs[Counter].Typ <> Con_Const) or
  664. (PPaiProp(p^.OptInfo)^.Regs[Counter].StartMod <> Pointer(0))) Do
  665. Inc(Byte(Counter));
  666. If (PPaiProp(p^.OptInfo)^.Regs[Counter].Typ = Con_Const) And
  667. (PPaiProp(p^.OptInfo)^.Regs[Counter].StartMod = Pointer(0))
  668. Then Result := Counter
  669. Else FindZeroReg := False;
  670. End;*)
  671. Function TCh2Reg(Ch: TInsChange): TRegister;
  672. {converts a TChange variable to a TRegister}
  673. Begin
  674. If (Ch <= Ch_REDI) Then
  675. TCh2Reg := TRegister(Byte(Ch))
  676. Else
  677. If (Ch <= Ch_WEDI) Then
  678. TCh2Reg := TRegister(Byte(Ch) - Byte(Ch_REDI))
  679. Else
  680. If (Ch <= Ch_RWEDI) Then
  681. TCh2Reg := TRegister(Byte(Ch) - Byte(Ch_WEDI))
  682. Else
  683. If (Ch <= Ch_MEDI) Then
  684. TCh2Reg := TRegister(Byte(Ch) - Byte(Ch_RWEDI))
  685. Else InternalError($db)
  686. End;
  687. Procedure IncState(Var S: Byte);
  688. {Increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  689. errors}
  690. Begin
  691. If (s <> $ff)
  692. Then Inc(s)
  693. Else s := 0
  694. End;
  695. Function RegInSequence(Reg: TRegister; Const Content: TContent): Boolean;
  696. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  697. Pai objects) to see whether Reg is used somewhere, without it being loaded
  698. with something else first}
  699. Var p: Pai;
  700. Counter: Byte;
  701. TmpResult: Boolean;
  702. RegsChecked: TRegSet;
  703. Begin
  704. RegsChecked := [];
  705. p := Content.StartMod;
  706. TmpResult := False;
  707. Counter := 1;
  708. While Not(TmpResult) And
  709. (Counter <= Content.NrOfMods) Do
  710. Begin
  711. If (p^.typ = ait_instruction) and
  712. ((Paicpu(p)^.opcode = A_MOV) or
  713. (Paicpu(p)^.opcode = A_MOVZX) or
  714. (Paicpu(p)^.opcode = A_MOVSX))
  715. Then
  716. Begin
  717. If (Paicpu(p)^.oper[0].typ = top_ref) Then
  718. With Paicpu(p)^.oper[0].ref^ Do
  719. If (Base = procinfo^.FramePointer) And
  720. (Index = R_NO)
  721. Then
  722. Begin
  723. RegsChecked := RegsChecked + [Reg32(Paicpu(p)^.oper[1].reg)];
  724. If Reg = Reg32(Paicpu(p)^.oper[1].reg) Then
  725. Break;
  726. End
  727. Else
  728. Begin
  729. If (Base = Reg) And
  730. Not(Base In RegsChecked)
  731. Then TmpResult := True;
  732. If Not(TmpResult) And
  733. (Index = Reg) And
  734. Not(Index In RegsChecked)
  735. Then TmpResult := True;
  736. End
  737. End
  738. Else TmpResult := RegInInstruction(Reg, p);
  739. Inc(Counter);
  740. GetNextInstruction(p,p)
  741. End;
  742. RegInSequence := TmpResult
  743. End;
  744. Procedure DestroyReg(p1: PPaiProp; Reg: TRegister);
  745. {Destroys the contents of the register Reg in the PPaiProp p1, as well as the
  746. contents of registers are loaded with a memory location based on Reg}
  747. Var TmpWState, TmpRState: Byte;
  748. Counter: TRegister;
  749. Begin
  750. Reg := Reg32(Reg);
  751. NrOfInstrSinceLastMod[Reg] := 0;
  752. If (Reg >= R_EAX) And (Reg <= R_EDI)
  753. Then
  754. Begin
  755. With p1^.Regs[Reg] Do
  756. Begin
  757. IncState(WState);
  758. TmpWState := WState;
  759. TmpRState := RState;
  760. FillChar(p1^.Regs[Reg], SizeOf(TContent), 0);
  761. WState := TmpWState;
  762. RState := TmpRState;
  763. End;
  764. For Counter := R_EAX to R_EDI Do
  765. With p1^.Regs[Counter] Do
  766. If (Typ = Con_Ref) And
  767. RegInSequence(Reg, p1^.Regs[Counter])
  768. Then
  769. Begin
  770. IncState(WState);
  771. TmpWState := WState;
  772. TmpRState := RState;
  773. FillChar(p1^.Regs[Counter], SizeOf(TContent), 0);
  774. WState := TmpWState;
  775. RState := TmpRState;
  776. End;
  777. End;
  778. End;
  779. {Procedure AddRegsToSet(p: Pai; Var RegSet: TRegSet);
  780. Begin
  781. If (p^.typ = ait_instruction) Then
  782. Begin
  783. Case Paicpu(p)^.oper[0].typ Of
  784. top_reg:
  785. If Not(Paicpu(p)^.oper[0].reg in [R_NO,R_ESP,procinfo^.FramePointer]) Then
  786. RegSet := RegSet + [Paicpu(p)^.oper[0].reg];
  787. top_ref:
  788. With TReference(Paicpu(p)^.oper[0]^) Do
  789. Begin
  790. If Not(Base in [procinfo^.FramePointer,R_NO,R_ESP])
  791. Then RegSet := RegSet + [Base];
  792. If Not(Index in [procinfo^.FramePointer,R_NO,R_ESP])
  793. Then RegSet := RegSet + [Index];
  794. End;
  795. End;
  796. Case Paicpu(p)^.oper[1].typ Of
  797. top_reg:
  798. If Not(Paicpu(p)^.oper[1].reg in [R_NO,R_ESP,procinfo^.FramePointer]) Then
  799. If RegSet := RegSet + [TRegister(TwoWords(Paicpu(p)^.oper[1]).Word1];
  800. top_ref:
  801. With TReference(Paicpu(p)^.oper[1]^) Do
  802. Begin
  803. If Not(Base in [procinfo^.FramePointer,R_NO,R_ESP])
  804. Then RegSet := RegSet + [Base];
  805. If Not(Index in [procinfo^.FramePointer,R_NO,R_ESP])
  806. Then RegSet := RegSet + [Index];
  807. End;
  808. End;
  809. End;
  810. End;}
  811. Function OpsEquivalent(const o1, o2: toper; Var RegInfo: TRegInfo; OpAct: TopAction): Boolean;
  812. Begin {checks whether the two ops are equivalent}
  813. OpsEquivalent := False;
  814. if o1.typ=o2.typ then
  815. Case o1.typ Of
  816. Top_Reg:
  817. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, RegInfo, OpAct);
  818. Top_Ref:
  819. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, RegInfo, OpAct);
  820. Top_Const:
  821. OpsEquivalent := o1.val = o2.val;
  822. Top_None:
  823. OpsEquivalent := True
  824. End;
  825. End;
  826. Function OpsEqual(const o1,o2:toper): Boolean;
  827. Begin {checks whether the two ops are equal}
  828. OpsEqual := False;
  829. if o1.typ=o2.typ then
  830. Case o1.typ Of
  831. Top_Reg :
  832. OpsEqual:=o1.reg=o2.reg;
  833. Top_Ref :
  834. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  835. Top_Const :
  836. OpsEqual:=o1.val=o2.val;
  837. Top_Symbol :
  838. OpsEqual:=(o1.sym=o2.sym) and (o1.symofs=o2.symofs);
  839. Top_None :
  840. OpsEqual := True
  841. End;
  842. End;
  843. Function InstructionsEquivalent(p1, p2: Pai; Var RegInfo: TRegInfo): Boolean;
  844. {$ifdef csdebug}
  845. var hp: pai;
  846. {$endif csdebug}
  847. Begin {checks whether two Paicpu instructions are equal}
  848. If Assigned(p1) And Assigned(p2) And
  849. (Pai(p1)^.typ = ait_instruction) And
  850. (Pai(p1)^.typ = ait_instruction) And
  851. (Paicpu(p1)^.opcode = Paicpu(p2)^.opcode) And
  852. (Paicpu(p1)^.oper[0].typ = Paicpu(p2)^.oper[0].typ) And
  853. (Paicpu(p1)^.oper[1].typ = Paicpu(p2)^.oper[1].typ) And
  854. (Paicpu(p1)^.oper[2].typ = Paicpu(p2)^.oper[2].typ)
  855. Then
  856. {both instructions have the same structure:
  857. "<operator> <operand of type1>, <operand of type 2>"}
  858. If ((Paicpu(p1)^.opcode = A_MOV) or
  859. (Paicpu(p1)^.opcode = A_MOVZX) or
  860. (Paicpu(p1)^.opcode = A_MOVSX)) And
  861. (Paicpu(p1)^.oper[0].typ = top_ref) {then .oper[1]t = top_reg} Then
  862. If Not(RegInRef(Paicpu(p1)^.oper[1].reg, Paicpu(p1)^.oper[0].ref^)) Then
  863. {the "old" instruction is a load of a register with a new value, not with
  864. a value based on the contents of this register (so no "mov (reg), reg")}
  865. If Not(RegInRef(Paicpu(p2)^.oper[1].reg, Paicpu(p2)^.oper[0].ref^)) And
  866. RefsEqual(Paicpu(p1)^.oper[0].ref^, Paicpu(p2)^.oper[0].ref^)
  867. Then
  868. {the "new" instruction is also a load of a register with a new value, and
  869. this value is fetched from the same memory location}
  870. Begin
  871. With Paicpu(p2)^.oper[0].ref^ Do
  872. Begin
  873. If Not(Base in [procinfo^.FramePointer, R_NO, R_ESP])
  874. {it won't do any harm if the register is already in RegsLoadedForRef}
  875. Then RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Base];
  876. If Not(Index in [procinfo^.FramePointer, R_NO, R_ESP])
  877. Then RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Index];
  878. End;
  879. {add the registers from the reference (.oper[0]) to the RegInfo, all registers
  880. from the reference are the same in the old and in the new instruction
  881. sequence}
  882. AddOp2RegInfo(Paicpu(p1)^.oper[0], RegInfo);
  883. {the registers from .oper[1] have to be equivalent, but not necessarily equal}
  884. InstructionsEquivalent :=
  885. RegsEquivalent(Paicpu(p1)^.oper[1].reg, Paicpu(p2)^.oper[1].reg, RegInfo, OpAct_Write);
  886. End
  887. {the registers are loaded with values from different memory locations. If
  888. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  889. would be considered equivalent}
  890. Else InstructionsEquivalent := False
  891. Else
  892. {load register with a value based on the current value of this register}
  893. Begin
  894. With Paicpu(p2)^.oper[0].ref^ Do
  895. Begin
  896. If Not(Base in [procinfo^.FramePointer,
  897. Reg32(Paicpu(p2)^.oper[1].reg),R_NO,R_ESP])
  898. {it won't do any harm if the register is already in RegsLoadedForRef}
  899. Then
  900. Begin
  901. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Base];
  902. {$ifdef csdebug}
  903. Writeln(att_reg2str[base], ' added');
  904. {$endif csdebug}
  905. end;
  906. If Not(Index in [procinfo^.FramePointer,
  907. Reg32(Paicpu(p2)^.oper[1].reg),R_NO,R_ESP])
  908. Then
  909. Begin
  910. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Index];
  911. {$ifdef csdebug}
  912. Writeln(att_reg2str[index], ' added');
  913. {$endif csdebug}
  914. end;
  915. End;
  916. If Not(Reg32(Paicpu(p2)^.oper[1].reg) In [procinfo^.FramePointer,R_NO,R_ESP])
  917. Then
  918. Begin
  919. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  920. [Reg32(Paicpu(p2)^.oper[1].reg)];
  921. {$ifdef csdebug}
  922. Writeln(att_reg2str[Reg32(Paicpu(p2)^.oper[1].reg)], ' removed');
  923. {$endif csdebug}
  924. end;
  925. InstructionsEquivalent :=
  926. OpsEquivalent(Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0], RegInfo, OpAct_Read) And
  927. OpsEquivalent(Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1], RegInfo, OpAct_Write)
  928. End
  929. Else
  930. {an instruction <> mov, movzx, movsx}
  931. begin
  932. {$ifdef csdebug}
  933. hp := new(pai_asm_comment,init(strpnew('checking if equivalent')));
  934. hp^.previous := p2;
  935. hp^.next := p2^.next;
  936. p2^.next^.previous := hp;
  937. p2^.next := hp;
  938. {$endif csdebug}
  939. InstructionsEquivalent :=
  940. OpsEquivalent(Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0], RegInfo, OpAct_Unknown) And
  941. OpsEquivalent(Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1], RegInfo, OpAct_Unknown) And
  942. OpsEquivalent(Paicpu(p1)^.oper[2], Paicpu(p2)^.oper[2], RegInfo, OpAct_Unknown)
  943. end
  944. {the instructions haven't even got the same structure, so they're certainly
  945. not equivalent}
  946. Else
  947. begin
  948. {$ifdef csdebug}
  949. hp := new(pai_asm_comment,init(strpnew('different opcodes/format')));
  950. hp^.previous := p2;
  951. hp^.next := p2^.next;
  952. p2^.next^.previous := hp;
  953. p2^.next := hp;
  954. {$endif csdebug}
  955. InstructionsEquivalent := False;
  956. end;
  957. {$ifdef csdebug}
  958. hp := new(pai_asm_comment,init(strpnew('instreq: '+tostr(byte(instructionsequivalent)))));
  959. hp^.previous := p2;
  960. hp^.next := p2^.next;
  961. p2^.next^.previous := hp;
  962. p2^.next := hp;
  963. {$endif csdebug}
  964. End;
  965. (*
  966. Function InstructionsEqual(p1, p2: Pai): Boolean;
  967. Begin {checks whether two Paicpu instructions are equal}
  968. InstructionsEqual :=
  969. Assigned(p1) And Assigned(p2) And
  970. ((Pai(p1)^.typ = ait_instruction) And
  971. (Pai(p1)^.typ = ait_instruction) And
  972. (Paicpu(p1)^.opcode = Paicpu(p2)^.opcode) And
  973. (Paicpu(p1)^.oper[0].typ = Paicpu(p2)^.oper[0].typ) And
  974. (Paicpu(p1)^.oper[1].typ = Paicpu(p2)^.oper[1].typ) And
  975. OpsEqual(Paicpu(p1)^.oper[0].typ, Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0]) And
  976. OpsEqual(Paicpu(p1)^.oper[1].typ, Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1]))
  977. End;
  978. *)
  979. Procedure ReadReg(p: PPaiProp; Reg: TRegister);
  980. Begin
  981. Reg := Reg32(Reg);
  982. If Reg in [R_EAX..R_EDI] Then
  983. IncState(p^.Regs[Reg].RState)
  984. End;
  985. Procedure ReadRef(p: PPaiProp; Ref: PReference);
  986. Begin
  987. If Ref^.Base <> R_NO Then
  988. ReadReg(p, Ref^.Base);
  989. If Ref^.Index <> R_NO Then
  990. ReadReg(p, Ref^.Index);
  991. End;
  992. Procedure ReadOp(P: PPaiProp;const o:toper);
  993. Begin
  994. Case o.typ Of
  995. top_reg: ReadReg(P, o.reg);
  996. top_ref: ReadRef(P, o.ref);
  997. top_symbol : ;
  998. End;
  999. End;
  1000. Function RefInInstruction(Const Ref: TReference; p: Pai;
  1001. RefsEq: TRefCompare): Boolean;
  1002. {checks whehter Ref is used in P}
  1003. Var TmpResult: Boolean;
  1004. Begin
  1005. TmpResult := False;
  1006. If (p^.typ = ait_instruction) Then
  1007. Begin
  1008. If (Paicpu(p)^.oper[0].typ = Top_Ref) Then
  1009. TmpResult := RefsEq(Ref, Paicpu(p)^.oper[0].ref^);
  1010. If Not(TmpResult) And (Paicpu(p)^.oper[1].typ = Top_Ref) Then
  1011. TmpResult := RefsEq(Ref, Paicpu(p)^.oper[1].ref^);
  1012. If Not(TmpResult) And (Paicpu(p)^.oper[2].typ = Top_Ref) Then
  1013. TmpResult := RefsEq(Ref, Paicpu(p)^.oper[2].ref^);
  1014. End;
  1015. RefInInstruction := TmpResult;
  1016. End;
  1017. Function RefInSequence(Const Ref: TReference; Content: TContent;
  1018. RefsEq: TRefCompare): Boolean;
  1019. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1020. Pai objects) to see whether Ref is used somewhere}
  1021. Var p: Pai;
  1022. Counter: Byte;
  1023. TmpResult: Boolean;
  1024. Begin
  1025. p := Content.StartMod;
  1026. TmpResult := False;
  1027. Counter := 1;
  1028. While Not(TmpResult) And
  1029. (Counter <= Content.NrOfMods) Do
  1030. Begin
  1031. If (p^.typ = ait_instruction) And
  1032. RefInInstruction(Ref, p, RefsEq)
  1033. Then TmpResult := True;
  1034. Inc(Counter);
  1035. GetNextInstruction(p,p)
  1036. End;
  1037. RefInSequence := TmpResult
  1038. End;
  1039. Function ArrayRefsEq(const r1, r2: TReference): Boolean;{$ifdef tp}far;{$endif}
  1040. Begin
  1041. ArrayRefsEq := (R1.Offset+R1.OffsetFixup = R2.Offset+R2.OffsetFixup) And
  1042. (R1.Segment = R2.Segment) And
  1043. (R1.Symbol=R2.Symbol) And
  1044. ((Assigned(R1.Symbol)) Or
  1045. (R1.Base = R2.Base))
  1046. End;
  1047. Procedure DestroyRefs(p: pai; Const Ref: TReference; WhichReg: TRegister);
  1048. {destroys all registers which possibly contain a reference to Ref, WhichReg
  1049. is the register whose contents are being written to memory (if this proc
  1050. is called because of a "mov?? %reg, (mem)" instruction)}
  1051. Var RefsEq: TRefCompare;
  1052. Counter: TRegister;
  1053. Begin
  1054. WhichReg := Reg32(WhichReg);
  1055. If (Ref.base = procinfo^.FramePointer) or
  1056. Assigned(Ref.Symbol) Then
  1057. Begin
  1058. If (Ref.Index = R_NO) And
  1059. (Not(Assigned(Ref.Symbol)) or
  1060. (Ref.base = R_NO)) Then
  1061. { local variable which is not an array }
  1062. RefsEq := {$ifdef fpc}@{$endif}RefsEqual
  1063. Else
  1064. { local variable which is an array }
  1065. RefsEq := {$ifdef fpc}@{$endif}ArrayRefsEq;
  1066. {write something to a parameter, a local or global variable, so
  1067. * with uncertain optimizations on:
  1068. - destroy the contents of registers whose contents have somewhere a
  1069. "mov?? (Ref), %reg". WhichReg (this is the register whose contents
  1070. are being written to memory) is not destroyed if it's StartMod is
  1071. of that form and NrOfMods = 1 (so if it holds ref, but is not a
  1072. pointer based on Ref)
  1073. * with uncertain optimizations off:
  1074. - also destroy registers that contain any pointer}
  1075. For Counter := R_EAX to R_EDI Do
  1076. With PPaiProp(p^.OptInfo)^.Regs[Counter] Do
  1077. Begin
  1078. If (typ = Con_Ref) And
  1079. ((Not(cs_UncertainOpts in aktglobalswitches) And
  1080. (NrOfMods <> 1)
  1081. ) Or
  1082. (RefInSequence(Ref,PPaiProp(p^.OptInfo)^.Regs[Counter],RefsEq) And
  1083. ((Counter <> WhichReg) Or
  1084. ((NrOfMods <> 1) And
  1085. {StarMod is always of the type ait_instruction}
  1086. (Paicpu(StartMod)^.oper[0].typ = top_ref) And
  1087. RefsEq(Paicpu(StartMod)^.oper[0].ref^, Ref)
  1088. )
  1089. )
  1090. )
  1091. )
  1092. Then
  1093. DestroyReg(PPaiProp(p^.OptInfo), Counter)
  1094. End
  1095. End
  1096. Else
  1097. {write something to a pointer location, so
  1098. * with uncertain optimzations on:
  1099. - do not destroy registers which contain a local/global variable or a
  1100. parameter, except if DestroyRefs is called because of a "movsl"
  1101. * with uncertain optimzations off:
  1102. - destroy every register which contains a memory location
  1103. }
  1104. For Counter := R_EAX to R_EDI Do
  1105. With PPaiProp(p^.OptInfo)^.Regs[Counter] Do
  1106. If (typ = Con_Ref) And
  1107. (Not(cs_UncertainOpts in aktglobalswitches) Or
  1108. {for movsl}
  1109. (Ref.Base = R_EDI) Or
  1110. {don't destroy if reg contains a parameter, local or global variable}
  1111. Not((NrOfMods = 1) And
  1112. (Paicpu(StartMod)^.oper[0].typ = top_ref) And
  1113. ((Paicpu(StartMod)^.oper[0].ref^.base = procinfo^.FramePointer) Or
  1114. Assigned(Paicpu(StartMod)^.oper[0].ref^.Symbol)
  1115. )
  1116. )
  1117. )
  1118. Then DestroyReg(PPaiProp(p^.OptInfo), Counter)
  1119. End;
  1120. Procedure DestroyAllRegs(p: PPaiProp);
  1121. Var Counter: TRegister;
  1122. Begin {initializes/desrtoys all registers}
  1123. For Counter := R_EAX To R_EDI Do
  1124. Begin
  1125. ReadReg(p, Counter);
  1126. DestroyReg(p, Counter);
  1127. End;
  1128. p^.DirFlag := F_Unknown;
  1129. End;
  1130. Procedure DestroyOp(PaiObj: Pai; const o:Toper);
  1131. Begin
  1132. Case o.typ Of
  1133. top_reg: DestroyReg(PPaiProp(PaiObj^.OptInfo), o.reg);
  1134. top_ref:
  1135. Begin
  1136. ReadRef(PPaiProp(PaiObj^.OptInfo), o.ref);
  1137. DestroyRefs(PaiObj, o.ref^, R_NO);
  1138. End;
  1139. top_symbol:;
  1140. End;
  1141. End;
  1142. Function DFAPass1(AsmL: PAasmOutput; BlockStart: Pai): Pai;
  1143. {gathers the RegAlloc data... still need to think about where to store it to
  1144. avoid global vars}
  1145. Var BlockEnd: Pai;
  1146. Begin
  1147. BlockEnd := FindLoHiLabels(LoLab, HiLab, LabDif, BlockStart);
  1148. BuildLabelTableAndFixRegAlloc(AsmL, LTable, LoLab, LabDif, BlockStart, BlockEnd);
  1149. DFAPass1 := BlockEnd;
  1150. End;
  1151. {$ifdef arithopt}
  1152. Procedure AddInstr2RegContents({$ifdef statedebug} asml: paasmoutput; {$endif}
  1153. p: paicpu; reg: TRegister);
  1154. {$ifdef statedebug}
  1155. var hp: pai;
  1156. {$endif statedebug}
  1157. Begin
  1158. Reg := Reg32(Reg);
  1159. With PPaiProp(p^.optinfo)^.Regs[reg] Do
  1160. If (Typ = Con_Ref)
  1161. Then
  1162. Begin
  1163. IncState(WState);
  1164. {also store how many instructions are part of the sequence in the first
  1165. instructions PPaiProp, so it can be easily accessed from within
  1166. CheckSequence}
  1167. Inc(NrOfMods, NrOfInstrSinceLastMod[Reg]);
  1168. PPaiProp(Pai(StartMod)^.OptInfo)^.Regs[Reg].NrOfMods := NrOfMods;
  1169. NrOfInstrSinceLastMod[Reg] := 0;
  1170. {$ifdef StateDebug}
  1171. hp := new(pai_asm_comment,init(strpnew(att_reg2str[reg]+': '+tostr(PPaiProp(p^.optinfo)^.Regs[reg].WState)
  1172. + ' -- ' + tostr(PPaiProp(p^.optinfo)^.Regs[reg].nrofmods))));
  1173. InsertLLItem(AsmL, p, p^.next, hp);
  1174. {$endif StateDebug}
  1175. End
  1176. Else
  1177. Begin
  1178. DestroyReg(PPaiProp(p^.optinfo), Reg);
  1179. {$ifdef StateDebug}
  1180. hp := new(pai_asm_comment,init(strpnew(att_reg2str[reg]+': '+tostr(PPaiProp(p^.optinfo)^.Regs[reg].WState))));
  1181. InsertLLItem(AsmL, p, p^.next, hp);
  1182. {$endif StateDebug}
  1183. End
  1184. End;
  1185. Procedure AddInstr2OpContents({$ifdef statedebug} asml: paasmoutput; {$endif}
  1186. p: paicpu; const oper: TOper);
  1187. Begin
  1188. If oper.typ = top_reg Then
  1189. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, oper.reg)
  1190. Else
  1191. Begin
  1192. ReadOp(PPaiProp(p^.optinfo), oper);
  1193. DestroyOp(p, oper);
  1194. End
  1195. End;
  1196. {$endif arithopt}
  1197. Procedure DoDFAPass2(
  1198. {$Ifdef StateDebug}
  1199. AsmL: PAasmOutput;
  1200. {$endif statedebug}
  1201. BlockStart, BlockEnd: Pai);
  1202. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  1203. contents for the instructions starting with p. Returns the last pai which has
  1204. been processed}
  1205. Var
  1206. CurProp: PPaiProp;
  1207. {$ifdef AnalyzeLoops}
  1208. TmpState: Byte;
  1209. {$endif AnalyzeLoops}
  1210. Cnt, InstrCnt : Longint;
  1211. InstrProp: TInsProp;
  1212. UsedRegs: TRegSet;
  1213. p, hp : Pai;
  1214. TmpRef: TReference;
  1215. TmpReg: TRegister;
  1216. Begin
  1217. p := BlockStart;
  1218. UsedRegs := [];
  1219. UpdateUsedregs(UsedRegs, p);
  1220. SkipHead(P);
  1221. BlockStart := p;
  1222. InstrCnt := 1;
  1223. FillChar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  1224. While (P <> BlockEnd) Do
  1225. Begin
  1226. {$IfDef TP}
  1227. New(CurProp);
  1228. {$Else TP}
  1229. CurProp := @PaiPropBlock^[InstrCnt];
  1230. {$EndIf TP}
  1231. If (p <> BlockStart)
  1232. Then
  1233. Begin
  1234. {$ifdef JumpAnal}
  1235. If (p^.Typ <> ait_label) Then
  1236. {$endif JumpAnal}
  1237. Begin
  1238. GetLastInstruction(p, hp);
  1239. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1240. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1241. End
  1242. End
  1243. Else
  1244. Begin
  1245. FillChar(CurProp^, SizeOf(CurProp^), 0);
  1246. { For TmpReg := R_EAX to R_EDI Do
  1247. CurProp^.Regs[TmpReg].WState := 1;}
  1248. End;
  1249. CurProp^.UsedRegs := UsedRegs;
  1250. CurProp^.CanBeRemoved := False;
  1251. UpdateUsedRegs(UsedRegs, Pai(p^.Next));
  1252. {$ifdef TP}
  1253. PPaiProp(p^.OptInfo) := CurProp;
  1254. {$Endif TP}
  1255. For TmpReg := R_EAX To R_EDI Do
  1256. Inc(NrOfInstrSinceLastMod[TmpReg]);
  1257. Case p^.typ Of
  1258. ait_label:
  1259. {$Ifndef JumpAnal}
  1260. If (Pai_label(p)^.l^.is_used) Then
  1261. DestroyAllRegs(CurProp);
  1262. {$Else JumpAnal}
  1263. Begin
  1264. If (Pai_Label(p)^.is_used) Then
  1265. With LTable^[Pai_Label(p)^.l^.labelnr-LoLab] Do
  1266. {$IfDef AnalyzeLoops}
  1267. If (RefsFound = Pai_Label(p)^.l^.RefCount)
  1268. {$Else AnalyzeLoops}
  1269. If (JmpsProcessed = Pai_Label(p)^.l^.RefCount)
  1270. {$EndIf AnalyzeLoops}
  1271. Then
  1272. {all jumps to this label have been found}
  1273. {$IfDef AnalyzeLoops}
  1274. If (JmpsProcessed > 0)
  1275. Then
  1276. {$EndIf AnalyzeLoops}
  1277. {we've processed at least one jump to this label}
  1278. Begin
  1279. If (GetLastInstruction(p, hp) And
  1280. Not(((hp^.typ = ait_instruction)) And
  1281. (paicpu_labeled(hp)^.is_jmp))
  1282. Then
  1283. {previous instruction not a JMP -> the contents of the registers after the
  1284. previous intruction has been executed have to be taken into account as well}
  1285. For TmpReg := R_EAX to R_EDI Do
  1286. Begin
  1287. If (CurProp^.Regs[TmpReg].WState <>
  1288. PPaiProp(hp^.OptInfo)^.Regs[TmpReg].WState)
  1289. Then DestroyReg(CurProp, TmpReg)
  1290. End
  1291. End
  1292. {$IfDef AnalyzeLoops}
  1293. Else
  1294. {a label from a backward jump (e.g. a loop), no jump to this label has
  1295. already been processed}
  1296. If GetLastInstruction(p, hp) And
  1297. Not(hp^.typ = ait_instruction) And
  1298. (paicpu_labeled(hp)^.opcode = A_JMP))
  1299. Then
  1300. {previous instruction not a jmp, so keep all the registers' contents from the
  1301. previous instruction}
  1302. Begin
  1303. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1304. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1305. End
  1306. Else
  1307. {previous instruction a jmp and no jump to this label processed yet}
  1308. Begin
  1309. hp := p;
  1310. Cnt := InstrCnt;
  1311. {continue until we find a jump to the label or a label which has already
  1312. been processed}
  1313. While GetNextInstruction(hp, hp) And
  1314. Not((hp^.typ = ait_instruction) And
  1315. (paicpu(hp)^.is_jmp) and
  1316. (pasmlabel(paicpu(hp)^.oper[0].sym)^.labelnr = Pai_Label(p)^.l^.labelnr)) And
  1317. Not((hp^.typ = ait_label) And
  1318. (LTable^[Pai_Label(hp)^.l^.labelnr-LoLab].RefsFound
  1319. = Pai_Label(hp)^.l^.RefCount) And
  1320. (LTable^[Pai_Label(hp)^.l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  1321. Inc(Cnt);
  1322. If (hp^.typ = ait_label)
  1323. Then
  1324. {there's a processed label after the current one}
  1325. Begin
  1326. CurProp^.Regs := PaiPropBlock^[Cnt].Regs;
  1327. CurProp^.DirFlag := PaiPropBlock^[Cnt].DirFlag;
  1328. End
  1329. Else
  1330. {there's no label anymore after the current one, or they haven't been
  1331. processed yet}
  1332. Begin
  1333. GetLastInstruction(p, hp);
  1334. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1335. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1336. DestroyAllRegs(PPaiProp(hp^.OptInfo))
  1337. End
  1338. End
  1339. {$EndIf AnalyzeLoops}
  1340. Else
  1341. {not all references to this label have been found, so destroy all registers}
  1342. Begin
  1343. GetLastInstruction(p, hp);
  1344. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1345. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1346. DestroyAllRegs(CurProp)
  1347. End;
  1348. End;
  1349. {$EndIf JumpAnal}
  1350. {$ifdef GDB}
  1351. ait_stabs, ait_stabn, ait_stab_function_name:;
  1352. {$endif GDB}
  1353. ait_instruction:
  1354. Begin
  1355. if paicpu(p)^.is_jmp then
  1356. begin
  1357. {$IfNDef JumpAnal}
  1358. ;
  1359. {$Else JumpAnal}
  1360. With LTable^[pasmlabel(paicpu(p)^.oper[0].sym)^.labelnr-LoLab] Do
  1361. If (RefsFound = pasmlabel(paicpu(p)^.oper[0].sym)^.RefCount) Then
  1362. Begin
  1363. If (InstrCnt < InstrNr)
  1364. Then
  1365. {forward jump}
  1366. If (JmpsProcessed = 0) Then
  1367. {no jump to this label has been processed yet}
  1368. Begin
  1369. PaiPropBlock^[InstrNr].Regs := CurProp^.Regs;
  1370. PaiPropBlock^[InstrNr].DirFlag := CurProp^.DirFlag;
  1371. Inc(JmpsProcessed);
  1372. End
  1373. Else
  1374. Begin
  1375. For TmpReg := R_EAX to R_EDI Do
  1376. If (PaiPropBlock^[InstrNr].Regs[TmpReg].WState <>
  1377. CurProp^.Regs[TmpReg].WState) Then
  1378. DestroyReg(@PaiPropBlock^[InstrNr], TmpReg);
  1379. Inc(JmpsProcessed);
  1380. End
  1381. {$ifdef AnalyzeLoops}
  1382. Else
  1383. { backward jump, a loop for example}
  1384. { If (JmpsProcessed > 0) Or
  1385. Not(GetLastInstruction(PaiObj, hp) And
  1386. (hp^.typ = ait_labeled_instruction) And
  1387. (paicpu_labeled(hp)^.opcode = A_JMP))
  1388. Then}
  1389. {instruction prior to label is not a jmp, or at least one jump to the label
  1390. has yet been processed}
  1391. Begin
  1392. Inc(JmpsProcessed);
  1393. For TmpReg := R_EAX to R_EDI Do
  1394. If (PaiPropBlock^[InstrNr].Regs[TmpReg].WState <>
  1395. CurProp^.Regs[TmpReg].WState)
  1396. Then
  1397. Begin
  1398. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].WState;
  1399. Cnt := InstrNr;
  1400. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].WState) Do
  1401. Begin
  1402. DestroyReg(@PaiPropBlock^[Cnt], TmpReg);
  1403. Inc(Cnt);
  1404. End;
  1405. While (Cnt <= InstrCnt) Do
  1406. Begin
  1407. Inc(PaiPropBlock^[Cnt].Regs[TmpReg].WState);
  1408. Inc(Cnt)
  1409. End
  1410. End;
  1411. End
  1412. { Else }
  1413. {instruction prior to label is a jmp and no jumps to the label have yet been
  1414. processed}
  1415. { Begin
  1416. Inc(JmpsProcessed);
  1417. For TmpReg := R_EAX to R_EDI Do
  1418. Begin
  1419. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].WState;
  1420. Cnt := InstrNr;
  1421. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].WState) Do
  1422. Begin
  1423. PaiPropBlock^[Cnt].Regs[TmpReg] := CurProp^.Regs[TmpReg];
  1424. Inc(Cnt);
  1425. End;
  1426. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].WState;
  1427. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].WState) Do
  1428. Begin
  1429. DestroyReg(@PaiPropBlock^[Cnt], TmpReg);
  1430. Inc(Cnt);
  1431. End;
  1432. While (Cnt <= InstrCnt) Do
  1433. Begin
  1434. Inc(PaiPropBlock^[Cnt].Regs[TmpReg].WState);
  1435. Inc(Cnt)
  1436. End
  1437. End
  1438. End}
  1439. {$endif AnalyzeLoops}
  1440. End;
  1441. {$EndIf JumpAnal}
  1442. end
  1443. else
  1444. begin
  1445. InstrProp := InsProp[Paicpu(p)^.opcode];
  1446. Case Paicpu(p)^.opcode Of
  1447. A_MOV, A_MOVZX, A_MOVSX:
  1448. Begin
  1449. Case Paicpu(p)^.oper[0].typ Of
  1450. Top_Reg:
  1451. Case Paicpu(p)^.oper[1].typ Of
  1452. Top_Reg:
  1453. Begin
  1454. DestroyReg(CurProp, Paicpu(p)^.oper[1].reg);
  1455. ReadReg(CurProp, Paicpu(p)^.oper[0].reg);
  1456. { CurProp^.Regs[Paicpu(p)^.oper[1].reg] :=
  1457. CurProp^.Regs[Paicpu(p)^.oper[0].reg];
  1458. If (CurProp^.Regs[Paicpu(p)^.oper[1].reg].ModReg = R_NO) Then
  1459. CurProp^.Regs[Paicpu(p)^.oper[1].reg].ModReg :=
  1460. Paicpu(p)^.oper[0].reg;}
  1461. End;
  1462. Top_Ref:
  1463. Begin
  1464. ReadReg(CurProp, Paicpu(p)^.oper[0].reg);
  1465. ReadRef(CurProp, Paicpu(p)^.oper[1].ref);
  1466. DestroyRefs(p, Paicpu(p)^.oper[1].ref^, Paicpu(p)^.oper[0].reg);
  1467. End;
  1468. End;
  1469. Top_Ref:
  1470. Begin {destination is always a register in this case}
  1471. ReadRef(CurProp, Paicpu(p)^.oper[0].ref);
  1472. ReadReg(CurProp, Paicpu(p)^.oper[1].reg);
  1473. TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
  1474. If RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^) And
  1475. (CurProp^.Regs[TmpReg].Typ = Con_Ref)
  1476. Then
  1477. Begin
  1478. With CurProp^.Regs[TmpReg] Do
  1479. Begin
  1480. IncState(WState);
  1481. {also store how many instructions are part of the sequence in the first
  1482. instructions PPaiProp, so it can be easily accessed from within
  1483. CheckSequence}
  1484. Inc(NrOfMods, NrOfInstrSinceLastMod[TmpReg]);
  1485. PPaiProp(Pai(StartMod)^.OptInfo)^.Regs[TmpReg].NrOfMods := NrOfMods;
  1486. NrOfInstrSinceLastMod[TmpReg] := 0;
  1487. End;
  1488. End
  1489. Else
  1490. Begin
  1491. DestroyReg(CurProp, TmpReg);
  1492. If Not(RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^)) Then
  1493. With CurProp^.Regs[TmpReg] Do
  1494. Begin
  1495. Typ := Con_Ref;
  1496. StartMod := p;
  1497. NrOfMods := 1;
  1498. End
  1499. End;
  1500. {$ifdef StateDebug}
  1501. hp := new(pai_asm_comment,init(strpnew(att_reg2str[TmpReg]+': '+tostr(CurProp^.Regs[TmpReg].WState))));
  1502. InsertLLItem(AsmL, p, p^.next, hp);
  1503. {$endif StateDebug}
  1504. End;
  1505. Top_Const:
  1506. Begin
  1507. Case Paicpu(p)^.oper[1].typ Of
  1508. Top_Reg:
  1509. Begin
  1510. TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
  1511. With CurProp^.Regs[TmpReg] Do
  1512. Begin
  1513. DestroyReg(CurProp, TmpReg);
  1514. typ := Con_Const;
  1515. StartMod := p;
  1516. End
  1517. End;
  1518. Top_Ref:
  1519. Begin
  1520. ReadRef(CurProp, Paicpu(p)^.oper[1].ref);
  1521. DestroyRefs(P, Paicpu(p)^.oper[1].ref^, R_NO);
  1522. End;
  1523. End;
  1524. End;
  1525. End;
  1526. End;
  1527. A_DIV, A_IDIV, A_MUL:
  1528. Begin
  1529. ReadOp(Curprop, Paicpu(p)^.oper[0]);
  1530. ReadReg(CurProp,R_EAX);
  1531. If (Paicpu(p)^.OpCode = A_IDIV) or
  1532. (Paicpu(p)^.OpCode = A_DIV) Then
  1533. ReadReg(CurProp,R_EDX);
  1534. DestroyReg(CurProp, R_EAX)
  1535. End;
  1536. A_IMUL:
  1537. Begin
  1538. ReadOp(CurProp,Paicpu(p)^.oper[0]);
  1539. ReadOp(CurProp,Paicpu(p)^.oper[1]);
  1540. If (Paicpu(p)^.oper[2].typ = top_none) Then
  1541. If (Paicpu(p)^.oper[1].typ = top_none) Then
  1542. Begin
  1543. ReadReg(CurProp,R_EAX);
  1544. DestroyReg(CurProp, R_EAX);
  1545. DestroyReg(CurProp, R_EDX)
  1546. End
  1547. Else
  1548. {$ifdef arithopt}
  1549. AddInstr2OpContents(Paicpu(p), Paicpu(p)^.oper[1])
  1550. {$else arithopt}
  1551. DestroyOp(p, Paicpu(p)^.oper[1])
  1552. {$endif arithopt}
  1553. Else
  1554. {$ifdef arithopt}
  1555. AddInstr2OpContents(Paicpu(p), Paicpu(p)^.oper[2]);
  1556. {$else arithopt}
  1557. DestroyOp(p, Paicpu(p)^.oper[2]);
  1558. {$endif arithopt}
  1559. End;
  1560. A_XOR:
  1561. Begin
  1562. ReadOp(CurProp, Paicpu(p)^.oper[0]);
  1563. ReadOp(CurProp, Paicpu(p)^.oper[1]);
  1564. If (Paicpu(p)^.oper[0].typ = top_reg) And
  1565. (Paicpu(p)^.oper[1].typ = top_reg) And
  1566. (Paicpu(p)^.oper[0].reg = Paicpu(p)^.oper[1].reg)
  1567. Then
  1568. Begin
  1569. DestroyReg(CurProp, Paicpu(p)^.oper[0].reg);
  1570. CurProp^.Regs[Reg32(Paicpu(p)^.oper[0].reg)].typ := Con_Const;
  1571. CurProp^.Regs[Reg32(Paicpu(p)^.oper[0].reg)].StartMod := Pointer(0)
  1572. End
  1573. Else
  1574. DestroyOp(p, Paicpu(p)^.oper[1]);
  1575. End
  1576. Else
  1577. Begin
  1578. Cnt := 1;
  1579. While (Cnt <= MaxCh) And
  1580. (InstrProp.Ch[Cnt] <> Ch_None) Do
  1581. Begin
  1582. Case InstrProp.Ch[Cnt] Of
  1583. Ch_REAX..Ch_REDI: ReadReg(CurProp,TCh2Reg(InstrProp.Ch[Cnt]));
  1584. Ch_WEAX..Ch_RWEDI:
  1585. Begin
  1586. If (InstrProp.Ch[Cnt] >= Ch_RWEAX) Then
  1587. ReadReg(CurProp, TCh2Reg(InstrProp.Ch[Cnt]));
  1588. DestroyReg(CurProp, TCh2Reg(InstrProp.Ch[Cnt]));
  1589. End;
  1590. {$ifdef arithopt}
  1591. Ch_MEAX..Ch_MEDI:
  1592. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}
  1593. Paicpu(p),
  1594. TCh2Reg(InstrProp.Ch[Cnt]));
  1595. {$endif arithopt}
  1596. Ch_CDirFlag: CurProp^.DirFlag := F_NotSet;
  1597. Ch_SDirFlag: CurProp^.DirFlag := F_Set;
  1598. Ch_Rop1: ReadOp(CurProp, Paicpu(p)^.oper[0]);
  1599. Ch_Rop2: ReadOp(CurProp, Paicpu(p)^.oper[1]);
  1600. Ch_ROp3: ReadOp(CurProp, Paicpu(p)^.oper[2]);
  1601. Ch_Wop1..Ch_RWop1:
  1602. Begin
  1603. If (InstrProp.Ch[Cnt] in [Ch_RWop1]) Then
  1604. ReadOp(CurProp, Paicpu(p)^.oper[0]);
  1605. DestroyOp(p, Paicpu(p)^.oper[0]);
  1606. End;
  1607. {$ifdef arithopt}
  1608. Ch_Mop1:
  1609. AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
  1610. Paicpu(p), Paicpu(p)^.oper[0]);
  1611. {$endif arithopt}
  1612. Ch_Wop2..Ch_RWop2:
  1613. Begin
  1614. If (InstrProp.Ch[Cnt] = Ch_RWop2) Then
  1615. ReadOp(CurProp, Paicpu(p)^.oper[1]);
  1616. DestroyOp(p, Paicpu(p)^.oper[1]);
  1617. End;
  1618. {$ifdef arithopt}
  1619. Ch_Mop2:
  1620. AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
  1621. Paicpu(p), Paicpu(p)^.oper[1]);
  1622. {$endif arithopt}
  1623. Ch_WOp3..Ch_RWOp3:
  1624. Begin
  1625. If (InstrProp.Ch[Cnt] = Ch_RWOp3) Then
  1626. ReadOp(CurProp, Paicpu(p)^.oper[2]);
  1627. DestroyOp(p, Paicpu(p)^.oper[2]);
  1628. End;
  1629. {$ifdef arithopt}
  1630. Ch_Mop3:
  1631. AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
  1632. Paicpu(p), Paicpu(p)^.oper[2]);
  1633. {$endif arithopt}
  1634. Ch_WMemEDI:
  1635. Begin
  1636. ReadReg(CurProp, R_EDI);
  1637. FillChar(TmpRef, SizeOf(TmpRef), 0);
  1638. TmpRef.Base := R_EDI;
  1639. DestroyRefs(p, TmpRef, R_NO)
  1640. End;
  1641. Ch_RFlags, Ch_WFlags, Ch_RWFlags, Ch_FPU:
  1642. Else
  1643. Begin
  1644. DestroyAllRegs(CurProp);
  1645. End;
  1646. End;
  1647. Inc(Cnt);
  1648. End
  1649. End;
  1650. end;
  1651. End;
  1652. End
  1653. Else
  1654. Begin
  1655. DestroyAllRegs(CurProp);
  1656. End;
  1657. End;
  1658. Inc(InstrCnt);
  1659. GetNextInstruction(p, p);
  1660. End;
  1661. End;
  1662. Function InitDFAPass2(BlockStart, BlockEnd: Pai): Boolean;
  1663. {reserves memory for the PPaiProps in one big memory block when not using
  1664. TP, returns False if not enough memory is available for the optimizer in all
  1665. cases}
  1666. Var p: Pai;
  1667. Count: Longint;
  1668. { TmpStr: String; }
  1669. Begin
  1670. P := BlockStart;
  1671. SkipHead(P);
  1672. NrOfPaiObjs := 0;
  1673. While (P <> BlockEnd) Do
  1674. Begin
  1675. {$IfDef JumpAnal}
  1676. Case P^.Typ Of
  1677. ait_label:
  1678. Begin
  1679. If (Pai_Label(p)^.l^.is_used) Then
  1680. LTable^[Pai_Label(P)^.l^.labelnr-LoLab].InstrNr := NrOfPaiObjs
  1681. End;
  1682. ait_instruction:
  1683. begin
  1684. if paicpu(p)^.is_jmp then
  1685. begin
  1686. If (pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr >= LoLab) And
  1687. (pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr <= HiLab) Then
  1688. Inc(LTable^[pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr-LoLab].RefsFound);
  1689. end;
  1690. end;
  1691. { ait_instruction:
  1692. Begin
  1693. If (Paicpu(p)^.opcode = A_PUSH) And
  1694. (Paicpu(p)^.oper[0].typ = top_symbol) And
  1695. (PCSymbol(Paicpu(p)^.oper[0])^.offset = 0) Then
  1696. Begin
  1697. TmpStr := StrPas(PCSymbol(Paicpu(p)^.oper[0])^.symbol);
  1698. If}
  1699. End;
  1700. {$EndIf JumpAnal}
  1701. Inc(NrOfPaiObjs);
  1702. GetNextInstruction(p, p);
  1703. End;
  1704. {$IfDef TP}
  1705. If (MemAvail < (SizeOf(TPaiProp)*NrOfPaiObjs))
  1706. Or (NrOfPaiObjs = 0)
  1707. {this doesn't have to be one contiguous block}
  1708. Then InitDFAPass2 := False
  1709. Else InitDFAPass2 := True;
  1710. {$Else}
  1711. {Uncomment the next line to see how much memory the reloading optimizer needs}
  1712. { Writeln((NrOfPaiObjs*(((SizeOf(TPaiProp)+3)div 4)*4)));}
  1713. {no need to check mem/maxavail, we've got as much virtual memory as we want}
  1714. If NrOfPaiObjs <> 0 Then
  1715. Begin
  1716. InitDFAPass2 := True;
  1717. GetMem(PaiPropBlock, NrOfPaiObjs*(((SizeOf(TPaiProp)+3)div 4)*4));
  1718. p := BlockStart;
  1719. SkipHead(p);
  1720. For Count := 1 To NrOfPaiObjs Do
  1721. Begin
  1722. PPaiProp(p^.OptInfo) := @PaiPropBlock^[Count];
  1723. GetNextInstruction(p, p);
  1724. End;
  1725. End
  1726. Else InitDFAPass2 := False;
  1727. {$EndIf TP}
  1728. End;
  1729. Function DFAPass2(
  1730. {$ifdef statedebug}
  1731. AsmL: PAasmOutPut;
  1732. {$endif statedebug}
  1733. BlockStart, BlockEnd: Pai): Boolean;
  1734. Begin
  1735. If InitDFAPass2(BlockStart, BlockEnd) Then
  1736. Begin
  1737. DoDFAPass2(
  1738. {$ifdef statedebug}
  1739. asml,
  1740. {$endif statedebug}
  1741. BlockStart, BlockEnd);
  1742. DFAPass2 := True
  1743. End
  1744. Else DFAPass2 := False;
  1745. End;
  1746. Procedure ShutDownDFA;
  1747. Begin
  1748. If LabDif <> 0 Then
  1749. FreeMem(LTable, LabDif*SizeOf(TLabelTableItem));
  1750. End;
  1751. End.
  1752. {
  1753. $Log$
  1754. Revision 1.65 1999-10-27 16:11:28 peter
  1755. * insns.dat is used to generate all i386*.inc files
  1756. Revision 1.64 1999/10/23 14:44:24 jonas
  1757. * finally got around making GetNextInstruction return false when
  1758. the current pai object is a AsmBlockStart marker
  1759. * changed a loop in aopt386 which was incompatible with this change
  1760. Revision 1.63 1999/10/14 14:57:52 florian
  1761. - removed the hcodegen use in the new cg, use cgbase instead
  1762. Revision 1.62 1999/10/07 16:07:35 jonas
  1763. * small bugfix in ArrayRefsEq
  1764. Revision 1.61 1999/09/29 13:49:53 jonas
  1765. * writing to a position in an array now only destroys registers
  1766. containing a reference pointing somewhere in that array (since my last
  1767. fix, it behaved like a write to a pointer location)
  1768. Revision 1.60 1999/09/27 23:44:50 peter
  1769. * procinfo is now a pointer
  1770. * support for result setting in sub procedure
  1771. Revision 1.59 1999/09/21 15:46:58 jonas
  1772. * fixed bug in destroyrefs (indexes are now handled as pointers)
  1773. Revision 1.58 1999/09/05 12:37:50 jonas
  1774. * fixed typo's in -darithopt
  1775. Revision 1.57 1999/08/25 12:00:00 jonas
  1776. * changed pai386, paippc and paiapha (same for tai*) to paicpu (taicpu)
  1777. Revision 1.56 1999/08/18 13:25:54 jonas
  1778. * minor fixes regarding the reading of operands
  1779. Revision 1.55 1999/08/12 14:36:03 peter
  1780. + KNI instructions
  1781. Revision 1.54 1999/08/05 15:01:52 jonas
  1782. * fix in -darithopt code (sometimes crashed on 8/16bit regs)
  1783. Revision 1.53 1999/08/04 00:22:59 florian
  1784. * renamed i386asm and i386base to cpuasm and cpubase
  1785. Revision 1.52 1999/08/02 14:35:21 jonas
  1786. * bugfix in DestroyRefs
  1787. Revision 1.51 1999/08/02 12:12:53 jonas
  1788. * also add arithmetic operations to instruction sequences contained in registers
  1789. (compile with -darithopt, very nice!)
  1790. Revision 1.50 1999/07/30 18:18:51 jonas
  1791. * small bugfix in instructionsequal
  1792. * small bugfix in reginsequence
  1793. * made regininstruction a bit more logical
  1794. Revision 1.48 1999/07/01 18:21:21 jonas
  1795. * removed unused AsmL parameter from FindLoHiLabels
  1796. Revision 1.47 1999/05/27 19:44:24 peter
  1797. * removed oldasm
  1798. * plabel -> pasmlabel
  1799. * -a switches to source writing automaticly
  1800. * assembler readers OOPed
  1801. * asmsymbol automaticly external
  1802. * jumptables and other label fixes for asm readers
  1803. Revision 1.46 1999/05/08 20:40:02 jonas
  1804. * seperate OPTimizer INFO pointer field in tai object
  1805. * fix to GetLastInstruction that sometimes caused a crash
  1806. Revision 1.45 1999/05/01 13:48:37 peter
  1807. * merged nasm compiler
  1808. Revision 1.6 1999/04/18 17:57:21 jonas
  1809. * fix for crash when the first instruction of a sequence that gets
  1810. optimized is removed (this situation can't occur aymore now)
  1811. Revision 1.5 1999/04/16 11:49:50 peter
  1812. + tempalloc
  1813. + -at to show temp alloc info in .s file
  1814. Revision 1.4 1999/04/14 09:07:42 peter
  1815. * asm reader improvements
  1816. Revision 1.3 1999/03/31 13:55:29 peter
  1817. * assembler inlining working for ag386bin
  1818. Revision 1.2 1999/03/29 16:05:46 peter
  1819. * optimizer working for ag386bin
  1820. Revision 1.1 1999/03/26 00:01:10 peter
  1821. * first things for optimizer (compiles but cycle crashes)
  1822. Revision 1.39 1999/02/26 00:48:18 peter
  1823. * assembler writers fixed for ag386bin
  1824. Revision 1.38 1999/02/25 21:02:34 peter
  1825. * ag386bin updates
  1826. + coff writer
  1827. Revision 1.37 1999/02/22 02:15:20 peter
  1828. * updates for ag386bin
  1829. Revision 1.36 1999/01/20 17:41:26 jonas
  1830. * small bugfix (memory corruption could occur when certain fpu instructions
  1831. were encountered)
  1832. Revision 1.35 1999/01/08 12:39:22 florian
  1833. Changes of Alexander Stohr integrated:
  1834. + added KNI opcodes
  1835. + added KNI registers
  1836. + added 3DNow! opcodes
  1837. + added 64 bit and 128 bit register flags
  1838. * translated a few comments into english
  1839. Revision 1.34 1998/12/29 18:48:19 jonas
  1840. + optimize pascal code surrounding assembler blocks
  1841. Revision 1.33 1998/12/17 16:37:38 jonas
  1842. + extra checks in RegsEquivalent so some more optimizations can be done (which
  1843. where disabled by the second fix from revision 1.22)
  1844. Revision 1.32 1998/12/15 19:33:58 jonas
  1845. * uncommented OpsEqual & added to interface because popt386 uses it now
  1846. Revision 1.31 1998/12/11 00:03:13 peter
  1847. + globtype,tokens,version unit splitted from globals
  1848. Revision 1.30 1998/12/02 16:23:39 jonas
  1849. * changed "if longintvar in set" to case or "if () or () .." statements
  1850. * tree.pas: changed inlinenumber (and associated constructor/vars) to a byte
  1851. Revision 1.29 1998/11/26 21:45:31 jonas
  1852. - removed A_CLTD opcode (use A_CDQ instead)
  1853. * changed cbw, cwde and cwd to cbtw, cwtl and cwtd in att_.oper[1]str array
  1854. * in daopt386: adapted InsProp array to reflect changes + fixed line too long
  1855. Revision 1.27 1998/11/24 19:47:22 jonas
  1856. * fixed problems posible with 3 operand instructions
  1857. Revision 1.26 1998/11/24 12:50:09 peter
  1858. * fixed crash
  1859. Revision 1.25 1998/11/18 17:58:22 jonas
  1860. + gathering of register reading data, nowhere used yet (necessary for instruction scheduling)
  1861. Revision 1.24 1998/11/13 10:13:44 peter
  1862. + cpuid,emms support for asm readers
  1863. Revision 1.23 1998/11/09 19:40:46 jonas
  1864. * fixed comments from last commit (apparently there's still a 255 char limit :( )
  1865. Revision 1.22 1998/11/09 19:33:40 jonas
  1866. * changed specific bugfix (which was actually wrong implemented, but
  1867. did the right thing in most cases nevertheless) to general bugfix
  1868. * fixed bug that caused
  1869. mov (ebp), edx mov (ebp), edx
  1870. mov (edx), edx mov (edx), edx
  1871. ... being changed to ...
  1872. mov (ebp), edx mov edx, eax
  1873. mov (eax), eax
  1874. but this disabled another small correct optimization...
  1875. Revision 1.21 1998/11/02 23:17:49 jonas
  1876. * fixed bug shown in sortbug program from fpc-devel list
  1877. Revision 1.20 1998/10/22 13:24:51 jonas
  1878. * changed TRegSet to a small set
  1879. Revision 1.19 1998/10/20 09:29:24 peter
  1880. * bugfix so that code like
  1881. movl 48(%esi),%esi movl 48(%esi),%esi
  1882. pushl %esi doesn't get changed to pushl %esi
  1883. movl 48(%esi),%edi movl %esi,%edi
  1884. Revision 1.18 1998/10/07 16:27:02 jonas
  1885. * changed state to WState (WriteState), added RState for future use in
  1886. instruction scheduling
  1887. * RegAlloc data from the CG is now completely being patched and corrected (I
  1888. think)
  1889. Revision 1.17 1998/10/02 17:30:20 jonas
  1890. * small patches to regdealloc data
  1891. Revision 1.16 1998/10/01 20:21:47 jonas
  1892. * inter-register CSE, still requires some tweaks (peepholeoptpass2, better RegAlloc)
  1893. Revision 1.15 1998/09/20 18:00:20 florian
  1894. * small compiling problems fixed
  1895. Revision 1.14 1998/09/20 17:12:36 jonas
  1896. * small fix for uncertain optimizations & more cleaning up
  1897. Revision 1.12 1998/09/16 18:00:01 jonas
  1898. * optimizer now completely dependant on GetNext/GetLast instruction, works again with -dRegAlloc
  1899. Revision 1.11 1998/09/15 14:05:27 jonas
  1900. * fixed optimizer incompatibilities with freelabel code in psub
  1901. Revision 1.10 1998/09/09 15:33:58 peter
  1902. * removed warnings
  1903. Revision 1.9 1998/09/03 16:24:51 florian
  1904. * bug of type conversation from dword to real fixed
  1905. * bug fix of Jonas applied
  1906. Revision 1.8 1998/08/28 10:56:59 peter
  1907. * removed warnings
  1908. Revision 1.7 1998/08/19 16:07:44 jonas
  1909. * changed optimizer switches + cleanup of DestroyRefs in daopt386.pas
  1910. Revision 1.6 1998/08/10 14:49:57 peter
  1911. + localswitches, moduleswitches, globalswitches splitting
  1912. Revision 1.5 1998/08/09 13:56:24 jonas
  1913. * small bugfix for uncertain optimizations in DestroyRefs
  1914. Revision 1.4 1998/08/06 19:40:25 jonas
  1915. * removed $ before and after Log in comment
  1916. Revision 1.3 1998/08/05 16:00:14 florian
  1917. * some fixes for ansi strings
  1918. * log to Log changed
  1919. }