arm.inc 9.0 KB

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  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 2003 by the Free Pascal development team.
  4. Processor dependent implementation for the system unit for
  5. ARM
  6. See the file COPYING.FPC, included in this distribution,
  7. for details about the copyright.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  11. **********************************************************************}
  12. {$asmmode gas}
  13. {$ifndef FPC_SYSTEM_HAS_MOVE}
  14. {$define FPC_SYSTEM_FPC_MOVE}
  15. {$endif FPC_SYSTEM_HAS_MOVE}
  16. {$ifdef FPC_SYSTEM_FPC_MOVE}
  17. const
  18. cpu_has_edsp : boolean = false;
  19. in_edsp_test : boolean = false;
  20. {$endif FPC_SYSTEM_FPC_MOVE}
  21. {$if not(defined(wince)) and not(defined(gba)) and not(defined(nds)) and not(defined(FPUSOFT)) and not(defined(FPULIBGCC))}
  22. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  23. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  24. begin
  25. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  26. asm
  27. rfs r0
  28. and r0,r0,#0xffe0ffff
  29. orr r0,r0,#0x00070000
  30. wfs r0
  31. end;
  32. end;
  33. {$endif}
  34. procedure fpc_cpuinit;
  35. begin
  36. SysInitFPU;
  37. end;
  38. {$ifdef wince}
  39. function _controlfp(new: DWORD; mask: DWORD): DWORD; cdecl; external 'coredll';
  40. {$define FPC_SYSTEM_HAS_SYSRESETFPU}
  41. Procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  42. begin
  43. softfloat_exception_flags:=0;
  44. end;
  45. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  46. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  47. begin
  48. softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
  49. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  50. { FPU precision 64 bit, rounding to nearest, affine infinity }
  51. _controlfp($000C0003, $030F031F);
  52. end;
  53. {$endif wince}
  54. {****************************************************************************
  55. stack frame related stuff
  56. ****************************************************************************}
  57. {$IFNDEF INTERNAL_BACKTRACE}
  58. {$define FPC_SYSTEM_HAS_GET_FRAME}
  59. function get_frame:pointer;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
  60. asm
  61. mov r0,r11
  62. end;
  63. {$ENDIF not INTERNAL_BACKTRACE}
  64. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  65. function get_caller_addr(framebp:pointer):pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif}
  66. asm
  67. movs r0,r0
  68. beq .Lg_a_null
  69. ldr r0,[r0,#-4]
  70. .Lg_a_null:
  71. end;
  72. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  73. function get_caller_frame(framebp:pointer):pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif}
  74. asm
  75. movs r0,r0
  76. beq .Lgnf_null
  77. ldr r0,[r0,#-12]
  78. .Lgnf_null:
  79. end;
  80. {$define FPC_SYSTEM_HAS_SPTR}
  81. Function Sptr : pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif}
  82. asm
  83. mov r0,sp
  84. end;
  85. {$ifndef FPC_SYSTEM_HAS_FILLCHAR}
  86. {$define FPC_SYSTEM_HAS_FILLCHAR}
  87. Procedure FillChar(var x;count:longint;value:byte);assembler;nostackframe;
  88. asm
  89. // less than 0?
  90. cmp r1,#0
  91. movlt pc,lr
  92. mov r3,r0
  93. cmp r1,#8 // at least 8 bytes to do?
  94. blt .LFillchar2
  95. orr r2,r2,r2,lsl #8
  96. orr r2,r2,r2,lsl #16
  97. .LFillchar0:
  98. tst r3,#3 // aligned yet?
  99. strneb r2,[r3],#1
  100. subne r1,r1,#1
  101. bne .LFillchar0
  102. mov ip,r2
  103. .LFillchar1:
  104. cmp r1,#8 // 8 bytes still to do?
  105. blt .LFillchar2
  106. stmia r3!,{r2,ip}
  107. sub r1,r1,#8
  108. cmp r1,#8 // 8 bytes still to do?
  109. blt .LFillchar2
  110. stmia r3!,{r2,ip}
  111. sub r1,r1,#8
  112. cmp r1,#8 // 8 bytes still to do?
  113. blt .LFillchar2
  114. stmia r3!,{r2,ip}
  115. sub r1,r1,#8
  116. cmp r1,#8 // 8 bytes still to do?
  117. stmgeia r3!,{r2,ip}
  118. subge r1,r1,#8
  119. bge .LFillchar1
  120. .LFillchar2:
  121. movs r1,r1 // anything left?
  122. moveq pc,lr
  123. rsb r1,r1,#7
  124. add pc,pc,r1,lsl #2
  125. mov r0,r0
  126. strb r2,[r3],#1
  127. strb r2,[r3],#1
  128. strb r2,[r3],#1
  129. strb r2,[r3],#1
  130. strb r2,[r3],#1
  131. strb r2,[r3],#1
  132. strb r2,[r3],#1
  133. mov pc,lr
  134. end;
  135. {$endif FPC_SYSTEM_HAS_FILLCHAR}
  136. {$ifndef FPC_SYSTEM_HAS_MOVE}
  137. {$define FPC_SYSTEM_HAS_MOVE}
  138. procedure Move_pld(const source;var dest;count:longint);assembler;nostackframe;
  139. asm
  140. pld [r0]
  141. pld [r1]
  142. // count <=0 ?
  143. cmp r2,#0
  144. movle pc,lr
  145. // overlap?
  146. cmp r1,r0
  147. bls .Lnooverlap
  148. add r3,r0,r2
  149. cmp r3,r1
  150. bls .Lnooverlap
  151. // overlap, copy backward
  152. .Loverlapped:
  153. subs r2,r2,#1
  154. ldrb r3,[r0,r2]
  155. strb r3,[r1,r2]
  156. bne .Loverlapped
  157. mov pc,lr
  158. .Lnooverlap:
  159. // less then 16 bytes to copy?
  160. cmp r2,#8
  161. // yes, the forget about the whole optimizations
  162. // and do a bytewise copy
  163. blt .Lbyteloop
  164. // both aligned?
  165. orr r3,r0,r1
  166. tst r3,#3
  167. bne .Lbyteloop
  168. (*
  169. // yes, then align
  170. // alignment to 4 byte boundries is enough
  171. ldrb ip,[r0],#1
  172. sub r2,r2,#1
  173. stb ip,[r1],#1
  174. tst r3,#2
  175. bne .Ldifferentaligned
  176. ldrh ip,[r0],#2
  177. sub r2,r2,#2
  178. sth ip,[r1],#2
  179. .Ldifferentaligned
  180. // qword aligned?
  181. orrs r3,r0,r1
  182. tst r3,#7
  183. bne .Ldwordloop
  184. *)
  185. pld [r0,#32]
  186. pld [r1,#32]
  187. .Ldwordloop:
  188. sub r2,r2,#4
  189. ldr r3,[r0],#4
  190. // preload
  191. pld [r0,#64]
  192. pld [r1,#64]
  193. cmp r2,#4
  194. str r3,[r1],#4
  195. bcs .Ldwordloop
  196. cmp r2,#0
  197. moveq pc,lr
  198. .Lbyteloop:
  199. subs r2,r2,#1
  200. ldrb r3,[r0],#1
  201. strb r3,[r1],#1
  202. bne .Lbyteloop
  203. mov pc,lr
  204. end;
  205. procedure Move_blended(const source;var dest;count:longint);assembler;nostackframe;
  206. asm
  207. // count <=0 ?
  208. cmp r2,#0
  209. movle pc,lr
  210. // overlap?
  211. cmp r1,r0
  212. bls .Lnooverlap
  213. add r3,r0,r2
  214. cmp r3,r1
  215. bls .Lnooverlap
  216. // overlap, copy backward
  217. .Loverlapped:
  218. subs r2,r2,#1
  219. ldrb r3,[r0,r2]
  220. strb r3,[r1,r2]
  221. bne .Loverlapped
  222. mov pc,lr
  223. .Lnooverlap:
  224. // less then 16 bytes to copy?
  225. cmp r2,#8
  226. // yes, the forget about the whole optimizations
  227. // and do a bytewise copy
  228. blt .Lbyteloop
  229. // both aligned?
  230. orr r3,r0,r1
  231. tst r3,#3
  232. bne .Lbyteloop
  233. (*
  234. // yes, then align
  235. // alignment to 4 byte boundries is enough
  236. ldrb ip,[r0],#1
  237. sub r2,r2,#1
  238. stb ip,[r1],#1
  239. tst r3,#2
  240. bne .Ldifferentaligned
  241. ldrh ip,[r0],#2
  242. sub r2,r2,#2
  243. sth ip,[r1],#2
  244. .Ldifferentaligned
  245. // qword aligned?
  246. orrs r3,r0,r1
  247. tst r3,#7
  248. bne .Ldwordloop
  249. *)
  250. .Ldwordloop:
  251. sub r2,r2,#4
  252. ldr r3,[r0],#4
  253. cmp r2,#4
  254. str r3,[r1],#4
  255. bcs .Ldwordloop
  256. cmp r2,#0
  257. moveq pc,lr
  258. .Lbyteloop:
  259. subs r2,r2,#1
  260. ldrb r3,[r0],#1
  261. strb r3,[r1],#1
  262. bne .Lbyteloop
  263. mov pc,lr
  264. end;
  265. const
  266. moveproc : pointer = @move_blended;
  267. procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];assembler;nostackframe;
  268. asm
  269. ldr ip,.Lmoveproc
  270. ldr pc,[ip]
  271. .Lmoveproc:
  272. .long moveproc
  273. end;
  274. {$endif FPC_SYSTEM_HAS_MOVE}
  275. var
  276. fpc_system_lock: longint; export name 'fpc_system_lock';
  277. function InterLockedDecrement (var Target: longint) : longint; assembler; nostackframe;
  278. asm
  279. // lock
  280. ldr r3, .Lfpc_system_lock
  281. mov r1, #1
  282. .Lloop:
  283. swp r2, r1, [r3]
  284. cmp r2, #0
  285. bne .Lloop
  286. // do the job
  287. ldr r1, [r0]
  288. sub r1, r1, #1
  289. str r1, [r0]
  290. mov r0, r1
  291. // unlock and return
  292. str r2, [r3]
  293. mov pc, lr
  294. .Lfpc_system_lock:
  295. .long fpc_system_lock
  296. end;
  297. function InterLockedIncrement (var Target: longint) : longint; assembler; nostackframe;
  298. asm
  299. // lock
  300. ldr r3, .Lfpc_system_lock
  301. mov r1, #1
  302. .Lloop:
  303. swp r2, r1, [r3]
  304. cmp r2, #0
  305. bne .Lloop
  306. // do the job
  307. ldr r1, [r0]
  308. add r1, r1, #1
  309. str r1, [r0]
  310. mov r0, r1
  311. // unlock and return
  312. str r2, [r3]
  313. mov pc, lr
  314. .Lfpc_system_lock:
  315. .long fpc_system_lock
  316. end;
  317. function InterLockedExchange (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  318. asm
  319. swp r1, r1, [r0]
  320. mov r0,r1
  321. end;
  322. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  323. asm
  324. // lock
  325. ldr r3, .Lfpc_system_lock
  326. mov r2, #1
  327. .Lloop:
  328. swp r2, r2, [r3]
  329. cmp r2, #0
  330. bne .Lloop
  331. // do the job
  332. ldr r2, [r0]
  333. add r1, r1, r2
  334. str r1, [r0]
  335. mov r0, r2
  336. // unlock and return
  337. mov r2, #0
  338. str r2, [r3]
  339. mov pc, lr
  340. .Lfpc_system_lock:
  341. .long fpc_system_lock
  342. end;
  343. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint; assembler; nostackframe;
  344. asm
  345. // lock
  346. ldr r12, .Lfpc_system_lock
  347. mov r3, #1
  348. .Lloop:
  349. swp r3, r3, [r12]
  350. cmp r3, #0
  351. bne .Lloop
  352. // do the job
  353. ldr r3, [r0]
  354. cmp r3, r2
  355. streq r1, [r0]
  356. mov r0, r3
  357. // unlock and return
  358. mov r3, #0
  359. str r3, [r12]
  360. mov pc, lr
  361. .Lfpc_system_lock:
  362. .long fpc_system_lock
  363. end;
  364. {$define FPC_SYSTEM_HAS_DECLOCKED_LONGINT}
  365. function declocked(var l: longint) : boolean; inline;
  366. begin
  367. Result:=InterLockedDecrement(l) = 0;
  368. end;
  369. {$define FPC_SYSTEM_HAS_INCLOCKED_LONGINT}
  370. procedure inclocked(var l: longint); inline;
  371. begin
  372. InterLockedIncrement(l);
  373. end;
  374. procedure fpc_cpucodeinit;
  375. begin
  376. {$ifdef FPC_SYSTEM_FPC_MOVE}
  377. cpu_has_edsp:=true;
  378. in_edsp_test:=true;
  379. asm
  380. pld [r0]
  381. end;
  382. in_edsp_test:=false;
  383. if cpu_has_edsp then
  384. moveproc:=@move_pld
  385. else
  386. moveproc:=@move_blended;
  387. {$endif FPC_SYSTEM_FPC_MOVE}
  388. end;