daopt386.pas 95 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  52. TRegSet = Set of RS_EAX..RS_ESP;
  53. toptreginfo = Record
  54. NewRegsEncountered, OldRegsEncountered: TRegSet;
  55. RegsLoadedForRef: TRegSet;
  56. lastReload: array[RS_EAX..RS_ESP] of tai;
  57. New2OldReg: TRegArray;
  58. end;
  59. {possible actions on an operand: read, write or modify (= read & write)}
  60. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  61. {the possible states of a flag}
  62. TFlagContents = (F_Unknown, F_notSet, F_Set);
  63. TContent = Packed Record
  64. {start and end of block instructions that defines the
  65. content of this register.}
  66. StartMod: tai;
  67. MemWrite: taicpu;
  68. {how many instructions starting with StarMod does the block consist of}
  69. NrOfMods: Word;
  70. {the type of the content of the register: unknown, memory, constant}
  71. Typ: Byte;
  72. case byte of
  73. {starts at 0, gets increased everytime the register is written to}
  74. 1: (WState: Byte;
  75. {starts at 0, gets increased everytime the register is read from}
  76. RState: Byte);
  77. { to compare both states in one operation }
  78. 2: (state: word);
  79. end;
  80. {Contents of the integer registers}
  81. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  82. {contents of the FPU registers}
  83. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  84. {$ifdef tempOpts}
  85. { linked list which allows searching/deleting based on value, no extra frills}
  86. PSearchLinkedListItem = ^TSearchLinkedListItem;
  87. TSearchLinkedListItem = object(TLinkedList_Item)
  88. constructor init;
  89. function equals(p: PSearchLinkedListItem): boolean; virtual;
  90. end;
  91. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  92. TSearchDoubleIntItem = object(TLinkedList_Item)
  93. constructor init(_int1,_int2: longint);
  94. function equals(p: PSearchLinkedListItem): boolean; virtual;
  95. private
  96. int1, int2: longint;
  97. end;
  98. PSearchLinkedList = ^TSearchLinkedList;
  99. TSearchLinkedList = object(TLinkedList)
  100. function searchByValue(p: PSearchLinkedListItem): boolean;
  101. procedure removeByValue(p: PSearchLinkedListItem);
  102. end;
  103. {$endif tempOpts}
  104. {information record with the contents of every register. Every tai object
  105. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  106. TtaiProp = Record
  107. Regs: TRegContent;
  108. { FPURegs: TRegFPUContent;} {currently not yet used}
  109. { allocated Registers }
  110. UsedRegs: TRegSet;
  111. { status of the direction flag }
  112. DirFlag: TFlagContents;
  113. {$ifdef tempOpts}
  114. { currently used temps }
  115. tempAllocs: PSearchLinkedList;
  116. {$endif tempOpts}
  117. { can this instruction be removed? }
  118. CanBeRemoved: Boolean;
  119. { are the resultflags set by this instruction used? }
  120. FlagsUsed: Boolean;
  121. end;
  122. ptaiprop = ^TtaiProp;
  123. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  124. PtaiPropBlock = ^TtaiPropBlock;
  125. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  126. TLabelTableItem = Record
  127. taiObj: tai;
  128. {$ifDef JumpAnal}
  129. InstrNr: Longint;
  130. RefsFound: Word;
  131. JmpsProcessed: Word
  132. {$endif JumpAnal}
  133. end;
  134. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  135. PLabelTable = ^TLabelTable;
  136. {*********************** procedures and functions ************************}
  137. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  138. function RefsEqual(const R1, R2: TReference): Boolean;
  139. function isgp32reg(supreg: tsuperregister): Boolean;
  140. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  141. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  142. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function reginop(supreg: tsuperregister; const o:toper): boolean;
  145. function instrWritesFlags(p: tai): boolean;
  146. function instrReadsFlags(p: tai): boolean;
  147. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  148. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  149. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  150. const c: tcontent): boolean;
  151. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  152. const c: tcontent; var memwritedestroyed: boolean): boolean;
  153. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  154. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  155. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  156. procedure SkipHead(var p: tai);
  157. function labelCanBeSkipped(p: tai_label): boolean;
  158. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  159. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  160. hp: tai): boolean;
  161. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  162. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  163. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  164. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  165. function sizescompatible(loadsize,newsize: topsize): boolean;
  166. function OpsEqual(const o1,o2:toper): Boolean;
  167. type
  168. tdfaobj = class
  169. constructor create(_list: TAsmList); virtual;
  170. function pass_1(_blockstart: tai): tai;
  171. function pass_2: boolean;
  172. procedure clear;
  173. function getlabelwithsym(sym: tasmlabel): tai;
  174. private
  175. { Walks through the list to find the lowest and highest label number, inits the }
  176. { labeltable and fixes/optimizes some regallocs }
  177. procedure initlabeltable;
  178. function initdfapass2: boolean;
  179. procedure dodfapass2;
  180. { asm list we're working on }
  181. list: TAsmList;
  182. { current part of the asm list }
  183. blockstart, blockend: tai;
  184. { the amount of taiObjects in the current part of the assembler list }
  185. nroftaiobjs: longint;
  186. { Array which holds all TtaiProps }
  187. taipropblock: ptaipropblock;
  188. { all labels in the current block: their value mapped to their location }
  189. lolab, hilab, labdif: longint;
  190. labeltable: plabeltable;
  191. end;
  192. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  193. procedure incState(var S: Byte; amount: longint);
  194. {******************************* Variables *******************************}
  195. var
  196. dfa: tdfaobj;
  197. {*********************** end of Interface section ************************}
  198. Implementation
  199. Uses
  200. {$ifdef csdebug}
  201. cutils,
  202. {$else}
  203. {$ifdef statedebug}
  204. cutils,
  205. {$else}
  206. {$ifdef allocregdebug}
  207. cutils,
  208. {$endif}
  209. {$endif}
  210. {$endif}
  211. globals, systems, verbose, symconst, cgobj,procinfo;
  212. Type
  213. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  214. var
  215. {How many instructions are between the current instruction and the last one
  216. that modified the register}
  217. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  218. {$ifdef tempOpts}
  219. constructor TSearchLinkedListItem.init;
  220. begin
  221. end;
  222. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  223. begin
  224. equals := false;
  225. end;
  226. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  227. begin
  228. int1 := _int1;
  229. int2 := _int2;
  230. end;
  231. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  232. begin
  233. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  234. (TSearchDoubleIntItem(p).int2 = int2);
  235. end;
  236. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  237. var temp: PSearchLinkedListItem;
  238. begin
  239. temp := first;
  240. while (temp <> last.next) and
  241. not(temp.equals(p)) do
  242. temp := temp.next;
  243. searchByValue := temp <> last.next;
  244. end;
  245. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  246. begin
  247. temp := first;
  248. while (temp <> last.next) and
  249. not(temp.equals(p)) do
  250. temp := temp.next;
  251. if temp <> last.next then
  252. begin
  253. remove(temp);
  254. dispose(temp,done);
  255. end;
  256. end;
  257. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  258. {updates UsedRegs with the RegAlloc Information coming after p}
  259. begin
  260. repeat
  261. while assigned(p) and
  262. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  263. ((p.typ = ait_label) and
  264. labelCanBeSkipped(tai_label(current)))) Do
  265. p := tai(p.next);
  266. while assigned(p) and
  267. (p.typ=ait_RegAlloc) Do
  268. begin
  269. case tai_regalloc(p).ratype of
  270. ra_alloc :
  271. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  272. ra_dealloc :
  273. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  274. end;
  275. p := tai(p.next);
  276. end;
  277. until not(assigned(p)) or
  278. (not(p.typ in SkipInstr) and
  279. not((p.typ = ait_label) and
  280. labelCanBeSkipped(tai_label(current))));
  281. end;
  282. {$endif tempOpts}
  283. {************************ Create the Label table ************************}
  284. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  285. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  286. { starting with Starttai and ending with the next "real" instruction }
  287. begin
  288. findregalloc := false;
  289. repeat
  290. while assigned(starttai) and
  291. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  292. ((starttai.typ = ait_label) and
  293. labelcanbeskipped(tai_label(starttai)))) do
  294. starttai := tai(starttai.next);
  295. if assigned(starttai) and
  296. (starttai.typ = ait_regalloc) then
  297. begin
  298. if (tai_regalloc(Starttai).ratype = ratyp) and
  299. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  300. begin
  301. findregalloc:=true;
  302. break;
  303. end;
  304. starttai := tai(starttai.next);
  305. end
  306. else
  307. break;
  308. until false;
  309. end;
  310. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  311. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  312. var
  313. hp2: tai;
  314. begin
  315. hp2 := p;
  316. repeat
  317. hp2 := tai(hp2.previous);
  318. if assigned(hp2) and
  319. (hp2.typ = ait_regalloc) and
  320. (tai_regalloc(hp2).ratype=ra_dealloc) and
  321. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  322. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  323. begin
  324. asml.remove(hp2);
  325. hp2.free;
  326. break;
  327. end;
  328. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  329. end;
  330. begin
  331. case current_procinfo.procdef.rettype.def.deftype of
  332. arraydef,recorddef,pointerdef,
  333. stringdef,enumdef,procdef,objectdef,errordef,
  334. filedef,setdef,procvardef,
  335. classrefdef,forwarddef:
  336. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  337. orddef:
  338. if current_procinfo.procdef.rettype.def.size <> 0 then
  339. begin
  340. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  341. { for int64/qword }
  342. if current_procinfo.procdef.rettype.def.size = 8 then
  343. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  344. end;
  345. end;
  346. end;
  347. procedure getNoDeallocRegs(var regs: tregset);
  348. var
  349. regCounter: TSuperRegister;
  350. begin
  351. regs := [];
  352. case current_procinfo.procdef.rettype.def.deftype of
  353. arraydef,recorddef,pointerdef,
  354. stringdef,enumdef,procdef,objectdef,errordef,
  355. filedef,setdef,procvardef,
  356. classrefdef,forwarddef:
  357. regs := [RS_EAX];
  358. orddef:
  359. if current_procinfo.procdef.rettype.def.size <> 0 then
  360. begin
  361. regs := [RS_EAX];
  362. { for int64/qword }
  363. if current_procinfo.procdef.rettype.def.size = 8 then
  364. regs := regs + [RS_EDX];
  365. end;
  366. end;
  367. for regCounter := RS_EAX to RS_EBX do
  368. { if not(regCounter in rg.usableregsint) then}
  369. include(regs,regcounter);
  370. end;
  371. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  372. var
  373. hp1: tai;
  374. funcResRegs: tregset;
  375. funcResReg: boolean;
  376. begin
  377. { if not(supreg in rg.usableregsint) then
  378. exit;}
  379. { if not(supreg in [RS_EDI]) then
  380. exit;}
  381. getNoDeallocRegs(funcresregs);
  382. { funcResRegs := funcResRegs - rg.usableregsint;}
  383. { funcResRegs := funcResRegs - [RS_EDI];}
  384. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  385. funcResReg := getsupreg(reg) in funcresregs;
  386. hp1 := p;
  387. {
  388. while not(funcResReg and
  389. (p.typ = ait_instruction) and
  390. (taicpu(p).opcode = A_JMP) and
  391. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  392. getLastInstruction(p, p) and
  393. not(regInInstruction(supreg, p)) do
  394. hp1 := p;
  395. }
  396. { don't insert a dealloc for registers which contain the function result }
  397. { if they are followed by a jump to the exit label (for exit(...)) }
  398. { if not(funcResReg) or
  399. not((hp1.typ = ait_instruction) and
  400. (taicpu(hp1).opcode = A_JMP) and
  401. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  402. begin
  403. p := tai_regalloc.deAlloc(reg,nil);
  404. insertLLItem(AsmL, hp1.previous, hp1, p);
  405. end;
  406. end;
  407. {************************ Search the Label table ************************}
  408. function findlabel(l: tasmlabel; var hp: tai): boolean;
  409. {searches for the specified label starting from hp as long as the
  410. encountered instructions are labels, to be able to optimize constructs like
  411. jne l2 jmp l2
  412. jmp l3 and l1:
  413. l1: l2:
  414. l2:}
  415. var
  416. p: tai;
  417. begin
  418. p := hp;
  419. while assigned(p) and
  420. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  421. if (p.typ <> ait_Label) or
  422. (tai_label(p).labsym <> l) then
  423. GetNextInstruction(p, p)
  424. else
  425. begin
  426. hp := p;
  427. findlabel := true;
  428. exit
  429. end;
  430. findlabel := false;
  431. end;
  432. {************************ Some general functions ************************}
  433. function tch2reg(ch: tinschange): tsuperregister;
  434. {converts a TChange variable to a TRegister}
  435. const
  436. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  437. begin
  438. if (ch <= CH_REDI) then
  439. tch2reg := ch2reg[ch]
  440. else if (ch <= CH_WEDI) then
  441. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  442. else if (ch <= CH_RWEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  444. else if (ch <= CH_MEDI) then
  445. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  446. else
  447. InternalError($db)
  448. end;
  449. { inserts new_one between prev and foll }
  450. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  451. begin
  452. if assigned(prev) then
  453. if assigned(foll) then
  454. begin
  455. if assigned(new_one) then
  456. begin
  457. new_one.previous := prev;
  458. new_one.next := foll;
  459. prev.next := new_one;
  460. foll.previous := new_one;
  461. { shgould we update line information }
  462. if (not (tai(new_one).typ in SkipLineInfo)) and
  463. (not (tai(foll).typ in SkipLineInfo)) then
  464. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  465. end;
  466. end
  467. else
  468. asml.Concat(new_one)
  469. else
  470. if assigned(foll) then
  471. asml.Insert(new_one)
  472. end;
  473. {********************* Compare parts of tai objects *********************}
  474. function regssamesize(reg1, reg2: tregister): boolean;
  475. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  476. 8bit, 16bit or 32bit)}
  477. begin
  478. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  479. internalerror(2003111602);
  480. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  481. end;
  482. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  483. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  484. OldReg and NewReg have the same size (has to be chcked in advance with
  485. RegsSameSize) and that neither equals RS_INVALID}
  486. var
  487. newsupreg, oldsupreg: tsuperregister;
  488. begin
  489. if (newreg = NR_NO) or (oldreg = NR_NO) then
  490. internalerror(2003111601);
  491. newsupreg := getsupreg(newreg);
  492. oldsupreg := getsupreg(oldreg);
  493. with RegInfo Do
  494. begin
  495. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  496. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  497. New2OldReg[newsupreg] := oldsupreg;
  498. end;
  499. end;
  500. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  501. begin
  502. case o.typ Of
  503. top_reg:
  504. if (o.reg <> NR_NO) then
  505. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  506. top_ref:
  507. begin
  508. if o.ref^.base <> NR_NO then
  509. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  510. if o.ref^.index <> NR_NO then
  511. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  512. end;
  513. end;
  514. end;
  515. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  516. begin
  517. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  518. if RegsSameSize(oldreg, newreg) then
  519. with reginfo do
  520. {here we always check for the 32 bit component, because it is possible that
  521. the 8 bit component has not been set, event though NewReg already has been
  522. processed. This happens if it has been compared with a register that doesn't
  523. have an 8 bit component (such as EDI). in that case the 8 bit component is
  524. still set to RS_NO and the comparison in the else-part will fail}
  525. if (getsupreg(oldReg) in OldRegsEncountered) then
  526. if (getsupreg(NewReg) in NewRegsEncountered) then
  527. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  528. { if we haven't encountered the new register yet, but we have encountered the
  529. old one already, the new one can only be correct if it's being written to
  530. (and consequently the old one is also being written to), otherwise
  531. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  532. movl (%eax), %eax movl (%edx), %edx
  533. are considered equivalent}
  534. else
  535. if (opact = opact_write) then
  536. begin
  537. AddReg2RegInfo(oldreg, newreg, reginfo);
  538. RegsEquivalent := true
  539. end
  540. else
  541. Regsequivalent := false
  542. else
  543. if not(getsupreg(newreg) in NewRegsEncountered) and
  544. ((opact = opact_write) or
  545. ((newreg = oldreg) and
  546. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  547. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  548. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  549. begin
  550. AddReg2RegInfo(oldreg, newreg, reginfo);
  551. RegsEquivalent := true
  552. end
  553. else
  554. RegsEquivalent := false
  555. else
  556. RegsEquivalent := false
  557. else
  558. RegsEquivalent := oldreg = newreg
  559. end;
  560. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  561. begin
  562. RefsEquivalent :=
  563. (r1.offset = r2.offset) and
  564. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  565. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  566. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  567. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  568. (r1.relsymbol = r2.relsymbol);
  569. end;
  570. function refsequal(const r1, r2: treference): boolean;
  571. begin
  572. refsequal :=
  573. (r1.offset = r2.offset) and
  574. (r1.segment = r2.segment) and (r1.base = r2.base) and
  575. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  576. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  577. (r1.relsymbol = r2.relsymbol);
  578. end;
  579. {$ifdef q+}
  580. {$q-}
  581. {$define overflowon}
  582. {$endif q+}
  583. // checks whether a write to r2 of size "size" contains address r1
  584. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  585. var
  586. realsize1, realsize2: aint;
  587. begin
  588. realsize1 := tcgsize2size[size1];
  589. realsize2 := tcgsize2size[size2];
  590. refsoverlapping :=
  591. (r2.offset <= r1.offset+realsize1) and
  592. (r1.offset <= r2.offset+realsize2) and
  593. (r1.segment = r2.segment) and (r1.base = r2.base) and
  594. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  595. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  596. (r1.relsymbol = r2.relsymbol);
  597. end;
  598. {$ifdef overflowon}
  599. {$q+}
  600. {$undef overflowon}
  601. {$endif overflowon}
  602. function isgp32reg(supreg: tsuperregister): boolean;
  603. {Checks if the register is a 32 bit general purpose register}
  604. begin
  605. isgp32reg := false;
  606. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  607. isgp32reg := true
  608. end;
  609. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  610. begin {checks whether ref contains a reference to reg}
  611. reginref :=
  612. ((ref.base <> NR_NO) and
  613. (getsupreg(ref.base) = supreg)) or
  614. ((ref.index <> NR_NO) and
  615. (getsupreg(ref.index) = supreg))
  616. end;
  617. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  618. var
  619. p: taicpu;
  620. opcount: longint;
  621. begin
  622. RegReadByInstruction := false;
  623. if hp.typ <> ait_instruction then
  624. exit;
  625. p := taicpu(hp);
  626. case p.opcode of
  627. A_CALL:
  628. regreadbyinstruction := true;
  629. A_IMUL:
  630. case p.ops of
  631. 1:
  632. regReadByInstruction :=
  633. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  634. 2,3:
  635. regReadByInstruction :=
  636. reginop(supreg,p.oper[0]^) or
  637. reginop(supreg,p.oper[1]^);
  638. end;
  639. A_IDIV,A_DIV,A_MUL:
  640. begin
  641. regReadByInstruction :=
  642. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  643. end;
  644. else
  645. begin
  646. for opcount := 0 to p.ops-1 do
  647. if (p.oper[opCount]^.typ = top_ref) and
  648. reginref(supreg,p.oper[opcount]^.ref^) then
  649. begin
  650. RegReadByInstruction := true;
  651. exit
  652. end;
  653. for opcount := 1 to maxinschanges do
  654. case insprop[p.opcode].ch[opcount] of
  655. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  656. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  657. begin
  658. RegReadByInstruction := true;
  659. exit
  660. end;
  661. CH_RWOP1,CH_ROP1,CH_MOP1:
  662. if //(p.oper[0]^.typ = top_reg) and
  663. reginop(supreg,p.oper[0]^) then
  664. begin
  665. RegReadByInstruction := true;
  666. exit
  667. end;
  668. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  669. if //(p.oper[1]^.typ = top_reg) and
  670. reginop(supreg,p.oper[1]^) then
  671. begin
  672. RegReadByInstruction := true;
  673. exit
  674. end;
  675. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  676. if //(p.oper[2]^.typ = top_reg) and
  677. reginop(supreg,p.oper[2]^) then
  678. begin
  679. RegReadByInstruction := true;
  680. exit
  681. end;
  682. end;
  683. end;
  684. end;
  685. end;
  686. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  687. { Checks if reg is used by the instruction p1 }
  688. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  689. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  690. var
  691. p: taicpu;
  692. opcount: longint;
  693. begin
  694. regInInstruction := false;
  695. if p1.typ <> ait_instruction then
  696. exit;
  697. p := taicpu(p1);
  698. case p.opcode of
  699. A_CALL:
  700. regininstruction := true;
  701. A_IMUL:
  702. case p.ops of
  703. 1:
  704. regInInstruction :=
  705. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  706. 2,3:
  707. regInInstruction :=
  708. reginop(supreg,p.oper[0]^) or
  709. reginop(supreg,p.oper[1]^) or
  710. (assigned(p.oper[2]) and
  711. reginop(supreg,p.oper[2]^));
  712. end;
  713. A_IDIV,A_DIV,A_MUL:
  714. regInInstruction :=
  715. reginop(supreg,p.oper[0]^) or
  716. (supreg in [RS_EAX,RS_EDX])
  717. else
  718. begin
  719. for opcount := 1 to maxinschanges do
  720. case insprop[p.opcode].Ch[opCount] of
  721. CH_REAX..CH_MEDI:
  722. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  723. begin
  724. regInInstruction := true;
  725. exit;
  726. end;
  727. CH_ROp1..CH_MOp1:
  728. if reginop(supreg,p.oper[0]^) then
  729. begin
  730. regInInstruction := true;
  731. exit
  732. end;
  733. Ch_ROp2..Ch_MOp2:
  734. if reginop(supreg,p.oper[1]^) then
  735. begin
  736. regInInstruction := true;
  737. exit
  738. end;
  739. Ch_ROp3..Ch_MOp3:
  740. if reginop(supreg,p.oper[2]^) then
  741. begin
  742. regInInstruction := true;
  743. exit
  744. end;
  745. end;
  746. end;
  747. end;
  748. end;
  749. function reginop(supreg: tsuperregister; const o:toper): boolean;
  750. begin
  751. reginop := false;
  752. case o.typ Of
  753. top_reg:
  754. reginop :=
  755. (getregtype(o.reg) = R_INTREGISTER) and
  756. (supreg = getsupreg(o.reg));
  757. top_ref:
  758. reginop :=
  759. ((o.ref^.base <> NR_NO) and
  760. (supreg = getsupreg(o.ref^.base))) or
  761. ((o.ref^.index <> NR_NO) and
  762. (supreg = getsupreg(o.ref^.index)));
  763. end;
  764. end;
  765. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  766. var
  767. InstrProp: TInsProp;
  768. TmpResult: Boolean;
  769. Cnt: Word;
  770. begin
  771. TmpResult := False;
  772. if supreg = RS_INVALID then
  773. exit;
  774. if (p1.typ = ait_instruction) then
  775. case taicpu(p1).opcode of
  776. A_IMUL:
  777. With taicpu(p1) Do
  778. TmpResult :=
  779. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  780. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  781. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  782. A_DIV, A_IDIV, A_MUL:
  783. With taicpu(p1) Do
  784. TmpResult :=
  785. (supreg in [RS_EAX,RS_EDX]);
  786. else
  787. begin
  788. Cnt := 1;
  789. InstrProp := InsProp[taicpu(p1).OpCode];
  790. while (Cnt <= maxinschanges) and
  791. (InstrProp.Ch[Cnt] <> Ch_None) and
  792. not(TmpResult) Do
  793. begin
  794. case InstrProp.Ch[Cnt] Of
  795. Ch_WEAX..Ch_MEDI:
  796. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  797. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  798. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  799. reginop(supreg,taicpu(p1).oper[0]^);
  800. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  801. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  802. reginop(supreg,taicpu(p1).oper[1]^);
  803. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  804. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  805. reginop(supreg,taicpu(p1).oper[2]^);
  806. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  807. Ch_ALL: TmpResult := true;
  808. end;
  809. inc(Cnt)
  810. end
  811. end
  812. end;
  813. RegModifiedByInstruction := TmpResult
  814. end;
  815. function instrWritesFlags(p: tai): boolean;
  816. var
  817. l: longint;
  818. begin
  819. instrWritesFlags := true;
  820. case p.typ of
  821. ait_instruction:
  822. begin
  823. for l := 1 to maxinschanges do
  824. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  825. exit;
  826. end;
  827. ait_label:
  828. exit;
  829. end;
  830. instrWritesFlags := false;
  831. end;
  832. function instrReadsFlags(p: tai): boolean;
  833. var
  834. l: longint;
  835. begin
  836. instrReadsFlags := true;
  837. case p.typ of
  838. ait_instruction:
  839. begin
  840. for l := 1 to maxinschanges do
  841. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  842. exit;
  843. end;
  844. ait_label:
  845. exit;
  846. end;
  847. instrReadsFlags := false;
  848. end;
  849. {********************* GetNext and GetLastInstruction *********************}
  850. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  851. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  852. { next tai object in Next. Returns false if there isn't any }
  853. begin
  854. repeat
  855. if (Current.typ = ait_marker) and
  856. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  857. begin
  858. GetNextInstruction := False;
  859. Next := Nil;
  860. Exit
  861. end;
  862. Current := tai(current.Next);
  863. while assigned(Current) and
  864. ((current.typ in skipInstr) or
  865. ((current.typ = ait_label) and
  866. labelCanBeSkipped(tai_label(current)))) do
  867. Current := tai(current.Next);
  868. { if assigned(Current) and
  869. (current.typ = ait_Marker) and
  870. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  871. begin
  872. while assigned(Current) and
  873. ((current.typ <> ait_Marker) or
  874. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  875. Current := tai(current.Next);
  876. end;}
  877. until not(assigned(Current)) or
  878. (current.typ <> ait_Marker) or
  879. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  880. Next := Current;
  881. if assigned(Current) and
  882. not((current.typ in SkipInstr) or
  883. ((current.typ = ait_label) and
  884. labelCanBeSkipped(tai_label(current))))
  885. then
  886. GetNextInstruction :=
  887. not((current.typ = ait_marker) and
  888. (tai_marker(current).kind = mark_AsmBlockStart))
  889. else
  890. begin
  891. GetNextInstruction := False;
  892. Next := nil;
  893. end;
  894. end;
  895. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  896. {skips the ait-types in SkipInstr puts the previous tai object in
  897. Last. Returns false if there isn't any}
  898. begin
  899. repeat
  900. Current := tai(current.previous);
  901. while assigned(Current) and
  902. (((current.typ = ait_Marker) and
  903. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  904. (current.typ in SkipInstr) or
  905. ((current.typ = ait_label) and
  906. labelCanBeSkipped(tai_label(current)))) Do
  907. Current := tai(current.previous);
  908. { if assigned(Current) and
  909. (current.typ = ait_Marker) and
  910. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  911. begin
  912. while assigned(Current) and
  913. ((current.typ <> ait_Marker) or
  914. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  915. Current := tai(current.previous);
  916. end;}
  917. until not(assigned(Current)) or
  918. (current.typ <> ait_Marker) or
  919. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  920. if not(assigned(Current)) or
  921. (current.typ in SkipInstr) or
  922. ((current.typ = ait_label) and
  923. labelCanBeSkipped(tai_label(current))) or
  924. ((current.typ = ait_Marker) and
  925. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  926. then
  927. begin
  928. Last := nil;
  929. GetLastInstruction := False
  930. end
  931. else
  932. begin
  933. Last := Current;
  934. GetLastInstruction := True;
  935. end;
  936. end;
  937. procedure SkipHead(var p: tai);
  938. var
  939. oldp: tai;
  940. begin
  941. repeat
  942. oldp := p;
  943. if (p.typ in SkipInstr) or
  944. ((p.typ = ait_marker) and
  945. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd])) then
  946. GetNextInstruction(p,p)
  947. else if ((p.Typ = Ait_Marker) and
  948. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  949. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  950. TAsmList list}
  951. GetNextInstruction(tai(p.previous),p);
  952. until p = oldp
  953. end;
  954. function labelCanBeSkipped(p: tai_label): boolean;
  955. begin
  956. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  957. end;
  958. {******************* The Data Flow Analyzer functions ********************}
  959. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  960. hp: tai): boolean;
  961. { assumes reg is a 32bit register }
  962. var
  963. p: taicpu;
  964. begin
  965. if not assigned(hp) or
  966. (hp.typ <> ait_instruction) then
  967. begin
  968. regLoadedWithNewValue := false;
  969. exit;
  970. end;
  971. p := taicpu(hp);
  972. regLoadedWithNewValue :=
  973. (((p.opcode = A_MOV) or
  974. (p.opcode = A_MOVZX) or
  975. (p.opcode = A_MOVSX) or
  976. (p.opcode = A_LEA)) and
  977. (p.oper[1]^.typ = top_reg) and
  978. (getsupreg(p.oper[1]^.reg) = supreg) and
  979. (canDependOnPrevValue or
  980. (p.oper[0]^.typ <> top_ref) or
  981. not regInRef(supreg,p.oper[0]^.ref^)) or
  982. ((p.opcode = A_POP) and
  983. (getsupreg(p.oper[0]^.reg) = supreg)));
  984. end;
  985. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  986. {updates UsedRegs with the RegAlloc Information coming after p}
  987. begin
  988. repeat
  989. while assigned(p) and
  990. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  991. ((p.typ = ait_label) and
  992. labelCanBeSkipped(tai_label(p))) or
  993. ((p.typ = ait_marker) and
  994. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd]))) do
  995. p := tai(p.next);
  996. while assigned(p) and
  997. (p.typ=ait_RegAlloc) Do
  998. begin
  999. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1000. begin
  1001. case tai_regalloc(p).ratype of
  1002. ra_alloc :
  1003. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1004. ra_dealloc :
  1005. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1006. end;
  1007. end;
  1008. p := tai(p.next);
  1009. end;
  1010. until not(assigned(p)) or
  1011. (not(p.typ in SkipInstr) and
  1012. not((p.typ = ait_label) and
  1013. labelCanBeSkipped(tai_label(p))));
  1014. end;
  1015. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1016. { allocates register reg between (and including) instructions p1 and p2 }
  1017. { the type of p1 and p2 must not be in SkipInstr }
  1018. { note that this routine is both called from the peephole optimizer }
  1019. { where optinfo is not yet initialised) and from the cse (where it is) }
  1020. var
  1021. hp, start: tai;
  1022. removedsomething,
  1023. firstRemovedWasAlloc,
  1024. lastRemovedWasDealloc: boolean;
  1025. supreg: tsuperregister;
  1026. begin
  1027. {$ifdef EXTDEBUG}
  1028. if assigned(p1.optinfo) and
  1029. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1030. internalerror(2004101010);
  1031. {$endif EXTDEBUG}
  1032. start := p1;
  1033. if (reg = NR_ESP) or
  1034. (reg = current_procinfo.framepointer) or
  1035. not(assigned(p1)) then
  1036. { this happens with registers which are loaded implicitely, outside the }
  1037. { current block (e.g. esi with self) }
  1038. exit;
  1039. supreg := getsupreg(reg);
  1040. { make sure we allocate it for this instruction }
  1041. getnextinstruction(p2,p2);
  1042. lastRemovedWasDealloc := false;
  1043. removedSomething := false;
  1044. firstRemovedWasAlloc := false;
  1045. {$ifdef allocregdebug}
  1046. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1047. ' from here...'));
  1048. insertllitem(asml,p1.previous,p1,hp);
  1049. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1050. ' till here...'));
  1051. insertllitem(asml,p2,p2.next,hp);
  1052. {$endif allocregdebug}
  1053. if not(supreg in initialusedregs) then
  1054. begin
  1055. hp := tai_regalloc.alloc(reg,nil);
  1056. insertllItem(asmL,p1.previous,p1,hp);
  1057. end;
  1058. while assigned(p1) and
  1059. (p1 <> p2) do
  1060. begin
  1061. if assigned(p1.optinfo) then
  1062. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1063. p1 := tai(p1.next);
  1064. repeat
  1065. while assigned(p1) and
  1066. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1067. p1 := tai(p1.next);
  1068. { remove all allocation/deallocation info about the register in between }
  1069. if assigned(p1) and
  1070. (p1.typ = ait_regalloc) then
  1071. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1072. begin
  1073. if not removedSomething then
  1074. begin
  1075. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1076. removedSomething := true;
  1077. end;
  1078. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1079. hp := tai(p1.Next);
  1080. asml.Remove(p1);
  1081. p1.free;
  1082. p1 := hp;
  1083. end
  1084. else p1 := tai(p1.next);
  1085. until not(assigned(p1)) or
  1086. not(p1.typ in SkipInstr);
  1087. end;
  1088. if assigned(p1) then
  1089. begin
  1090. if firstRemovedWasAlloc then
  1091. begin
  1092. hp := tai_regalloc.Alloc(reg,nil);
  1093. insertLLItem(asmL,start.previous,start,hp);
  1094. end;
  1095. if lastRemovedWasDealloc then
  1096. begin
  1097. hp := tai_regalloc.DeAlloc(reg,nil);
  1098. insertLLItem(asmL,p1.previous,p1,hp);
  1099. end;
  1100. end;
  1101. end;
  1102. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1103. var
  1104. hp: tai;
  1105. first: boolean;
  1106. begin
  1107. findregdealloc := false;
  1108. first := true;
  1109. while assigned(p.previous) and
  1110. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1111. ((tai(p.previous).typ = ait_label) and
  1112. labelCanBeSkipped(tai_label(p.previous)))) do
  1113. begin
  1114. p := tai(p.previous);
  1115. if (p.typ = ait_regalloc) and
  1116. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1117. if (tai_regalloc(p).ratype=ra_dealloc) then
  1118. if first then
  1119. begin
  1120. findregdealloc := true;
  1121. break;
  1122. end
  1123. else
  1124. begin
  1125. findRegDealloc :=
  1126. getNextInstruction(p,hp) and
  1127. regLoadedWithNewValue(supreg,false,hp);
  1128. break
  1129. end
  1130. else
  1131. first := false;
  1132. end
  1133. end;
  1134. procedure incState(var S: Byte; amount: longint);
  1135. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1136. errors}
  1137. begin
  1138. if (s <= $ff - amount) then
  1139. inc(s, amount)
  1140. else s := longint(s) + amount - $ff;
  1141. end;
  1142. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1143. { Content is the sequence of instructions that describes the contents of }
  1144. { seqReg. reg is being overwritten by the current instruction. if the }
  1145. { content of seqReg depends on reg (ie. because of a }
  1146. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1147. var
  1148. p: tai;
  1149. Counter: Word;
  1150. TmpResult: Boolean;
  1151. RegsChecked: TRegSet;
  1152. begin
  1153. RegsChecked := [];
  1154. p := Content.StartMod;
  1155. TmpResult := False;
  1156. Counter := 1;
  1157. while not(TmpResult) and
  1158. (Counter <= Content.NrOfMods) Do
  1159. begin
  1160. if (p.typ = ait_instruction) and
  1161. ((taicpu(p).opcode = A_MOV) or
  1162. (taicpu(p).opcode = A_MOVZX) or
  1163. (taicpu(p).opcode = A_MOVSX) or
  1164. (taicpu(p).opcode = A_LEA)) and
  1165. (taicpu(p).oper[0]^.typ = top_ref) then
  1166. With taicpu(p).oper[0]^.ref^ Do
  1167. if ((base = current_procinfo.FramePointer) or
  1168. (assigned(symbol) and (base = NR_NO))) and
  1169. (index = NR_NO) then
  1170. begin
  1171. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1172. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1173. break;
  1174. end
  1175. else
  1176. tmpResult :=
  1177. regReadByInstruction(supreg,p) and
  1178. regModifiedByInstruction(seqReg,p)
  1179. else
  1180. tmpResult :=
  1181. regReadByInstruction(supreg,p) and
  1182. regModifiedByInstruction(seqReg,p);
  1183. inc(Counter);
  1184. GetNextInstruction(p,p)
  1185. end;
  1186. sequenceDependsonReg := TmpResult
  1187. end;
  1188. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1189. var
  1190. counter: tsuperregister;
  1191. begin
  1192. for counter := RS_EAX to RS_EDI do
  1193. if counter <> supreg then
  1194. with p1^.regs[counter] Do
  1195. begin
  1196. if (typ in [con_ref,con_noRemoveRef]) and
  1197. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1198. if typ in [con_ref, con_invalid] then
  1199. typ := con_invalid
  1200. { con_noRemoveRef = con_unknown }
  1201. else
  1202. typ := con_unknown;
  1203. if assigned(memwrite) and
  1204. regInRef(counter,memwrite.oper[1]^.ref^) then
  1205. memwrite := nil;
  1206. end;
  1207. end;
  1208. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1209. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1210. contents of registers are loaded with a memory location based on reg.
  1211. doincState is false when this register has to be destroyed not because
  1212. it's contents are directly modified/overwritten, but because of an indirect
  1213. action (e.g. this register holds the contents of a variable and the value
  1214. of the variable in memory is changed) }
  1215. begin
  1216. { the following happens for fpu registers }
  1217. if (supreg < low(NrOfInstrSinceLastMod)) or
  1218. (supreg > high(NrOfInstrSinceLastMod)) then
  1219. exit;
  1220. NrOfInstrSinceLastMod[supreg] := 0;
  1221. with p1^.regs[supreg] do
  1222. begin
  1223. if doincState then
  1224. begin
  1225. incState(wstate,1);
  1226. typ := con_unknown;
  1227. startmod := nil;
  1228. end
  1229. else
  1230. if typ in [con_ref,con_const,con_invalid] then
  1231. typ := con_invalid
  1232. { con_noRemoveRef = con_unknown }
  1233. else
  1234. typ := con_unknown;
  1235. memwrite := nil;
  1236. end;
  1237. invalidateDependingRegs(p1,supreg);
  1238. end;
  1239. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1240. begin
  1241. if (p.typ = ait_instruction) then
  1242. begin
  1243. case taicpu(p).oper[0]^.typ Of
  1244. top_reg:
  1245. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1246. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1247. top_ref:
  1248. With TReference(taicpu(p).oper[0]^) Do
  1249. begin
  1250. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1251. then RegSet := RegSet + [base];
  1252. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1253. then RegSet := RegSet + [index];
  1254. end;
  1255. end;
  1256. case taicpu(p).oper[1]^.typ Of
  1257. top_reg:
  1258. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1259. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1260. top_ref:
  1261. With TReference(taicpu(p).oper[1]^) Do
  1262. begin
  1263. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1264. then RegSet := RegSet + [base];
  1265. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1266. then RegSet := RegSet + [index];
  1267. end;
  1268. end;
  1269. end;
  1270. end;}
  1271. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1272. begin {checks whether the two ops are equivalent}
  1273. OpsEquivalent := False;
  1274. if o1.typ=o2.typ then
  1275. case o1.typ Of
  1276. top_reg:
  1277. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1278. top_ref:
  1279. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1280. Top_Const:
  1281. OpsEquivalent := o1.val = o2.val;
  1282. Top_None:
  1283. OpsEquivalent := True
  1284. end;
  1285. end;
  1286. function OpsEqual(const o1,o2:toper): Boolean;
  1287. begin {checks whether the two ops are equal}
  1288. OpsEqual := False;
  1289. if o1.typ=o2.typ then
  1290. case o1.typ Of
  1291. top_reg :
  1292. OpsEqual:=o1.reg=o2.reg;
  1293. top_ref :
  1294. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1295. Top_Const :
  1296. OpsEqual:=o1.val=o2.val;
  1297. Top_None :
  1298. OpsEqual := True
  1299. end;
  1300. end;
  1301. function sizescompatible(loadsize,newsize: topsize): boolean;
  1302. begin
  1303. case loadsize of
  1304. S_B,S_BW,S_BL:
  1305. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1306. S_W,S_WL:
  1307. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1308. else
  1309. sizescompatible := newsize = S_L;
  1310. end;
  1311. end;
  1312. function opscompatible(p1,p2: taicpu): boolean;
  1313. begin
  1314. case p1.opcode of
  1315. A_MOVZX,A_MOVSX:
  1316. opscompatible :=
  1317. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1318. sizescompatible(p1.opsize,p2.opsize);
  1319. else
  1320. opscompatible :=
  1321. (p1.opcode = p2.opcode) and
  1322. (p1.ops = p2.ops) and
  1323. (p1.opsize = p2.opsize);
  1324. end;
  1325. end;
  1326. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1327. {$ifdef csdebug}
  1328. var
  1329. hp: tai;
  1330. {$endif csdebug}
  1331. begin {checks whether two taicpu instructions are equal}
  1332. if assigned(p1) and assigned(p2) and
  1333. (tai(p1).typ = ait_instruction) and
  1334. (tai(p2).typ = ait_instruction) and
  1335. opscompatible(taicpu(p1),taicpu(p2)) and
  1336. (not(assigned(taicpu(p1).oper[0])) or
  1337. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1338. (not(assigned(taicpu(p1).oper[1])) or
  1339. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1340. (not(assigned(taicpu(p1).oper[2])) or
  1341. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1342. {both instructions have the same structure:
  1343. "<operator> <operand of type1>, <operand of type 2>"}
  1344. if ((taicpu(p1).opcode = A_MOV) or
  1345. (taicpu(p1).opcode = A_MOVZX) or
  1346. (taicpu(p1).opcode = A_MOVSX) or
  1347. (taicpu(p1).opcode = A_LEA)) and
  1348. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1349. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1350. {the "old" instruction is a load of a register with a new value, not with
  1351. a value based on the contents of this register (so no "mov (reg), reg")}
  1352. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1353. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1354. {the "new" instruction is also a load of a register with a new value, and
  1355. this value is fetched from the same memory location}
  1356. begin
  1357. With taicpu(p2).oper[0]^.ref^ Do
  1358. begin
  1359. if (base <> NR_NO) and
  1360. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1361. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1362. if (index <> NR_NO) and
  1363. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1364. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1365. end;
  1366. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1367. from the reference are the same in the old and in the new instruction
  1368. sequence}
  1369. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1370. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1371. InstructionsEquivalent :=
  1372. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1373. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1374. end
  1375. {the registers are loaded with values from different memory locations. if
  1376. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1377. would be considered equivalent}
  1378. else
  1379. InstructionsEquivalent := False
  1380. else
  1381. {load register with a value based on the current value of this register}
  1382. begin
  1383. With taicpu(p2).oper[0]^.ref^ Do
  1384. begin
  1385. if (base <> NR_NO) and
  1386. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1387. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1388. {it won't do any harm if the register is already in RegsLoadedForRef}
  1389. begin
  1390. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1391. {$ifdef csdebug}
  1392. Writeln(std_regname(base), ' added');
  1393. {$endif csdebug}
  1394. end;
  1395. if (index <> NR_NO) and
  1396. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1397. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1398. begin
  1399. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1400. {$ifdef csdebug}
  1401. Writeln(std_regname(index), ' added');
  1402. {$endif csdebug}
  1403. end;
  1404. end;
  1405. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1406. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1407. begin
  1408. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1409. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1410. {$ifdef csdebug}
  1411. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1412. {$endif csdebug}
  1413. end;
  1414. InstructionsEquivalent :=
  1415. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1416. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1417. end
  1418. else
  1419. {an instruction <> mov, movzx, movsx}
  1420. begin
  1421. {$ifdef csdebug}
  1422. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1423. hp.previous := p2;
  1424. hp.next := p2.next;
  1425. p2.next.previous := hp;
  1426. p2.next := hp;
  1427. {$endif csdebug}
  1428. InstructionsEquivalent :=
  1429. (not(assigned(taicpu(p1).oper[0])) or
  1430. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1431. (not(assigned(taicpu(p1).oper[1])) or
  1432. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1433. (not(assigned(taicpu(p1).oper[2])) or
  1434. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1435. end
  1436. {the instructions haven't even got the same structure, so they're certainly
  1437. not equivalent}
  1438. else
  1439. begin
  1440. {$ifdef csdebug}
  1441. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1442. hp.previous := p2;
  1443. hp.next := p2.next;
  1444. p2.next.previous := hp;
  1445. p2.next := hp;
  1446. {$endif csdebug}
  1447. InstructionsEquivalent := False;
  1448. end;
  1449. {$ifdef csdebug}
  1450. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1451. hp.previous := p2;
  1452. hp.next := p2.next;
  1453. p2.next.previous := hp;
  1454. p2.next := hp;
  1455. {$endif csdebug}
  1456. end;
  1457. (*
  1458. function InstructionsEqual(p1, p2: tai): Boolean;
  1459. begin {checks whether two taicpu instructions are equal}
  1460. InstructionsEqual :=
  1461. assigned(p1) and assigned(p2) and
  1462. ((tai(p1).typ = ait_instruction) and
  1463. (tai(p1).typ = ait_instruction) and
  1464. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1465. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1466. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1467. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1468. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1469. end;
  1470. *)
  1471. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1472. begin
  1473. if supreg in [RS_EAX..RS_EDI] then
  1474. incState(p^.regs[supreg].rstate,1)
  1475. end;
  1476. procedure readref(p: ptaiprop; const ref: preference);
  1477. begin
  1478. if ref^.base <> NR_NO then
  1479. readreg(p, getsupreg(ref^.base));
  1480. if ref^.index <> NR_NO then
  1481. readreg(p, getsupreg(ref^.index));
  1482. end;
  1483. procedure ReadOp(p: ptaiprop;const o:toper);
  1484. begin
  1485. case o.typ Of
  1486. top_reg: readreg(p, getsupreg(o.reg));
  1487. top_ref: readref(p, o.ref);
  1488. end;
  1489. end;
  1490. function RefInInstruction(const ref: TReference; p: tai;
  1491. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1492. {checks whehter ref is used in p}
  1493. var
  1494. mysize: tcgsize;
  1495. TmpResult: Boolean;
  1496. begin
  1497. TmpResult := False;
  1498. if (p.typ = ait_instruction) then
  1499. begin
  1500. mysize := topsize2tcgsize[taicpu(p).opsize];
  1501. if (taicpu(p).ops >= 1) and
  1502. (taicpu(p).oper[0]^.typ = top_ref) then
  1503. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1504. if not(TmpResult) and
  1505. (taicpu(p).ops >= 2) and
  1506. (taicpu(p).oper[1]^.typ = top_ref) then
  1507. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1508. if not(TmpResult) and
  1509. (taicpu(p).ops >= 3) and
  1510. (taicpu(p).oper[2]^.typ = top_ref) then
  1511. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1512. end;
  1513. RefInInstruction := TmpResult;
  1514. end;
  1515. function RefInSequence(const ref: TReference; Content: TContent;
  1516. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1517. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1518. tai objects) to see whether ref is used somewhere}
  1519. var p: tai;
  1520. Counter: Word;
  1521. TmpResult: Boolean;
  1522. begin
  1523. p := Content.StartMod;
  1524. TmpResult := False;
  1525. Counter := 1;
  1526. while not(TmpResult) and
  1527. (Counter <= Content.NrOfMods) Do
  1528. begin
  1529. if (p.typ = ait_instruction) and
  1530. RefInInstruction(ref, p, RefsEq, size)
  1531. then TmpResult := True;
  1532. inc(Counter);
  1533. GetNextInstruction(p,p)
  1534. end;
  1535. RefInSequence := TmpResult
  1536. end;
  1537. {$ifdef q+}
  1538. {$q-}
  1539. {$define overflowon}
  1540. {$endif q+}
  1541. // checks whether a write to r2 of size "size" contains address r1
  1542. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1543. var
  1544. realsize1, realsize2: aint;
  1545. begin
  1546. realsize1 := tcgsize2size[size1];
  1547. realsize2 := tcgsize2size[size2];
  1548. arrayrefsoverlapping :=
  1549. (r2.offset <= r1.offset+realsize1) and
  1550. (r1.offset <= r2.offset+realsize2) and
  1551. (r1.segment = r2.segment) and
  1552. (r1.symbol=r2.symbol) and
  1553. (r1.base = r2.base)
  1554. end;
  1555. {$ifdef overflowon}
  1556. {$q+}
  1557. {$undef overflowon}
  1558. {$endif overflowon}
  1559. function isSimpleRef(const ref: treference): boolean;
  1560. { returns true if ref is reference to a local or global variable, to a }
  1561. { parameter or to an object field (this includes arrays). Returns false }
  1562. { otherwise. }
  1563. begin
  1564. isSimpleRef :=
  1565. assigned(ref.symbol) or
  1566. (ref.base = current_procinfo.framepointer);
  1567. end;
  1568. function containsPointerRef(p: tai): boolean;
  1569. { checks if an instruction contains a reference which is a pointer location }
  1570. var
  1571. hp: taicpu;
  1572. count: longint;
  1573. begin
  1574. containsPointerRef := false;
  1575. if p.typ <> ait_instruction then
  1576. exit;
  1577. hp := taicpu(p);
  1578. for count := 0 to hp.ops-1 do
  1579. begin
  1580. case hp.oper[count]^.typ of
  1581. top_ref:
  1582. if not isSimpleRef(hp.oper[count]^.ref^) then
  1583. begin
  1584. containsPointerRef := true;
  1585. exit;
  1586. end;
  1587. top_none:
  1588. exit;
  1589. end;
  1590. end;
  1591. end;
  1592. function containsPointerLoad(c: tcontent): boolean;
  1593. { checks whether the contents of a register contain a pointer reference }
  1594. var
  1595. p: tai;
  1596. count: longint;
  1597. begin
  1598. containsPointerLoad := false;
  1599. p := c.startmod;
  1600. for count := c.nrOfMods downto 1 do
  1601. begin
  1602. if containsPointerRef(p) then
  1603. begin
  1604. containsPointerLoad := true;
  1605. exit;
  1606. end;
  1607. getnextinstruction(p,p);
  1608. end;
  1609. end;
  1610. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1611. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1612. { returns whether the contents c of reg are invalid after regWritten is }
  1613. { is written to ref }
  1614. var
  1615. refsEq: trefCompare;
  1616. begin
  1617. if isSimpleRef(ref) then
  1618. begin
  1619. if (ref.index <> NR_NO) or
  1620. (assigned(ref.symbol) and
  1621. (ref.base <> NR_NO)) then
  1622. { local/global variable or parameter which is an array }
  1623. refsEq := {$ifdef fpc}@{$endif}arrayRefsOverlapping
  1624. else
  1625. { local/global variable or parameter which is not an array }
  1626. refsEq := {$ifdef fpc}@{$endif}refsOverlapping;
  1627. invalsmemwrite :=
  1628. assigned(c.memwrite) and
  1629. ((not(cs_opt_size in aktoptimizerswitches) and
  1630. containsPointerRef(c.memwrite)) or
  1631. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1632. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1633. begin
  1634. writeToMemDestroysContents := false;
  1635. exit;
  1636. end;
  1637. { write something to a parameter, a local or global variable, so }
  1638. { * with uncertain optimizations on: }
  1639. { - destroy the contents of registers whose contents have somewhere a }
  1640. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1641. { are being written to memory) is not destroyed if it's StartMod is }
  1642. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1643. { expression based on ref) }
  1644. { * with uncertain optimizations off: }
  1645. { - also destroy registers that contain any pointer }
  1646. with c do
  1647. writeToMemDestroysContents :=
  1648. (typ in [con_ref,con_noRemoveRef]) and
  1649. ((not(cs_opt_size in aktoptimizerswitches) and
  1650. containsPointerLoad(c)
  1651. ) or
  1652. (refInSequence(ref,c,refsEq,size) and
  1653. ((supreg <> regWritten) or
  1654. not((nrOfMods = 1) and
  1655. {StarMod is always of the type ait_instruction}
  1656. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1657. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1658. )
  1659. )
  1660. )
  1661. );
  1662. end
  1663. else
  1664. { write something to a pointer location, so }
  1665. { * with uncertain optimzations on: }
  1666. { - do not destroy registers which contain a local/global variable or }
  1667. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1668. { * with uncertain optimzations off: }
  1669. { - destroy every register which contains a memory location }
  1670. begin
  1671. invalsmemwrite :=
  1672. assigned(c.memwrite) and
  1673. (not(cs_opt_size in aktoptimizerswitches) or
  1674. containsPointerRef(c.memwrite));
  1675. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1676. begin
  1677. writeToMemDestroysContents := false;
  1678. exit;
  1679. end;
  1680. with c do
  1681. writeToMemDestroysContents :=
  1682. (typ in [con_ref,con_noRemoveRef]) and
  1683. (not(cs_opt_size in aktoptimizerswitches) or
  1684. { for movsl }
  1685. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1686. { don't destroy if reg contains a parameter, local or global variable }
  1687. containsPointerLoad(c)
  1688. );
  1689. end;
  1690. end;
  1691. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1692. const c: tcontent): boolean;
  1693. { returns whether the contents c of reg are invalid after destReg is }
  1694. { modified }
  1695. begin
  1696. writeToRegDestroysContents :=
  1697. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1698. sequenceDependsOnReg(c,supreg,destReg);
  1699. end;
  1700. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1701. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1702. { returns whether the contents c of reg are invalid after regWritten is }
  1703. { is written to op }
  1704. begin
  1705. memwritedestroyed := false;
  1706. case op.typ of
  1707. top_reg:
  1708. writeDestroysContents :=
  1709. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1710. top_ref:
  1711. writeDestroysContents :=
  1712. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1713. else
  1714. writeDestroysContents := false;
  1715. end;
  1716. end;
  1717. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1718. { destroys all registers which possibly contain a reference to ref, regWritten }
  1719. { is the register whose contents are being written to memory (if this proc }
  1720. { is called because of a "mov?? %reg, (mem)" instruction) }
  1721. var
  1722. counter: tsuperregister;
  1723. destroymemwrite: boolean;
  1724. begin
  1725. for counter := RS_EAX to RS_EDI Do
  1726. begin
  1727. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1728. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1729. destroyReg(ptaiprop(p.optInfo), counter, false)
  1730. else if destroymemwrite then
  1731. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1732. end;
  1733. end;
  1734. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1735. var Counter: tsuperregister;
  1736. begin {initializes/desrtoys all registers}
  1737. For Counter := RS_EAX To RS_EDI Do
  1738. begin
  1739. if read then
  1740. readreg(p, Counter);
  1741. DestroyReg(p, Counter, written);
  1742. p^.regs[counter].MemWrite := nil;
  1743. end;
  1744. p^.DirFlag := F_Unknown;
  1745. end;
  1746. procedure DestroyOp(taiObj: tai; const o:Toper);
  1747. {$ifdef statedebug}
  1748. var
  1749. hp: tai;
  1750. {$endif statedebug}
  1751. begin
  1752. case o.typ Of
  1753. top_reg:
  1754. begin
  1755. {$ifdef statedebug}
  1756. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1757. hp.next := taiobj.next;
  1758. hp.previous := taiobj;
  1759. taiobj.next := hp;
  1760. if assigned(hp.next) then
  1761. hp.next.previous := hp;
  1762. {$endif statedebug}
  1763. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1764. end;
  1765. top_ref:
  1766. begin
  1767. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1768. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1769. end;
  1770. end;
  1771. end;
  1772. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1773. p: taicpu; supreg: tsuperregister);
  1774. {$ifdef statedebug}
  1775. var
  1776. hp: tai;
  1777. {$endif statedebug}
  1778. begin
  1779. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1780. if (typ in [con_ref,con_noRemoveRef]) then
  1781. begin
  1782. incState(wstate,1);
  1783. { also store how many instructions are part of the sequence in the first }
  1784. { instructions ptaiprop, so it can be easily accessed from within }
  1785. { CheckSequence}
  1786. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1787. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1788. NrOfInstrSinceLastMod[supreg] := 0;
  1789. invalidateDependingRegs(p.optinfo,supreg);
  1790. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1791. {$ifdef StateDebug}
  1792. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1793. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1794. InsertLLItem(AsmL, p, p.next, hp);
  1795. {$endif StateDebug}
  1796. end
  1797. else
  1798. begin
  1799. {$ifdef statedebug}
  1800. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1801. insertllitem(asml,p,p.next,hp);
  1802. {$endif statedebug}
  1803. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1804. {$ifdef StateDebug}
  1805. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1806. InsertLLItem(AsmL, p, p.next, hp);
  1807. {$endif StateDebug}
  1808. end
  1809. end;
  1810. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1811. p: taicpu; const oper: TOper);
  1812. begin
  1813. if oper.typ = top_reg then
  1814. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1815. else
  1816. begin
  1817. ReadOp(ptaiprop(p.optinfo), oper);
  1818. DestroyOp(p, oper);
  1819. end
  1820. end;
  1821. {*************************************************************************************}
  1822. {************************************** TDFAOBJ **************************************}
  1823. {*************************************************************************************}
  1824. constructor tdfaobj.create(_list: TAsmList);
  1825. begin
  1826. list := _list;
  1827. blockstart := nil;
  1828. blockend := nil;
  1829. nroftaiobjs := 0;
  1830. taipropblock := nil;
  1831. lolab := 0;
  1832. hilab := 0;
  1833. labdif := 0;
  1834. labeltable := nil;
  1835. end;
  1836. procedure tdfaobj.initlabeltable;
  1837. var
  1838. labelfound: boolean;
  1839. p, prev: tai;
  1840. hp1, hp2: tai;
  1841. {$ifdef i386}
  1842. regcounter,
  1843. supreg : tsuperregister;
  1844. {$endif i386}
  1845. usedregs, nodeallocregs: tregset;
  1846. begin
  1847. labelfound := false;
  1848. lolab := maxlongint;
  1849. hilab := 0;
  1850. p := blockstart;
  1851. prev := p;
  1852. while assigned(p) do
  1853. begin
  1854. if (tai(p).typ = ait_label) then
  1855. if not labelcanbeskipped(tai_label(p)) then
  1856. begin
  1857. labelfound := true;
  1858. if (tai_Label(p).labsym.labelnr < lolab) then
  1859. lolab := tai_label(p).labsym.labelnr;
  1860. if (tai_Label(p).labsym.labelnr > hilab) then
  1861. hilab := tai_label(p).labsym.labelnr;
  1862. end;
  1863. prev := p;
  1864. getnextinstruction(p, p);
  1865. end;
  1866. if (prev.typ = ait_marker) and
  1867. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1868. blockend := prev
  1869. else blockend := nil;
  1870. if labelfound then
  1871. labdif := hilab+1-lolab
  1872. else labdif := 0;
  1873. usedregs := [];
  1874. if (labdif <> 0) then
  1875. begin
  1876. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1877. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1878. end;
  1879. p := blockstart;
  1880. prev := p;
  1881. while (p <> blockend) do
  1882. begin
  1883. case p.typ of
  1884. ait_label:
  1885. if not labelcanbeskipped(tai_label(p)) then
  1886. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1887. {$ifdef i386}
  1888. ait_regalloc:
  1889. begin
  1890. supreg:=getsupreg(tai_regalloc(p).reg);
  1891. case tai_regalloc(p).ratype of
  1892. ra_alloc :
  1893. begin
  1894. if not(supreg in usedregs) then
  1895. include(usedregs, supreg)
  1896. else
  1897. begin
  1898. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1899. hp1 := tai(p.previous);
  1900. list.remove(p);
  1901. p.free;
  1902. p := hp1;
  1903. end;
  1904. end;
  1905. ra_dealloc :
  1906. begin
  1907. exclude(usedregs, supreg);
  1908. hp1 := p;
  1909. hp2 := nil;
  1910. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1911. getnextinstruction(hp1, hp1) and
  1912. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1913. hp2 := hp1;
  1914. if hp2 <> nil then
  1915. begin
  1916. hp1 := tai(p.previous);
  1917. list.remove(p);
  1918. insertllitem(list, hp2, tai(hp2.next), p);
  1919. p := hp1;
  1920. end
  1921. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1922. and getnextinstruction(p,hp1) then
  1923. begin
  1924. hp1 := tai(p.previous);
  1925. list.remove(p);
  1926. p.free;
  1927. p := hp1;
  1928. // don't include here, since then the allocation will be removed when it's processed
  1929. // include(usedregs,supreg);
  1930. end;
  1931. end;
  1932. end;
  1933. end;
  1934. {$endif i386}
  1935. end;
  1936. repeat
  1937. prev := p;
  1938. p := tai(p.next);
  1939. until not(assigned(p)) or
  1940. (p = blockend) or
  1941. not(p.typ in (skipinstr - [ait_regalloc]));
  1942. end;
  1943. {$ifdef i386}
  1944. { don't add deallocation for function result variable or for regvars}
  1945. getNoDeallocRegs(noDeallocRegs);
  1946. usedRegs := usedRegs - noDeallocRegs;
  1947. for regCounter := RS_EAX to RS_EDI do
  1948. if regCounter in usedRegs then
  1949. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1950. {$endif i386}
  1951. end;
  1952. function tdfaobj.pass_1(_blockstart: tai): tai;
  1953. begin
  1954. blockstart := _blockstart;
  1955. initlabeltable;
  1956. pass_1 := blockend;
  1957. end;
  1958. function tdfaobj.initdfapass2: boolean;
  1959. {reserves memory for the PtaiProps in one big memory block when not using
  1960. TP, returns False if not enough memory is available for the optimizer in all
  1961. cases}
  1962. var
  1963. p: tai;
  1964. count: Longint;
  1965. { TmpStr: String; }
  1966. begin
  1967. p := blockstart;
  1968. skiphead(p);
  1969. nroftaiobjs := 0;
  1970. while (p <> blockend) do
  1971. begin
  1972. {$ifDef JumpAnal}
  1973. case p.typ of
  1974. ait_label:
  1975. begin
  1976. if not labelcanbeskipped(tai_label(p)) then
  1977. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1978. end;
  1979. ait_instruction:
  1980. begin
  1981. if taicpu(p).is_jmp then
  1982. begin
  1983. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1984. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1985. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  1986. end;
  1987. end;
  1988. { ait_instruction:
  1989. begin
  1990. if (taicpu(p).opcode = A_PUSH) and
  1991. (taicpu(p).oper[0]^.typ = top_symbol) and
  1992. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1993. begin
  1994. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  1995. if}
  1996. end;
  1997. {$endif JumpAnal}
  1998. inc(NrOftaiObjs);
  1999. getnextinstruction(p,p);
  2000. end;
  2001. if nroftaiobjs <> 0 then
  2002. begin
  2003. initdfapass2 := True;
  2004. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2005. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2006. p := blockstart;
  2007. skiphead(p);
  2008. for count := 1 To nroftaiobjs do
  2009. begin
  2010. ptaiprop(p.optinfo) := @taipropblock^[count];
  2011. getnextinstruction(p, p);
  2012. end;
  2013. end
  2014. else
  2015. initdfapass2 := false;
  2016. end;
  2017. procedure tdfaobj.dodfapass2;
  2018. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2019. contents for the instructions starting with p. Returns the last tai which has
  2020. been processed}
  2021. var
  2022. curprop, LastFlagsChangeProp: ptaiprop;
  2023. Cnt, InstrCnt : Longint;
  2024. InstrProp: TInsProp;
  2025. UsedRegs: TRegSet;
  2026. prev,p : tai;
  2027. tmpref: TReference;
  2028. tmpsupreg: tsuperregister;
  2029. {$ifdef statedebug}
  2030. hp : tai;
  2031. {$endif}
  2032. {$ifdef AnalyzeLoops}
  2033. hp : tai;
  2034. TmpState: Byte;
  2035. {$endif AnalyzeLoops}
  2036. begin
  2037. p := BlockStart;
  2038. LastFlagsChangeProp := nil;
  2039. prev := nil;
  2040. UsedRegs := [];
  2041. UpdateUsedregs(UsedRegs, p);
  2042. SkipHead(p);
  2043. BlockStart := p;
  2044. InstrCnt := 1;
  2045. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2046. while (p <> Blockend) Do
  2047. begin
  2048. curprop := @taiPropBlock^[InstrCnt];
  2049. if assigned(prev)
  2050. then
  2051. begin
  2052. {$ifdef JumpAnal}
  2053. if (p.Typ <> ait_label) then
  2054. {$endif JumpAnal}
  2055. begin
  2056. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2057. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2058. curprop^.FlagsUsed := false;
  2059. end
  2060. end
  2061. else
  2062. begin
  2063. fillchar(curprop^, SizeOf(curprop^), 0);
  2064. { For tmpreg := RS_EAX to RS_EDI Do
  2065. curprop^.regs[tmpreg].WState := 1;}
  2066. end;
  2067. curprop^.UsedRegs := UsedRegs;
  2068. curprop^.CanBeRemoved := False;
  2069. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2070. For tmpsupreg := RS_EAX To RS_EDI Do
  2071. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2072. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2073. else
  2074. begin
  2075. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2076. curprop^.regs[tmpsupreg].typ := con_unknown;
  2077. end;
  2078. case p.typ Of
  2079. ait_marker:;
  2080. ait_label:
  2081. {$ifndef JumpAnal}
  2082. if not labelCanBeSkipped(tai_label(p)) then
  2083. DestroyAllRegs(curprop,false,false);
  2084. {$else JumpAnal}
  2085. begin
  2086. if not labelCanBeSkipped(tai_label(p)) then
  2087. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2088. {$ifDef AnalyzeLoops}
  2089. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2090. {$else AnalyzeLoops}
  2091. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2092. {$endif AnalyzeLoops}
  2093. then
  2094. {all jumps to this label have been found}
  2095. {$ifDef AnalyzeLoops}
  2096. if (JmpsProcessed > 0)
  2097. then
  2098. {$endif AnalyzeLoops}
  2099. {we've processed at least one jump to this label}
  2100. begin
  2101. if (GetLastInstruction(p, hp) and
  2102. not(((hp.typ = ait_instruction)) and
  2103. (taicpu_labeled(hp).is_jmp))
  2104. then
  2105. {previous instruction not a JMP -> the contents of the registers after the
  2106. previous intruction has been executed have to be taken into account as well}
  2107. For tmpsupreg := RS_EAX to RS_EDI Do
  2108. begin
  2109. if (curprop^.regs[tmpsupreg].WState <>
  2110. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2111. then DestroyReg(curprop, tmpsupreg, true)
  2112. end
  2113. end
  2114. {$ifDef AnalyzeLoops}
  2115. else
  2116. {a label from a backward jump (e.g. a loop), no jump to this label has
  2117. already been processed}
  2118. if GetLastInstruction(p, hp) and
  2119. not(hp.typ = ait_instruction) and
  2120. (taicpu_labeled(hp).opcode = A_JMP))
  2121. then
  2122. {previous instruction not a jmp, so keep all the registers' contents from the
  2123. previous instruction}
  2124. begin
  2125. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2126. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2127. end
  2128. else
  2129. {previous instruction a jmp and no jump to this label processed yet}
  2130. begin
  2131. hp := p;
  2132. Cnt := InstrCnt;
  2133. {continue until we find a jump to the label or a label which has already
  2134. been processed}
  2135. while GetNextInstruction(hp, hp) and
  2136. not((hp.typ = ait_instruction) and
  2137. (taicpu(hp).is_jmp) and
  2138. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2139. not((hp.typ = ait_label) and
  2140. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2141. = tai_Label(hp).labsym^.RefCount) and
  2142. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2143. inc(Cnt);
  2144. if (hp.typ = ait_label)
  2145. then
  2146. {there's a processed label after the current one}
  2147. begin
  2148. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2149. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2150. end
  2151. else
  2152. {there's no label anymore after the current one, or they haven't been
  2153. processed yet}
  2154. begin
  2155. GetLastInstruction(p, hp);
  2156. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2157. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2158. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2159. end
  2160. end
  2161. {$endif AnalyzeLoops}
  2162. else
  2163. {not all references to this label have been found, so destroy all registers}
  2164. begin
  2165. GetLastInstruction(p, hp);
  2166. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2167. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2168. DestroyAllRegs(curprop,true,true)
  2169. end;
  2170. end;
  2171. {$endif JumpAnal}
  2172. ait_stab, ait_force_line, ait_function_name:;
  2173. ait_align: ; { may destroy flags !!! }
  2174. ait_instruction:
  2175. begin
  2176. if taicpu(p).is_jmp or
  2177. (taicpu(p).opcode = A_JMP) then
  2178. begin
  2179. {$ifNDef JumpAnal}
  2180. for tmpsupreg := RS_EAX to RS_EDI do
  2181. with curprop^.regs[tmpsupreg] do
  2182. case typ of
  2183. con_ref: typ := con_noRemoveRef;
  2184. con_const: typ := con_noRemoveConst;
  2185. con_invalid: typ := con_unknown;
  2186. end;
  2187. {$else JumpAnal}
  2188. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2189. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2190. begin
  2191. if (InstrCnt < InstrNr)
  2192. then
  2193. {forward jump}
  2194. if (JmpsProcessed = 0) then
  2195. {no jump to this label has been processed yet}
  2196. begin
  2197. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2198. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2199. inc(JmpsProcessed);
  2200. end
  2201. else
  2202. begin
  2203. For tmpreg := RS_EAX to RS_EDI Do
  2204. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2205. curprop^.regs[tmpreg].WState) then
  2206. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2207. inc(JmpsProcessed);
  2208. end
  2209. {$ifdef AnalyzeLoops}
  2210. else
  2211. { backward jump, a loop for example}
  2212. { if (JmpsProcessed > 0) or
  2213. not(GetLastInstruction(taiObj, hp) and
  2214. (hp.typ = ait_labeled_instruction) and
  2215. (taicpu_labeled(hp).opcode = A_JMP))
  2216. then}
  2217. {instruction prior to label is not a jmp, or at least one jump to the label
  2218. has yet been processed}
  2219. begin
  2220. inc(JmpsProcessed);
  2221. For tmpreg := RS_EAX to RS_EDI Do
  2222. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2223. curprop^.regs[tmpreg].WState)
  2224. then
  2225. begin
  2226. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2227. Cnt := InstrNr;
  2228. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2229. begin
  2230. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2231. inc(Cnt);
  2232. end;
  2233. while (Cnt <= InstrCnt) Do
  2234. begin
  2235. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2236. inc(Cnt)
  2237. end
  2238. end;
  2239. end
  2240. { else }
  2241. {instruction prior to label is a jmp and no jumps to the label have yet been
  2242. processed}
  2243. { begin
  2244. inc(JmpsProcessed);
  2245. For tmpreg := RS_EAX to RS_EDI Do
  2246. begin
  2247. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2248. Cnt := InstrNr;
  2249. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2250. begin
  2251. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2252. inc(Cnt);
  2253. end;
  2254. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2255. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2256. begin
  2257. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2258. inc(Cnt);
  2259. end;
  2260. while (Cnt <= InstrCnt) Do
  2261. begin
  2262. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2263. inc(Cnt)
  2264. end
  2265. end
  2266. end}
  2267. {$endif AnalyzeLoops}
  2268. end;
  2269. {$endif JumpAnal}
  2270. end
  2271. else
  2272. begin
  2273. InstrProp := InsProp[taicpu(p).opcode];
  2274. case taicpu(p).opcode Of
  2275. A_MOV, A_MOVZX, A_MOVSX:
  2276. begin
  2277. case taicpu(p).oper[0]^.typ Of
  2278. top_ref, top_reg:
  2279. case taicpu(p).oper[1]^.typ Of
  2280. top_reg:
  2281. begin
  2282. {$ifdef statedebug}
  2283. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2284. insertllitem(list,p,p.next,hp);
  2285. {$endif statedebug}
  2286. readOp(curprop, taicpu(p).oper[0]^);
  2287. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2288. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2289. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2290. begin
  2291. with curprop^.regs[tmpsupreg] Do
  2292. begin
  2293. incState(wstate,1);
  2294. { also store how many instructions are part of the sequence in the first }
  2295. { instruction's ptaiprop, so it can be easily accessed from within }
  2296. { CheckSequence }
  2297. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2298. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2299. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2300. { Destroy the contents of the registers }
  2301. { that depended on the previous value of }
  2302. { this register }
  2303. invalidateDependingRegs(curprop,tmpsupreg);
  2304. curprop^.regs[tmpsupreg].memwrite := nil;
  2305. end;
  2306. end
  2307. else
  2308. begin
  2309. {$ifdef statedebug}
  2310. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2311. insertllitem(list,p,p.next,hp);
  2312. {$endif statedebug}
  2313. destroyReg(curprop, tmpsupreg, true);
  2314. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2315. with curprop^.regs[tmpsupreg] Do
  2316. begin
  2317. typ := con_ref;
  2318. startmod := p;
  2319. nrOfMods := 1;
  2320. end
  2321. end;
  2322. {$ifdef StateDebug}
  2323. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2324. insertllitem(list,p,p.next,hp);
  2325. {$endif StateDebug}
  2326. end;
  2327. top_ref:
  2328. begin
  2329. readref(curprop, taicpu(p).oper[1]^.ref);
  2330. if taicpu(p).oper[0]^.typ = top_reg then
  2331. begin
  2332. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2333. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2334. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2335. taicpu(p);
  2336. end
  2337. else
  2338. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2339. end;
  2340. end;
  2341. top_Const:
  2342. begin
  2343. case taicpu(p).oper[1]^.typ Of
  2344. top_reg:
  2345. begin
  2346. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2347. {$ifdef statedebug}
  2348. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2349. insertllitem(list,p,p.next,hp);
  2350. {$endif statedebug}
  2351. With curprop^.regs[tmpsupreg] Do
  2352. begin
  2353. DestroyReg(curprop, tmpsupreg, true);
  2354. typ := Con_Const;
  2355. StartMod := p;
  2356. nrOfMods := 1;
  2357. end
  2358. end;
  2359. top_ref:
  2360. begin
  2361. readref(curprop, taicpu(p).oper[1]^.ref);
  2362. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2363. end;
  2364. end;
  2365. end;
  2366. end;
  2367. end;
  2368. A_DIV, A_IDIV, A_MUL:
  2369. begin
  2370. ReadOp(curprop, taicpu(p).oper[0]^);
  2371. readreg(curprop,RS_EAX);
  2372. if (taicpu(p).OpCode = A_IDIV) or
  2373. (taicpu(p).OpCode = A_DIV) then
  2374. begin
  2375. readreg(curprop,RS_EDX);
  2376. end;
  2377. {$ifdef statedebug}
  2378. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2379. insertllitem(list,p,p.next,hp);
  2380. {$endif statedebug}
  2381. { DestroyReg(curprop, RS_EAX, true);}
  2382. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2383. taicpu(p), RS_EAX);
  2384. DestroyReg(curprop, RS_EDX, true);
  2385. LastFlagsChangeProp := curprop;
  2386. end;
  2387. A_IMUL:
  2388. begin
  2389. ReadOp(curprop,taicpu(p).oper[0]^);
  2390. if (taicpu(p).ops >= 2) then
  2391. ReadOp(curprop,taicpu(p).oper[1]^);
  2392. if (taicpu(p).ops <= 2) then
  2393. if (taicpu(p).ops=1) then
  2394. begin
  2395. readreg(curprop,RS_EAX);
  2396. {$ifdef statedebug}
  2397. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2398. insertllitem(list,p,p.next,hp);
  2399. {$endif statedebug}
  2400. { DestroyReg(curprop, RS_EAX, true); }
  2401. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2402. taicpu(p), RS_EAX);
  2403. DestroyReg(curprop,RS_EDX, true)
  2404. end
  2405. else
  2406. AddInstr2OpContents(
  2407. {$ifdef statedebug}list,{$endif}
  2408. taicpu(p), taicpu(p).oper[1]^)
  2409. else
  2410. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2411. taicpu(p), taicpu(p).oper[2]^);
  2412. LastFlagsChangeProp := curprop;
  2413. end;
  2414. A_LEA:
  2415. begin
  2416. readop(curprop,taicpu(p).oper[0]^);
  2417. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2418. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2419. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2420. else
  2421. begin
  2422. {$ifdef statedebug}
  2423. hp := tai_comment.Create(strpnew('destroying & initing'+
  2424. std_regname(taicpu(p).oper[1]^.reg)));
  2425. insertllitem(list,p,p.next,hp);
  2426. {$endif statedebug}
  2427. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2428. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2429. begin
  2430. typ := con_ref;
  2431. startmod := p;
  2432. nrOfMods := 1;
  2433. end
  2434. end;
  2435. end;
  2436. else
  2437. begin
  2438. Cnt := 1;
  2439. while (Cnt <= maxinschanges) and
  2440. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2441. begin
  2442. case InstrProp.Ch[Cnt] Of
  2443. Ch_REAX..Ch_REDI:
  2444. begin
  2445. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2446. readreg(curprop,tmpsupreg);
  2447. end;
  2448. Ch_WEAX..Ch_RWEDI:
  2449. begin
  2450. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2451. begin
  2452. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2453. readreg(curprop,tmpsupreg);
  2454. end;
  2455. {$ifdef statedebug}
  2456. hp := tai_comment.Create(strpnew('destroying '+
  2457. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2458. insertllitem(list,p,p.next,hp);
  2459. {$endif statedebug}
  2460. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2461. DestroyReg(curprop,tmpsupreg, true);
  2462. end;
  2463. Ch_MEAX..Ch_MEDI:
  2464. begin
  2465. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2466. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2467. taicpu(p),tmpsupreg);
  2468. end;
  2469. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2470. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2471. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2472. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2473. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2474. Ch_Wop1..Ch_RWop1:
  2475. begin
  2476. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2477. ReadOp(curprop, taicpu(p).oper[0]^);
  2478. DestroyOp(p, taicpu(p).oper[0]^);
  2479. end;
  2480. Ch_Mop1:
  2481. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2482. taicpu(p), taicpu(p).oper[0]^);
  2483. Ch_Wop2..Ch_RWop2:
  2484. begin
  2485. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2486. ReadOp(curprop, taicpu(p).oper[1]^);
  2487. DestroyOp(p, taicpu(p).oper[1]^);
  2488. end;
  2489. Ch_Mop2:
  2490. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2491. taicpu(p), taicpu(p).oper[1]^);
  2492. Ch_WOp3..Ch_RWOp3:
  2493. begin
  2494. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2495. ReadOp(curprop, taicpu(p).oper[2]^);
  2496. DestroyOp(p, taicpu(p).oper[2]^);
  2497. end;
  2498. Ch_Mop3:
  2499. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2500. taicpu(p), taicpu(p).oper[2]^);
  2501. Ch_WMemEDI:
  2502. begin
  2503. readreg(curprop, RS_EDI);
  2504. fillchar(tmpref, SizeOf(tmpref), 0);
  2505. tmpref.base := NR_EDI;
  2506. tmpref.index := NR_EDI;
  2507. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2508. end;
  2509. Ch_RFlags:
  2510. if assigned(LastFlagsChangeProp) then
  2511. LastFlagsChangeProp^.FlagsUsed := true;
  2512. Ch_WFlags:
  2513. LastFlagsChangeProp := curprop;
  2514. Ch_RWFlags:
  2515. begin
  2516. if assigned(LastFlagsChangeProp) then
  2517. LastFlagsChangeProp^.FlagsUsed := true;
  2518. LastFlagsChangeProp := curprop;
  2519. end;
  2520. Ch_FPU:;
  2521. else
  2522. begin
  2523. {$ifdef statedebug}
  2524. hp := tai_comment.Create(strpnew(
  2525. 'destroying all regs for prev instruction'));
  2526. insertllitem(list,p, p.next,hp);
  2527. {$endif statedebug}
  2528. DestroyAllRegs(curprop,true,true);
  2529. LastFlagsChangeProp := curprop;
  2530. end;
  2531. end;
  2532. inc(Cnt);
  2533. end
  2534. end;
  2535. end;
  2536. end;
  2537. end
  2538. else
  2539. begin
  2540. {$ifdef statedebug}
  2541. hp := tai_comment.Create(strpnew(
  2542. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2543. insertllitem(list,p, p.next,hp);
  2544. {$endif statedebug}
  2545. DestroyAllRegs(curprop,true,true);
  2546. end;
  2547. end;
  2548. inc(InstrCnt);
  2549. prev := p;
  2550. GetNextInstruction(p, p);
  2551. end;
  2552. end;
  2553. function tdfaobj.pass_2: boolean;
  2554. begin
  2555. if initdfapass2 then
  2556. begin
  2557. dodfapass2;
  2558. pass_2 := true
  2559. end
  2560. else
  2561. pass_2 := false;
  2562. end;
  2563. {$ifopt r+}
  2564. {$define rangewason}
  2565. {$r-}
  2566. {$endif}
  2567. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2568. begin
  2569. if (sym.labelnr >= lolab) and
  2570. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2571. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2572. else
  2573. getlabelwithsym := nil;
  2574. end;
  2575. {$ifdef rangewason}
  2576. {$r+}
  2577. {$undef rangewason}
  2578. {$endif}
  2579. procedure tdfaobj.clear;
  2580. begin
  2581. if labdif <> 0 then
  2582. begin
  2583. freemem(labeltable);
  2584. labeltable := nil;
  2585. end;
  2586. if assigned(taipropblock) then
  2587. begin
  2588. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2589. taipropblock := nil;
  2590. end;
  2591. end;
  2592. end.