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freepascal.compiler
tükrözi: https://gitlab.com/freepascal.org/fpc/source.git
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freepascal.comp...
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compiler
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x86_64
nickysn a8fe46c0f5 + introduced labelmaxlen in tasminfo and added code in ReplaceForbiddenAsmSymbolChars that limits the 5 éve
..
aoptcpu.pas 892454ff17 * patch by J. Gareth Moreton: optimize MOVSXD as well, resolves #36700 5 éve
aoptcpub.pas 9b0ff05ee8 - get rid of MaxOps, it is redundant with max_operands 6 éve
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 éve
cgcpu.pas ef3155c2ef * there is no exit stackframe needed if a subroutine never returns 5 éve
cpubase.inc 7de177e3f3 * fixed x86-64 NR_RETURN_ADDRESS_REG 6 éve
cpuelf.pas a8fe46c0f5 + introduced labelmaxlen in tasminfo and added code in ReplaceForbiddenAsmSymbolChars that limits the 5 éve
cpuinfo.pas ef87879402 * common naming for fpu_none string 5 éve
cpunode.pas 597a23d278 + tls support for x86_64-linux (not yet enabled by default) 6 éve
cpupara.pas 1a9e246c29 * added is_normal_fieldvarsym() helper and use it 5 éve
cpupi.pas ded001753d + initial native x86-64 support 6 éve
cputarg.pas 10b15628ab * split i/t_darwin from i/t_bsd, as they don't have that much in common 5 éve
hlcgcpu.pas 3fee990218 * on Mach-O, PECOFF and ELF platforms, write local symbols as hidden/ 6 éve
nx64add.pas ce598c15ec * factored out the conditions under which add nodes need to perform 6 éve
nx64cal.pas b1dff29cbf * removed unused units 8 éve
nx64cnv.pas b1dff29cbf * removed unused units 8 éve
nx64flw.pas 2e259ee3cc * the VMT of the exception class needs to be referenced indirectly 5 éve
nx64inl.pas 1bcc276dcf * remove implicit typecast to extended automatically inserted for trunc/round 10 éve
nx64mat.pas 8c5606b41d + support mmx shifting 7 éve
nx64set.pas ba1b4b1c92 + support for verifying whether a case statements handles all possibilities 6 éve
r8664ari.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664att.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664con.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664dwrf.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664int.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664iri.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664nasm.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664nor.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664num.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664ot.inc 867d145e50 support vector operand bcst,{sae},{er} + k-register 7 éve
r8664rni.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664sri.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664stab.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
r8664std.inc 4dc5442fa5 support vector operand writemask,zeroflag 7 éve
rax64att.pas 2f74a51eb8 * fix .seh_savereg: the offset is checked with a bitmask, not a divisor, so use "and", not "mod" 7 éve
rax64int.pas 3b779278e2 + (slightly) patch by Emelyanov Roman to add support of SEH directive in FPC internal assembler with INTEL syntax, resolves #29894 7 éve
rgcpu.pas a3f58e84be * rbp can be used for normal purpose under certain conditions so it shouldn't interfere with all other registers 11 éve
symcpu.pas acf02ab64b * when creating wrappers, add a prefix to parameter names to prevent them 6 éve
win64unw.pas 2b59000d56 + implement compiler support for SEH on Win64 5 éve
x8664ats.inc 1454e8b29d new avx512-opcodes VBMI2,VNNI,BITALG ... 5 éve
x8664att.inc 1454e8b29d new avx512-opcodes VBMI2,VNNI,BITALG ... 5 éve
x8664int.inc 1454e8b29d new avx512-opcodes VBMI2,VNNI,BITALG ... 5 éve
x8664nop.inc 1454e8b29d new avx512-opcodes VBMI2,VNNI,BITALG ... 5 éve
x8664op.inc 1454e8b29d new avx512-opcodes VBMI2,VNNI,BITALG ... 5 éve
x8664pro.inc 30927039a6 + MULX instruction 5 éve
x8664tab.inc 1454e8b29d new avx512-opcodes VBMI2,VNNI,BITALG ... 5 éve