rax86.pas 81 KB

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  1. {
  2. Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
  3. Handles the common x86 assembler reader routines
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {
  18. Contains the common x86 (i386 and x86-64) assembler reader routines.
  19. }
  20. unit rax86;
  21. {$i fpcdefs.inc}
  22. interface
  23. uses
  24. aasmbase,aasmtai,aasmdata,aasmcpu,
  25. cpubase,rautils,cclasses;
  26. { Parser helpers }
  27. function is_prefix(t:tasmop):boolean;
  28. function is_override(t:tasmop):boolean;
  29. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  30. Function CheckOverride(overrideop,op:tasmop): Boolean;
  31. Procedure FWaitWarning;
  32. type
  33. Tx86Operand=class(TOperand)
  34. opsize : topsize;
  35. vopext : smallint; // bitmask: vector-operand extention AVX512 (e.g. vaddps xmm0 {k1} {z})
  36. vbcst : byte;
  37. Procedure SetSize(_size:longint;force:boolean);override;
  38. Procedure SetCorrectSize(opcode:tasmop);override;
  39. Function CheckOperand: boolean; override;
  40. { handles the @Code symbol }
  41. Procedure SetupCode;
  42. { handles the @Data symbol }
  43. Procedure SetupData;
  44. constructor create; override;
  45. end;
  46. { Operands are always in AT&T order.
  47. Intel reader attaches them right-to-left, then shifts to start with 1 }
  48. { Tx86Instruction }
  49. Tx86Instruction=class(TInstruction)
  50. opsize : topsize;
  51. constructor Create(optype : tcoperand);override;
  52. { Operand sizes }
  53. procedure AddReferenceSizes; virtual;
  54. procedure SetInstructionOpsize;
  55. procedure CheckOperandSizes;
  56. procedure CheckNonCommutativeOpcodes;
  57. { Additional actions required by specific reader }
  58. procedure FixupOpcode;virtual;
  59. { opcode adding }
  60. function ConcatInstruction(p : TAsmList) : tai;override;
  61. function getstring: string;
  62. { returns true, if the opcode might have an extension as used by AVX512 }
  63. function MightHaveExtension : boolean;
  64. end;
  65. const
  66. AsmPrefixes = 8{$ifdef i8086}+2{$endif i8086};
  67. AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
  68. A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ,A_XACQUIRE,A_XRELEASE{$ifdef i8086},A_REPC,A_REPNC{$endif i8086}
  69. );
  70. AsmOverrides = 6;
  71. AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
  72. A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
  73. );
  74. CondAsmOps=3;
  75. CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
  76. A_CMOVcc, A_Jcc, A_SETcc
  77. );
  78. CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
  79. 'CMOV','J','SET'
  80. );
  81. implementation
  82. uses
  83. globtype,globals,systems,verbose,
  84. procinfo,
  85. cgbase,cgutils,
  86. itcpugas,cgx86, cutils;
  87. {*****************************************************************************
  88. Parser Helpers
  89. *****************************************************************************}
  90. function is_prefix(t:tasmop):boolean;
  91. var
  92. i : longint;
  93. Begin
  94. is_prefix:=false;
  95. for i:=1 to AsmPrefixes do
  96. if t=AsmPrefix[i-1] then
  97. begin
  98. is_prefix:=true;
  99. exit;
  100. end;
  101. end;
  102. function is_override(t:tasmop):boolean;
  103. var
  104. i : longint;
  105. Begin
  106. is_override:=false;
  107. for i:=1 to AsmOverrides do
  108. if t=AsmOverride[i-1] then
  109. begin
  110. is_override:=true;
  111. exit;
  112. end;
  113. end;
  114. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  115. { Checks if the prefix is valid with the following opcode }
  116. { return false if not, otherwise true }
  117. Begin
  118. CheckPrefix := TRUE;
  119. (* Case prefix of
  120. A_REP,A_REPNE,A_REPE:
  121. Case opcode Of
  122. A_SCASB,A_SCASW,A_SCASD,
  123. A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
  124. Else
  125. Begin
  126. CheckPrefix := FALSE;
  127. exit;
  128. end;
  129. end; { case }
  130. A_LOCK:
  131. Case opcode Of
  132. A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
  133. A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
  134. Else
  135. Begin
  136. CheckPrefix := FALSE;
  137. Exit;
  138. end;
  139. end; { case }
  140. A_NONE: exit; { no prefix here }
  141. else
  142. CheckPrefix := FALSE;
  143. end; { end case } *)
  144. end;
  145. Function CheckOverride(overrideop,op:tasmop): Boolean;
  146. { Check if the override is valid, and if so then }
  147. { update the instr variable accordingly. }
  148. Begin
  149. CheckOverride := true;
  150. { Case instr.getinstruction of
  151. A_MOVS,A_XLAT,A_CMPS:
  152. Begin
  153. CheckOverride := TRUE;
  154. Message(assem_e_segment_override_not_supported);
  155. end
  156. end }
  157. end;
  158. Procedure FWaitWarning;
  159. begin
  160. if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in current_settings.moduleswitches) then
  161. Message(asmr_w_fwait_emu_prob);
  162. end;
  163. {*****************************************************************************
  164. TX86Operand
  165. *****************************************************************************}
  166. Procedure Tx86Operand.SetSize(_size:longint;force:boolean);
  167. begin
  168. inherited SetSize(_size,force);
  169. { OS_64 will be set to S_L and be fixed later
  170. in SetCorrectSize }
  171. // multimedia register
  172. case _size of
  173. 16: size := OS_M128;
  174. 32: size := OS_M256;
  175. 64: size := OS_M512;
  176. end;
  177. {$ifdef i8086}
  178. { allows e.g. using 32-bit registers in i8086 inline asm }
  179. if size in [OS_32,OS_S32] then
  180. opsize:=S_L
  181. else
  182. {$endif i8086}
  183. opsize:=TCGSize2Opsize[size];
  184. end;
  185. Procedure Tx86Operand.SetCorrectSize(opcode:tasmop);
  186. begin
  187. if gas_needsuffix[opcode]=attsufFPU then
  188. begin
  189. case size of
  190. OS_32 : opsize:=S_FS;
  191. OS_64 : opsize:=S_FL;
  192. else
  193. ;
  194. end;
  195. end
  196. else if gas_needsuffix[opcode]=attsufFPUint then
  197. begin
  198. case size of
  199. OS_16 : opsize:=S_IS;
  200. OS_32 : opsize:=S_IL;
  201. OS_64 : opsize:=S_IQ;
  202. else
  203. ;
  204. end;
  205. end
  206. else if gas_needsuffix[opcode] in [AttSufMM, AttSufMMX, AttSufMMS] then
  207. begin
  208. if (opr.typ=OPR_Reference) then
  209. begin
  210. case size of
  211. OS_32 : size := OS_M32;
  212. OS_64 : size := OS_M64;
  213. else
  214. ;
  215. end;
  216. end;
  217. end
  218. else
  219. begin
  220. if size=OS_64 then
  221. opsize:=S_Q;
  222. end;
  223. end;
  224. Function Tx86Operand.CheckOperand: boolean;
  225. var
  226. ErrorRefStr: string;
  227. begin
  228. result:=true;
  229. if (opr.typ=OPR_Reference) then
  230. begin
  231. if not hasvar then
  232. begin
  233. if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset>0) then
  234. begin
  235. if current_settings.asmmode in asmmodes_x86_intel then
  236. begin
  237. case getsubreg(opr.ref.base) of
  238. R_SUBW:
  239. ErrorRefStr:='[BP+offset]';
  240. R_SUBD:
  241. ErrorRefStr:='[EBP+offset]';
  242. R_SUBQ:
  243. ErrorRefStr:='[RBP+offset]';
  244. else
  245. internalerror(2019061001);
  246. end;
  247. end
  248. else
  249. begin
  250. case getsubreg(opr.ref.base) of
  251. R_SUBW:
  252. ErrorRefStr:='+offset(%bp)';
  253. R_SUBD:
  254. ErrorRefStr:='+offset(%ebp)';
  255. R_SUBQ:
  256. ErrorRefStr:='+offset(%rbp)';
  257. else
  258. internalerror(2019061002);
  259. end;
  260. end;
  261. if current_procinfo.procdef.proccalloption=pocall_register then
  262. message1(asmr_w_no_direct_ebp_for_parameter,ErrorRefStr)
  263. else
  264. message1(asmr_w_direct_ebp_for_parameter_regcall,ErrorRefStr);
  265. end
  266. else if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset<0) then
  267. begin
  268. if current_settings.asmmode in asmmodes_x86_intel then
  269. begin
  270. case getsubreg(opr.ref.base) of
  271. R_SUBW:
  272. ErrorRefStr:='[BP-offset]';
  273. R_SUBD:
  274. ErrorRefStr:='[EBP-offset]';
  275. R_SUBQ:
  276. ErrorRefStr:='[RBP-offset]';
  277. else
  278. internalerror(2019061003);
  279. end;
  280. end
  281. else
  282. begin
  283. case getsubreg(opr.ref.base) of
  284. R_SUBW:
  285. ErrorRefStr:='-offset(%bp)';
  286. R_SUBD:
  287. ErrorRefStr:='-offset(%ebp)';
  288. R_SUBQ:
  289. ErrorRefStr:='-offset(%rbp)';
  290. else
  291. internalerror(2019061004);
  292. end;
  293. end;
  294. message1(asmr_w_direct_ebp_neg_offset,ErrorRefStr);
  295. end
  296. else if (getsupreg(opr.ref.base)=RS_ESP) and (getsubreg(opr.ref.base)<>R_SUBW) and (opr.ref.offset<0) then
  297. begin
  298. if current_settings.asmmode in asmmodes_x86_intel then
  299. begin
  300. case getsubreg(opr.ref.base) of
  301. R_SUBD:
  302. ErrorRefStr:='[ESP-offset]';
  303. R_SUBQ:
  304. ErrorRefStr:='[RSP-offset]';
  305. else
  306. internalerror(2019061005);
  307. end;
  308. end
  309. else
  310. begin
  311. case getsubreg(opr.ref.base) of
  312. R_SUBD:
  313. ErrorRefStr:='-offset(%esp)';
  314. R_SUBQ:
  315. ErrorRefStr:='-offset(%rsp)';
  316. else
  317. internalerror(2019061006);
  318. end;
  319. end;
  320. message1(asmr_w_direct_esp_neg_offset,ErrorRefStr);
  321. end;
  322. end;
  323. if (cs_create_pic in current_settings.moduleswitches) and
  324. assigned(opr.ref.symbol) and
  325. not assigned(opr.ref.relsymbol) then
  326. begin
  327. if not(opr.ref.refaddr in [addr_pic,addr_pic_no_got]) then
  328. begin
  329. if (opr.ref.symbol.name <> '_GLOBAL_OFFSET_TABLE_') then
  330. begin
  331. message(asmr_e_need_pic_ref);
  332. result:=false;
  333. end
  334. else
  335. opr.ref.refaddr:=addr_pic;
  336. end
  337. else
  338. begin
  339. {$ifdef x86_64}
  340. { should probably be extended to i386, but there the situation
  341. is more complex and ELF-style PIC still need to be
  342. tested/debugged }
  343. if (opr.ref.symbol.bind in [AB_LOCAL,AB_PRIVATE_EXTERN]) and
  344. (opr.ref.refaddr=addr_pic) then
  345. message(asmr_w_useless_got_for_local)
  346. else if (opr.ref.symbol.bind in [AB_GLOBAL,AB_EXTERNAL,AB_COMMON,AB_WEAK_EXTERNAL]) and
  347. (opr.ref.refaddr=addr_pic_no_got) then
  348. message(asmr_w_global_access_without_got);
  349. {$endif x86_64}
  350. end;
  351. end;
  352. end;
  353. end;
  354. procedure Tx86Operand.SetupCode;
  355. begin
  356. {$ifdef i8086}
  357. opr.typ:=OPR_SYMBOL;
  358. opr.symofs:=0;
  359. opr.symbol:=current_asmdata.RefAsmSymbol(current_procinfo.procdef.mangledname,AT_FUNCTION);
  360. opr.symseg:=true;
  361. opr.sym_farproc_entry:=false;
  362. {$else i8086}
  363. Message(asmr_w_CODE_and_DATA_not_supported);
  364. {$endif i8086}
  365. end;
  366. procedure Tx86Operand.SetupData;
  367. begin
  368. {$ifdef i8086}
  369. InitRef;
  370. if current_settings.x86memorymodel=mm_huge then
  371. opr.ref.refaddr:=addr_fardataseg
  372. else
  373. opr.ref.refaddr:=addr_dgroup;
  374. {$else i8086}
  375. Message(asmr_w_CODE_and_DATA_not_supported);
  376. {$endif i8086}
  377. end;
  378. constructor Tx86Operand.create;
  379. begin
  380. inherited;
  381. vopext := 0;
  382. vbcst := 0;
  383. end;
  384. {*****************************************************************************
  385. T386Instruction
  386. *****************************************************************************}
  387. constructor Tx86Instruction.Create(optype : tcoperand);
  388. begin
  389. inherited Create(optype);
  390. Opsize:=S_NO;
  391. end;
  392. procedure Tx86Instruction.AddReferenceSizes;
  393. { this will add the sizes for references like [esi] which do not
  394. have the size set yet, it will take only the size if the other
  395. operand is a register }
  396. var
  397. operand2,i,j,k : longint;
  398. s : tasmsymbol;
  399. so : aint;
  400. ExistsMemRefNoSize: boolean;
  401. ExistsMemRef: boolean;
  402. ExistsConstNoSize: boolean;
  403. ExistConst: boolean;
  404. ExistsLocalSymSize: boolean;
  405. ExistsBCST: boolean;
  406. memrefsize: integer;
  407. memopsize: integer;
  408. memoffset: asizeint;
  409. vbcst: byte;
  410. mmregs: Set of TSubregister;
  411. multiplicator: integer;
  412. bcst1,bcst2: string;
  413. begin
  414. ExistsMemRefNoSize := false;
  415. ExistsMemRef := false;
  416. ExistsConstNoSize := false;
  417. ExistsLocalSymSize := false;
  418. ExistsBCST := false;
  419. // EXIST A MEMORY- OR CONSTANT-OPERAND WITHOUT SIZE ?
  420. for i := 1 to ops do
  421. begin
  422. if operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL] then
  423. begin
  424. ExistsMemRef := true;
  425. ExistsBCST := (MemRefInfo(opcode).ExistsSSEAVX) and
  426. (tx86operand(operands[i]).vbcst <> 0);
  427. if (tx86operand(operands[i]).opsize = S_NO) then
  428. begin
  429. ExistsMemRefNoSize := true;
  430. case operands[i].opr.Typ of
  431. OPR_LOCAL: ExistsLocalSymSize := tx86operand(operands[i]).opr.localsym.getsize > 0;
  432. OPR_REFERENCE: ExistsLocalSymSize := true;
  433. else
  434. ;
  435. end;
  436. end;
  437. end
  438. else if operands[i].Opr.Typ in [OPR_CONSTANT] then
  439. begin
  440. ExistsConstNoSize := tx86operand(operands[i]).opsize = S_NO;
  441. end;
  442. end;
  443. // ONLY SUPPORTED OPCODES WITH SSE- OR AVX-REGISTERS
  444. if (ExistsMemRef) and
  445. (MemRefInfo(opcode).ExistsSSEAVX) then
  446. begin
  447. // 1. WE HAVE AN SSE- OR AVX-OPCODE WITH MEMORY OPERAND
  448. if (not(ExistsMemRefNoSize)) or
  449. (ExistsLocalSymSize) then
  450. begin
  451. // 2. WE KNOWN THE MEMORYSIZE OF THE MEMORY-OPERAND OR WE CAN
  452. // CALC THE MEMORYSIZE
  453. // 3. CALC THE SIZE OF THE MEMORYOPERAND BY OPCODE-DEFINITION
  454. // 4. COMPARE THE SIZE FROM OPCODE-DEFINITION AND THE REAL MEMORY-OPERAND-SIZE
  455. // - validate memory-reference-size
  456. for i := 1 to ops do
  457. begin
  458. if (operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL]) then
  459. begin
  460. memrefsize := -1;
  461. if ExistsBCST then
  462. begin
  463. case MemRefInfo(opcode).MemRefSizeBCST of
  464. msbBCST32: memrefsize := 32;
  465. msbBCST64: memrefsize := 64;
  466. else
  467. Internalerror(2019081005);
  468. end;
  469. end
  470. else
  471. case MemRefInfo(opcode).MemRefSize of
  472. msiMem8: memrefsize := 8;
  473. msiMem16: memrefsize := 16;
  474. msiMem32: memrefsize := 32;
  475. msiMem64: memrefsize := 64;
  476. msiMem128: memrefsize := 128;
  477. msiMem256: memrefsize := 256;
  478. msiMem512: memrefsize := 512;
  479. msiMemRegx16y32:
  480. begin
  481. for j := 1 to ops do
  482. begin
  483. if operands[j].Opr.Typ = OPR_REGISTER then
  484. begin
  485. case getsubreg(operands[j].opr.reg) of
  486. R_SUBMMX: memrefsize := 16;
  487. R_SUBMMY: memrefsize := 32;
  488. else Message(asmr_e_unable_to_determine_reference_size);
  489. end;
  490. end;
  491. end;
  492. end;
  493. msiMemRegx16y32z64:
  494. begin
  495. for j := 1 to ops do
  496. begin
  497. if operands[j].Opr.Typ = OPR_REGISTER then
  498. begin
  499. case getsubreg(operands[j].opr.reg) of
  500. R_SUBMMX: memrefsize := 16;
  501. R_SUBMMY: memrefsize := 32;
  502. R_SUBMMZ: memrefsize := 64;
  503. else Message(asmr_e_unable_to_determine_reference_size);
  504. end;
  505. end;
  506. end;
  507. end;
  508. msiMemRegx32y64:
  509. begin
  510. for j := 1 to ops do
  511. begin
  512. if operands[j].Opr.Typ = OPR_REGISTER then
  513. begin
  514. case getsubreg(operands[j].opr.reg) of
  515. R_SUBMMX: memrefsize := 32;
  516. R_SUBMMY: memrefsize := 64;
  517. else Message(asmr_e_unable_to_determine_reference_size);
  518. end;
  519. end;
  520. end;
  521. end;
  522. msiMemRegx32y64z128:
  523. begin
  524. for j := 1 to ops do
  525. begin
  526. if operands[j].Opr.Typ = OPR_REGISTER then
  527. begin
  528. case getsubreg(operands[j].opr.reg) of
  529. R_SUBMMX: memrefsize := 32;
  530. R_SUBMMY: memrefsize := 64;
  531. R_SUBMMZ: memrefsize := 128;
  532. else Message(asmr_e_unable_to_determine_reference_size);
  533. end;
  534. end;
  535. end;
  536. end;
  537. msiMemRegx64y128:
  538. begin
  539. for j := 1 to ops do
  540. begin
  541. if operands[j].Opr.Typ = OPR_REGISTER then
  542. begin
  543. case getsubreg(operands[j].opr.reg) of
  544. R_SUBMMX: memrefsize := 64;
  545. R_SUBMMY: memrefsize := 128;
  546. else Message(asmr_e_unable_to_determine_reference_size);
  547. end;
  548. end;
  549. end;
  550. end;
  551. msiMemRegx64y256:
  552. begin
  553. for j := 1 to ops do
  554. begin
  555. if operands[j].Opr.Typ = OPR_REGISTER then
  556. begin
  557. case getsubreg(operands[j].opr.reg) of
  558. R_SUBMMX: memrefsize := 64;
  559. R_SUBMMY: memrefsize := 256;
  560. else Message(asmr_e_unable_to_determine_reference_size);
  561. end;
  562. end;
  563. end;
  564. end;
  565. msiMemRegx64y128z256:
  566. begin
  567. begin
  568. for j := 1 to ops do
  569. begin
  570. if operands[j].Opr.Typ = OPR_REGISTER then
  571. begin
  572. case getsubreg(operands[j].opr.reg) of
  573. R_SUBMMX: memrefsize := 64;
  574. R_SUBMMY: memrefsize := 128;
  575. R_SUBMMZ: memrefsize := 256;
  576. else Message(asmr_e_unable_to_determine_reference_size);
  577. end;
  578. end;
  579. end;
  580. end;
  581. end;
  582. msiMemRegx64y256z512:
  583. begin
  584. begin
  585. for j := 1 to ops do
  586. begin
  587. if operands[j].Opr.Typ = OPR_REGISTER then
  588. begin
  589. case getsubreg(operands[j].opr.reg) of
  590. R_SUBMMX: memrefsize := 64;
  591. R_SUBMMY: memrefsize := 256;
  592. R_SUBMMZ: memrefsize := 512;
  593. else Message(asmr_e_unable_to_determine_reference_size);
  594. end;
  595. end;
  596. end;
  597. end;
  598. end;
  599. msiMemRegSize:
  600. begin
  601. for j := 1 to ops do
  602. begin
  603. if operands[j].Opr.Typ = OPR_REGISTER then
  604. begin
  605. if (tx86operand(operands[j]).opsize <> S_NO) and
  606. (tx86operand(operands[j]).size <> OS_NO) then
  607. begin
  608. case tx86operand(operands[j]).opsize of
  609. S_B : memrefsize := 8;
  610. S_W : memrefsize := 16;
  611. S_L : memrefsize := 32;
  612. S_Q : memrefsize := 64;
  613. S_XMM : memrefsize := 128;
  614. S_YMM : memrefsize := 256;
  615. S_ZMM : memrefsize := 512;
  616. else Internalerror(2019081001);
  617. end;
  618. break;
  619. end;
  620. end;
  621. end;
  622. end;
  623. msiMemRegConst128,
  624. msiMemRegConst256,
  625. msiMemRegConst512:
  626. begin
  627. for j := 1 to ops do
  628. begin
  629. if operands[j].Opr.Typ = OPR_CONSTANT then
  630. begin
  631. for k := 1 to ops do
  632. begin
  633. if operands[k].Opr.Typ = OPR_REGISTER then
  634. begin
  635. if (tx86operand(operands[k]).opsize <> S_NO) and
  636. (tx86operand(operands[k]).size <> OS_NO) then
  637. begin
  638. case tx86operand(operands[k]).opsize of
  639. S_B : memrefsize := 8;
  640. S_W : memrefsize := 16;
  641. S_L : memrefsize := 32;
  642. S_Q : memrefsize := 64;
  643. S_XMM : memrefsize := 128;
  644. S_YMM : memrefsize := 256;
  645. S_ZMM : memrefsize := 512;
  646. else Internalerror(777200);
  647. end;
  648. break;
  649. end;
  650. end;
  651. end;
  652. break;
  653. end;
  654. end;
  655. // no exists const-operand
  656. if memrefsize = -1 then
  657. begin
  658. case MemRefInfo(opcode).MemRefSize of
  659. msiMemRegConst128: memrefsize := 128;
  660. msiMemRegConst256: memrefsize := 256;
  661. msiMemRegConst512: memrefsize := 512;
  662. else Internalerror(2019081002);
  663. end;
  664. end;
  665. end;
  666. msiXMem32,
  667. msiYMem32,
  668. msiZMem32,
  669. msiXMem64,
  670. msiYMem64,
  671. msiZMem64: ; // ignore; gather/scatter opcodes haven a fixed element-size, not a fixed memory-size
  672. // the vector-register have indices with base of the memory-address in the memory-operand
  673. msiMultipleMinSize8,
  674. msiMultipleMinSize16,
  675. msiMultipleMinSize32,
  676. msiMultipleMinSize64,
  677. msiMultipleMinSize128,
  678. msiMultipleMinSize256,
  679. msiMultipleMinSize512: ; // ignore
  680. msiNoSize,
  681. msiNoMemRef,
  682. msiUnknown,
  683. msiUnsupported,
  684. msiVMemMultiple,
  685. msiVMemRegSize,
  686. msiMultiple:
  687. ;
  688. else
  689. Internalerror(2020111001);
  690. end;
  691. if memrefsize > -1 then
  692. begin
  693. // CALC REAL-MEMORY-OPERAND-SIZE AND A POSSIBLE OFFSET
  694. // OFFSET:
  695. // e.g. PAND XMM0, [RAX + 16] =>> OFFSET = 16 BYTES
  696. // PAND XMM0, [RAX + a.b + 10] =>> OFFSET = 10 BYTES (a = record-variable)
  697. memopsize := 0;
  698. case operands[i].opr.typ of
  699. OPR_LOCAL: memopsize := operands[i].opr.localvarsize * 8;
  700. OPR_REFERENCE:
  701. if operands[i].opr.ref.refaddr = addr_pic then
  702. memopsize := sizeof(pint) * 8
  703. else
  704. memopsize := operands[i].opr.varsize * 8;
  705. else
  706. ;
  707. end;
  708. //if memopsize = 0 then memopsize := topsize2memsize[tx86operand(operands[i]).opsize];
  709. if memopsize = 0 then
  710. begin
  711. {$ifdef i386}
  712. { 64-bit operands are allowed for SSE and AVX instructions, so
  713. go by the byte size instead for these families of opcodes }
  714. if (MemRefInfo(opcode).ExistsSSEAVX) then
  715. begin
  716. memopsize := tx86operand(operands[i]).typesize * 8;
  717. if tx86operand(operands[i]).typesize = 8 then
  718. { Will be S_L otherwise and won't be corrected in time }
  719. tx86operand(operands[i]).opsize := S_Q;
  720. end
  721. else
  722. {$endif i386}
  723. memopsize := topsize2memsize[tx86operand(operands[i]).opsize];
  724. end;
  725. if (memopsize > 0) and
  726. (memrefsize > 0) then
  727. begin
  728. memoffset := 0;
  729. case operands[i].opr.typ of
  730. OPR_LOCAL:
  731. memoffset := operands[i].opr.localconstoffset;
  732. OPR_REFERENCE:
  733. memoffset := operands[i].opr.constoffset;
  734. else
  735. ;
  736. end;
  737. if memoffset < 0 then
  738. begin
  739. Message2(asmr_w_check_mem_operand_negative_offset,
  740. std_op2str[opcode],
  741. ToStr(memoffset));
  742. end
  743. else if ((tx86operand(operands[i]).hastype) and (memopsize < memrefsize)) or
  744. (memopsize < (memrefsize + memoffset * 8)) then
  745. begin
  746. if memopsize < memrefsize then
  747. begin
  748. if memoffset = 0 then
  749. begin
  750. Message3(asmr_w_check_mem_operand_size3,
  751. std_op2str[opcode],
  752. ToStr(memopsize),
  753. ToStr(memrefsize)
  754. );
  755. end
  756. else
  757. begin
  758. Message4(asmr_w_check_mem_operand_size_offset,
  759. std_op2str[opcode],
  760. ToStr(memopsize),
  761. ToStr(memrefsize),
  762. ToStr(memoffset)
  763. );
  764. end;
  765. end;
  766. end;
  767. end;
  768. end;
  769. end;
  770. end;
  771. end;
  772. end;
  773. if (ExistsMemRefNoSize or ExistsConstNoSize) and
  774. (MemRefInfo(opcode).ExistsSSEAVX) then
  775. begin
  776. for i := 1 to ops do
  777. begin
  778. if (tx86operand(operands[i]).opsize = S_NO) then
  779. begin
  780. case operands[i].Opr.Typ of
  781. OPR_REFERENCE:
  782. begin
  783. if ExistsBCST then
  784. begin
  785. case MemRefInfo(opcode).MemRefSizeBCST of
  786. msbBCST32: begin
  787. tx86operand(operands[i]).opsize := S_L;
  788. tx86operand(operands[i]).size := OS_32;
  789. end;
  790. msbBCST64: begin
  791. tx86operand(operands[i]).opsize := S_Q;
  792. tx86operand(operands[i]).size := OS_M64;
  793. end;
  794. else
  795. Internalerror(2019081006);
  796. end;
  797. end
  798. else
  799. case MemRefInfo(opcode).MemRefSize of
  800. msiMem8:
  801. begin
  802. tx86operand(operands[i]).opsize := S_B;
  803. tx86operand(operands[i]).size := OS_8;
  804. end;
  805. msiMultipleMinSize8:
  806. begin
  807. tx86operand(operands[i]).opsize := S_B;
  808. tx86operand(operands[i]).size := OS_8;
  809. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"8 bit memory operand"');
  810. end;
  811. msiMem16:
  812. begin
  813. tx86operand(operands[i]).opsize := S_W;
  814. tx86operand(operands[i]).size := OS_16;
  815. end;
  816. msiMultipleMinSize16:
  817. begin
  818. tx86operand(operands[i]).opsize := S_W;
  819. tx86operand(operands[i]).size := OS_16;
  820. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"16 bit memory operand"');
  821. end;
  822. msiMem32:
  823. begin
  824. tx86operand(operands[i]).opsize := S_L;
  825. tx86operand(operands[i]).size := OS_32;
  826. end;
  827. msiMultipleMinSize32:
  828. begin
  829. tx86operand(operands[i]).opsize := S_L;
  830. tx86operand(operands[i]).size := OS_32;
  831. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"32 bit memory operand"');
  832. end;
  833. msiMem64:
  834. begin
  835. tx86operand(operands[i]).opsize := S_Q;
  836. tx86operand(operands[i]).size := OS_M64;
  837. end;
  838. msiMultipleMinSize64:
  839. begin
  840. tx86operand(operands[i]).opsize := S_Q;
  841. tx86operand(operands[i]).size := OS_M64;
  842. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"64 bit memory operand"');
  843. end;
  844. msiMem128:
  845. begin
  846. tx86operand(operands[i]).opsize := S_XMM;
  847. tx86operand(operands[i]).size := OS_M128;
  848. end;
  849. msiMultipleMinSize128:
  850. begin
  851. tx86operand(operands[i]).opsize := S_XMM;
  852. tx86operand(operands[i]).size := OS_M128;
  853. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"128 bit memory operand"');
  854. end;
  855. msiMem256:
  856. begin
  857. tx86operand(operands[i]).opsize := S_YMM;
  858. tx86operand(operands[i]).size := OS_M256;
  859. opsize := S_YMM;
  860. end;
  861. msiMultipleMinSize256:
  862. begin
  863. tx86operand(operands[i]).opsize := S_YMM;
  864. tx86operand(operands[i]).size := OS_M256;
  865. opsize := S_YMM;
  866. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"256 bit memory operand"');
  867. end;
  868. msiMem512:
  869. begin
  870. tx86operand(operands[i]).opsize := S_ZMM;
  871. tx86operand(operands[i]).size := OS_M512;
  872. opsize := S_ZMM;
  873. end;
  874. msiMultipleMinSize512:
  875. begin
  876. tx86operand(operands[i]).opsize := S_ZMM;
  877. tx86operand(operands[i]).size := OS_M512;
  878. opsize := S_ZMM;
  879. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"512 bit memory operand"');
  880. end;
  881. msiMemRegSize:
  882. begin
  883. // mem-ref-size = register size
  884. for j := 1 to ops do
  885. begin
  886. if operands[j].Opr.Typ = OPR_REGISTER then
  887. begin
  888. if (tx86operand(operands[j]).opsize <> S_NO) and
  889. (tx86operand(operands[j]).size <> OS_NO) then
  890. begin
  891. tx86operand(operands[i]).opsize := tx86operand(operands[j]).opsize;
  892. tx86operand(operands[i]).size := tx86operand(operands[j]).size;
  893. break;
  894. end
  895. else Message(asmr_e_unable_to_determine_reference_size);
  896. end;
  897. end;
  898. end;
  899. msiMemRegx16y32:
  900. begin
  901. for j := 1 to ops do
  902. begin
  903. if operands[j].Opr.Typ = OPR_REGISTER then
  904. begin
  905. case getsubreg(operands[j].opr.reg) of
  906. R_SUBMMX: begin
  907. tx86operand(operands[i]).opsize := S_W;
  908. tx86operand(operands[i]).size := OS_M16;
  909. break;
  910. end;
  911. R_SUBMMY: begin
  912. tx86operand(operands[i]).opsize := S_L;
  913. tx86operand(operands[i]).size := OS_M32;
  914. break;
  915. end;
  916. else Message(asmr_e_unable_to_determine_reference_size);
  917. end;
  918. end;
  919. end;
  920. end;
  921. msiMemRegx16y32z64:
  922. begin
  923. for j := 1 to ops do
  924. begin
  925. if operands[j].Opr.Typ = OPR_REGISTER then
  926. begin
  927. case getsubreg(operands[j].opr.reg) of
  928. R_SUBMMX: begin
  929. tx86operand(operands[i]).opsize := S_W;
  930. tx86operand(operands[i]).size := OS_M16;
  931. break;
  932. end;
  933. R_SUBMMY: begin
  934. tx86operand(operands[i]).opsize := S_L;
  935. tx86operand(operands[i]).size := OS_M32;
  936. break;
  937. end;
  938. R_SUBMMZ: begin
  939. tx86operand(operands[i]).opsize := S_Q;
  940. tx86operand(operands[i]).size := OS_M64;
  941. break;
  942. end;
  943. else Message(asmr_e_unable_to_determine_reference_size);
  944. end;
  945. end;
  946. end;
  947. end;
  948. msiMemRegx32y64:
  949. begin
  950. for j := 1 to ops do
  951. begin
  952. if operands[j].Opr.Typ = OPR_REGISTER then
  953. begin
  954. case getsubreg(operands[j].opr.reg) of
  955. R_SUBMMX: begin
  956. tx86operand(operands[i]).opsize := S_L;
  957. tx86operand(operands[i]).size := OS_M32;
  958. break;
  959. end;
  960. R_SUBMMY: begin
  961. tx86operand(operands[i]).opsize := S_Q;
  962. tx86operand(operands[i]).size := OS_M64;
  963. break;
  964. end;
  965. else Message(asmr_e_unable_to_determine_reference_size);
  966. end;
  967. end;
  968. end;
  969. end;
  970. msiMemRegx32y64z128:
  971. for j := 1 to ops do
  972. begin
  973. if operands[j].Opr.Typ = OPR_REGISTER then
  974. begin
  975. case getsubreg(operands[j].opr.reg) of
  976. R_SUBMMX: begin
  977. tx86operand(operands[i]).opsize := S_L;
  978. tx86operand(operands[i]).size := OS_M32;
  979. break;
  980. end;
  981. R_SUBMMY: begin
  982. tx86operand(operands[i]).opsize := S_Q;
  983. tx86operand(operands[i]).size := OS_M64;
  984. break;
  985. end;
  986. R_SUBMMZ: begin
  987. tx86operand(operands[i]).opsize := S_XMM;
  988. tx86operand(operands[i]).size := OS_M128;
  989. break;
  990. end;
  991. else Message(asmr_e_unable_to_determine_reference_size);
  992. end;
  993. end;
  994. end;
  995. msiMemRegx64y128:
  996. begin
  997. for j := 1 to ops do
  998. begin
  999. if operands[j].Opr.Typ = OPR_REGISTER then
  1000. begin
  1001. case getsubreg(operands[j].opr.reg) of
  1002. R_SUBMMX: begin
  1003. tx86operand(operands[i]).opsize := S_Q;
  1004. tx86operand(operands[i]).size := OS_M64;
  1005. break;
  1006. end;
  1007. R_SUBMMY: begin
  1008. tx86operand(operands[i]).opsize := S_XMM;
  1009. tx86operand(operands[i]).size := OS_M128;
  1010. break;
  1011. end;
  1012. else Message(asmr_e_unable_to_determine_reference_size);
  1013. end;
  1014. end;
  1015. end;
  1016. end;
  1017. msiMemRegx64y128z256:
  1018. begin
  1019. for j := 1 to ops do
  1020. begin
  1021. if operands[j].Opr.Typ = OPR_REGISTER then
  1022. begin
  1023. case getsubreg(operands[j].opr.reg) of
  1024. R_SUBMMX: begin
  1025. tx86operand(operands[i]).opsize := S_Q;
  1026. tx86operand(operands[i]).size := OS_M64;
  1027. break;
  1028. end;
  1029. R_SUBMMY: begin
  1030. tx86operand(operands[i]).opsize := S_XMM;
  1031. tx86operand(operands[i]).size := OS_M128;
  1032. break;
  1033. end;
  1034. R_SUBMMZ: begin
  1035. tx86operand(operands[i]).opsize := S_YMM;
  1036. tx86operand(operands[i]).size := OS_M256;
  1037. break;
  1038. end;
  1039. else Message(asmr_e_unable_to_determine_reference_size);
  1040. end;
  1041. end;
  1042. end;
  1043. end;
  1044. msiMemRegx64y256:
  1045. begin
  1046. for j := 1 to ops do
  1047. begin
  1048. if operands[j].Opr.Typ = OPR_REGISTER then
  1049. begin
  1050. case getsubreg(operands[j].opr.reg) of
  1051. R_SUBMMX: begin
  1052. tx86operand(operands[i]).opsize := S_Q;
  1053. tx86operand(operands[i]).size := OS_M64;
  1054. break;
  1055. end;
  1056. R_SUBMMY: begin
  1057. tx86operand(operands[i]).opsize := S_YMM;
  1058. tx86operand(operands[i]).size := OS_M256;
  1059. break;
  1060. end;
  1061. else Message(asmr_e_unable_to_determine_reference_size);
  1062. end;
  1063. end;
  1064. end;
  1065. end;
  1066. msiMemRegx64y256z512:
  1067. begin
  1068. for j := 1 to ops do
  1069. begin
  1070. if operands[j].Opr.Typ = OPR_REGISTER then
  1071. begin
  1072. case getsubreg(operands[j].opr.reg) of
  1073. R_SUBMMX: begin
  1074. tx86operand(operands[i]).opsize := S_Q;
  1075. tx86operand(operands[i]).size := OS_M64;
  1076. break;
  1077. end;
  1078. R_SUBMMY: begin
  1079. tx86operand(operands[i]).opsize := S_YMM;
  1080. tx86operand(operands[i]).size := OS_M256;
  1081. break;
  1082. end;
  1083. R_SUBMMZ: begin
  1084. tx86operand(operands[i]).opsize := S_ZMM;
  1085. tx86operand(operands[i]).size := OS_M512;
  1086. break;
  1087. end;
  1088. else Message(asmr_e_unable_to_determine_reference_size);
  1089. end;
  1090. end;
  1091. end;
  1092. end;
  1093. msiMemRegConst128,
  1094. msiMemRegConst256,
  1095. msiMemRegConst512:
  1096. begin
  1097. ExistConst := false;
  1098. for j := 1 to ops do
  1099. begin
  1100. if operands[j].Opr.Typ = OPR_CONSTANT then
  1101. begin
  1102. ExistConst := true;
  1103. break;
  1104. end;
  1105. end;
  1106. if ExistConst then
  1107. begin
  1108. for j := 1 to ops do
  1109. begin
  1110. if operands[j].Opr.Typ = OPR_REGISTER then
  1111. begin
  1112. if (tx86operand(operands[j]).opsize <> S_NO) and
  1113. (tx86operand(operands[j]).size <> OS_NO) then
  1114. begin
  1115. tx86operand(operands[i]).opsize := tx86operand(operands[j]).opsize;
  1116. tx86operand(operands[i]).size := tx86operand(operands[j]).size;
  1117. break;
  1118. end
  1119. else Message(asmr_e_unable_to_determine_reference_size);
  1120. end;
  1121. end;
  1122. end
  1123. else
  1124. begin
  1125. case MemRefInfo(opcode).MemRefSize of
  1126. msiMemRegConst128: begin
  1127. tx86operand(operands[i]).opsize := S_XMM;
  1128. tx86operand(operands[i]).size := OS_M128;
  1129. break;
  1130. end;
  1131. msiMemRegConst256: begin
  1132. tx86operand(operands[i]).opsize := S_YMM;
  1133. tx86operand(operands[i]).size := OS_M256;
  1134. break;
  1135. end;
  1136. msiMemRegConst512: begin
  1137. tx86operand(operands[i]).opsize := S_ZMM;
  1138. tx86operand(operands[i]).size := OS_M512;
  1139. break;
  1140. end;
  1141. else
  1142. Internalerror(2019081007);
  1143. end;
  1144. end;
  1145. end;
  1146. msiXMem32,
  1147. msiYMem32,
  1148. msiZMem32,
  1149. msiXMem64,
  1150. msiYMem64,
  1151. msiZMem64: ; // ignore; gather/scatter opcodes haven a fixed element-size, not a fixed memory-size
  1152. // the vector-register have indices with base of the memory-address in the memory-operand
  1153. msiNoSize: ; // all memory-sizes are ok
  1154. msiNoMemRef:; // ignore;
  1155. msiVMemMultiple,
  1156. msiVMemRegSize: ; // ignore
  1157. msiUnknown,
  1158. msiUnsupported,
  1159. msiMultiple: Message(asmr_e_unable_to_determine_reference_size); // TODO individual message
  1160. else
  1161. Internalerror(2019081008);
  1162. end;
  1163. end;
  1164. OPR_CONSTANT:
  1165. case MemRefInfo(opcode).ConstSize of
  1166. csiMem8: begin
  1167. tx86operand(operands[i]).opsize := S_B;
  1168. tx86operand(operands[i]).size := OS_8;
  1169. end;
  1170. csiMem16: begin
  1171. tx86operand(operands[i]).opsize := S_W;
  1172. tx86operand(operands[i]).size := OS_16;
  1173. end;
  1174. csiMem32: begin
  1175. tx86operand(operands[i]).opsize := S_L;
  1176. tx86operand(operands[i]).size := OS_32;
  1177. end;
  1178. {$ifdef x86_64}
  1179. csiMem64: begin
  1180. tx86operand(operands[i]).opsize := S_Q;
  1181. tx86operand(operands[i]).size := OS_64;
  1182. end;
  1183. {$else}
  1184. csiMem64: begin
  1185. internalerror(2019050910);
  1186. end;
  1187. {$endif}
  1188. csiUnknown, csiMultiple, csiNoSize:
  1189. ;
  1190. end;
  1191. else
  1192. ;
  1193. end;
  1194. end;
  1195. end;
  1196. end;
  1197. for i:=1 to ops do
  1198. begin
  1199. operands[i].SetCorrectSize(opcode);
  1200. if tx86operand(operands[i]).opsize=S_NO then
  1201. begin
  1202. {$ifdef x86_64}
  1203. if (opcode=A_MOVQ) and
  1204. (ops=2) and
  1205. (operands[1].opr.typ=OPR_CONSTANT) then
  1206. opsize:=S_Q
  1207. else
  1208. {$endif x86_64}
  1209. case operands[i].Opr.Typ of
  1210. OPR_LOCAL,
  1211. OPR_REFERENCE :
  1212. begin
  1213. { for 3-operand opcodes, operand #1 (in ATT order) is always an immediate,
  1214. don't consider it. }
  1215. if i=ops then
  1216. operand2:=i-1
  1217. else
  1218. operand2:=i+1;
  1219. if operand2>0 then
  1220. begin
  1221. { Only allow register as operand to take the size from }
  1222. if operands[operand2].opr.typ=OPR_REGISTER then
  1223. begin
  1224. if ((opcode<>A_MOVD) and
  1225. (opcode<>A_CVTSI2SS)) then
  1226. begin
  1227. //tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize;
  1228. // torsten - 31.01.2012
  1229. // old: xmm/ymm-register operands have a opsize = "S_NO"
  1230. // new: xmm/ymm-register operands have a opsize = "S_XMM/S_YMM"
  1231. // any SSE- and AVX-opcodes have mixed operand sizes (e.g. cvtsd2ss xmmreg, xmmreg/m32)
  1232. // in this case is we need the old handling ("S_NO")
  1233. // =>> ignore
  1234. if (tx86operand(operands[operand2]).opsize <> S_XMM) and
  1235. (tx86operand(operands[operand2]).opsize <> S_YMM) and
  1236. (tx86operand(operands[operand2]).opsize <> S_ZMM) then
  1237. tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize
  1238. else tx86operand(operands[operand2]).opsize := S_NO;
  1239. end;
  1240. end
  1241. else
  1242. begin
  1243. { if no register then take the opsize (which is available with ATT),
  1244. if not availble then give an error }
  1245. if opsize<>S_NO then
  1246. tx86operand(operands[i]).opsize:=opsize
  1247. else
  1248. begin
  1249. if (m_delphi in current_settings.modeswitches) then
  1250. Message(asmr_w_unable_to_determine_reference_size_using_dword)
  1251. else
  1252. Message(asmr_e_unable_to_determine_reference_size);
  1253. { recovery }
  1254. tx86operand(operands[i]).opsize:=S_L;
  1255. end;
  1256. end;
  1257. end
  1258. else
  1259. begin
  1260. if opsize<>S_NO then
  1261. tx86operand(operands[i]).opsize:=opsize
  1262. end;
  1263. end;
  1264. OPR_SYMBOL :
  1265. begin
  1266. { Fix lea which need a reference }
  1267. if opcode=A_LEA then
  1268. begin
  1269. s:=operands[i].opr.symbol;
  1270. so:=operands[i].opr.symofs;
  1271. operands[i].opr.typ:=OPR_REFERENCE;
  1272. Fillchar(operands[i].opr.ref,sizeof(treference),0);
  1273. operands[i].opr.ref.symbol:=s;
  1274. operands[i].opr.ref.offset:=so;
  1275. end;
  1276. {$if defined(x86_64)}
  1277. tx86operand(operands[i]).opsize:=S_Q;
  1278. {$elseif defined(i386)}
  1279. tx86operand(operands[i]).opsize:=S_L;
  1280. {$elseif defined(i8086)}
  1281. tx86operand(operands[i]).opsize:=S_W;
  1282. {$endif}
  1283. end;
  1284. else
  1285. ;
  1286. end;
  1287. end;
  1288. end;
  1289. if MemRefInfo(opcode).ExistsSSEAVX then
  1290. begin
  1291. // validate broadcast-memory-operands
  1292. vbcst := 0;
  1293. mmregs := [];
  1294. for i := 1 to ops do
  1295. if operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL] then vbcst := tx86operand(operands[i]).vbcst
  1296. else if operands[i].Opr.Typ = OPR_REGISTER then
  1297. begin
  1298. if getsubreg(operands[i].opr.reg) in [R_SUBMMX, R_SUBMMY, R_SUBMMZ] then
  1299. begin
  1300. include(mmregs, getsubreg(operands[i].opr.reg));
  1301. end;
  1302. end;
  1303. if vbcst <> 0 then
  1304. begin
  1305. // found broadcast-memory-operand (e.g. "{1to8}")
  1306. // check is correct
  1307. multiplicator := 0;
  1308. if mmregs = [R_SUBMMX] then multiplicator := 1
  1309. else if mmregs = [R_SUBMMY] then multiplicator := 2
  1310. else if mmregs = [R_SUBMMZ] then multiplicator := 4
  1311. else
  1312. begin
  1313. //TG TODO
  1314. end;
  1315. if MemRefInfo(opcode).BCSTTypes <> [] then
  1316. begin
  1317. str(MemRefInfo(opcode).BCSTXMMMultiplicator * multiplicator, bcst1);
  1318. str(vbcst, bcst2);
  1319. case vbcst of
  1320. 2: if not(bt1to2 in MemRefInfo(opcode).BCSTTypes) then
  1321. Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
  1322. 4: if not(bt1to4 in MemRefInfo(opcode).BCSTTypes) then
  1323. Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
  1324. 8: if not(bt1to8 in MemRefInfo(opcode).BCSTTypes) then
  1325. Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
  1326. 16: if not(bt1to16 in MemRefInfo(opcode).BCSTTypes) then
  1327. Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
  1328. end;
  1329. end
  1330. else if MemRefInfo(opcode).BCSTXMMMultiplicator * multiplicator <> vbcst then
  1331. begin
  1332. str(MemRefInfo(opcode).BCSTXMMMultiplicator * multiplicator, bcst1);
  1333. str(vbcst, bcst2);
  1334. Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
  1335. end;
  1336. end;
  1337. end;
  1338. end;
  1339. procedure Tx86Instruction.SetInstructionOpsize;
  1340. function CheckSSEAVX: Boolean;
  1341. var
  1342. i: integer;
  1343. bBroadcastMemRef: boolean;
  1344. bExistMemRef: boolean;
  1345. begin
  1346. Result := False;
  1347. with MemRefInfo(opcode) do
  1348. begin
  1349. if (ExistsSSEAVX) then
  1350. begin
  1351. bBroadcastMemRef := false;
  1352. for i := 1 to ops do
  1353. bBroadcastMemRef := bBroadcastMemRef or ((tx86operand(operands[i]).vopext and OTVE_VECTOR_BCST) = OTVE_VECTOR_BCST);
  1354. if bBroadcastMemRef then
  1355. begin
  1356. //case MemRefSizeBCST of
  1357. // msbBCST32: opsize := S_L;
  1358. // msbBCST64: opsize := S_Q;
  1359. // else opsize := S_NO;
  1360. //end;
  1361. opsize := S_NO;
  1362. result := true;
  1363. end
  1364. else
  1365. begin
  1366. if (gas_needsuffix[opcode] = AttSufMMS) and (ops > 0) then
  1367. begin
  1368. // special handling = use source operand for calculate instructions-opsize
  1369. // e.g. vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss
  1370. opsize:=tx86operand(operands[1]).opsize;
  1371. result := true;
  1372. end
  1373. else if MemRefSize in MemRefMultiples - [msiVMemMultiple] then
  1374. begin
  1375. case ops of
  1376. 2: begin
  1377. opsize:=tx86operand(operands[1]).opsize;
  1378. result := true;
  1379. end;
  1380. 3,4:
  1381. begin
  1382. if (tx86operand(operands[1]).opr.typ <> OPR_CONSTANT) then
  1383. opsize:=tx86operand(operands[1]).opsize
  1384. else opsize:=tx86operand(operands[2]).opsize;
  1385. result := true;
  1386. end;
  1387. end;
  1388. end
  1389. else if not(MemRefSize in [msiMemRegSize]) then
  1390. begin
  1391. //bExistMemRef:=false;
  1392. for i := 1 to ops do
  1393. if tx86operand(operands[i]).opr.typ in [OPR_REFERENCE,OPR_LOCAL] then
  1394. begin
  1395. opsize := tx86operand(operands[i]).opsize;
  1396. result := true;
  1397. break;
  1398. end;
  1399. end;
  1400. end;
  1401. end;
  1402. end;
  1403. end;
  1404. var
  1405. isBCastMemRef: boolean;
  1406. begin
  1407. if opsize<>S_NO then
  1408. exit;
  1409. case ops of
  1410. 0 : ;
  1411. 1 :
  1412. begin
  1413. { "push es" must be stored as a long PM }
  1414. if ((opcode=A_PUSH) or
  1415. (opcode=A_POP)) and
  1416. (operands[1].opr.typ=OPR_REGISTER) and
  1417. is_segment_reg(operands[1].opr.reg) then
  1418. {$ifdef i8086}
  1419. opsize:=S_W
  1420. {$else i8086}
  1421. opsize:=S_L
  1422. {$endif i8086}
  1423. else
  1424. opsize:=tx86operand(operands[1]).opsize;
  1425. end;
  1426. 2 : begin
  1427. case opcode of
  1428. A_MOVZX,A_MOVSX :
  1429. begin
  1430. if tx86operand(operands[1]).opsize=S_NO then
  1431. begin
  1432. tx86operand(operands[1]).opsize:=S_B;
  1433. if (m_delphi in current_settings.modeswitches) then
  1434. Message(asmr_w_unable_to_determine_reference_size_using_byte)
  1435. else
  1436. Message(asmr_e_unable_to_determine_reference_size);
  1437. end;
  1438. case tx86operand(operands[1]).opsize of
  1439. S_W :
  1440. case tx86operand(operands[2]).opsize of
  1441. S_L :
  1442. opsize:=S_WL;
  1443. {$ifdef x86_64}
  1444. S_Q :
  1445. opsize:=S_WQ;
  1446. {$endif}
  1447. else
  1448. ;
  1449. end;
  1450. S_B :
  1451. begin
  1452. case tx86operand(operands[2]).opsize of
  1453. S_W :
  1454. opsize:=S_BW;
  1455. S_L :
  1456. opsize:=S_BL;
  1457. {$ifdef x86_64}
  1458. S_Q :
  1459. opsize:=S_BQ;
  1460. {$endif}
  1461. else
  1462. ;
  1463. end;
  1464. end;
  1465. else
  1466. ;
  1467. end;
  1468. end;
  1469. A_MOVSS,
  1470. A_VMOVSS,
  1471. A_MOVD : { movd is a move from a mmx register to a
  1472. 32 bit register or memory, so no opsize is correct here PM }
  1473. exit;
  1474. A_MOVQ :
  1475. opsize:=S_IQ;
  1476. //A_VCVTPD2DQ,
  1477. //A_VCVTPD2PS,
  1478. //A_VCVTTPD2DQ,
  1479. //A_VCVTPD2UDQ,
  1480. //A_VCVTQQ2PS,
  1481. //A_VCVTTPD2UDQ,
  1482. //A_VCVTUQQ2PS,
  1483. A_OUT :
  1484. opsize:=tx86operand(operands[1]).opsize;
  1485. else
  1486. if not CheckSSEAVX then
  1487. opsize:=tx86operand(operands[2]).opsize;
  1488. end;
  1489. end;
  1490. 3 :
  1491. begin
  1492. //case opcode of
  1493. //A_VCVTSI2SS,
  1494. //A_VCVTSI2SD,
  1495. //A_VCVTUSI2SS,
  1496. //A_VCVTUSI2SD:
  1497. // opsize:=tx86operand(operands[1]).opsize;
  1498. //A_VFPCLASSPD,
  1499. //A_VFPCLASSPS:
  1500. // iops:=tx86operand(operands[2]).opsize;
  1501. //else
  1502. begin
  1503. if not CheckSSEAVX then
  1504. opsize:=tx86operand(operands[ops]).opsize;
  1505. end;
  1506. //end;
  1507. end;
  1508. 4 : if not CheckSSEAVX then
  1509. opsize:=tx86operand(operands[ops]).opsize;
  1510. end;
  1511. end;
  1512. procedure Tx86Instruction.CheckOperandSizes;
  1513. var
  1514. sizeerr : boolean;
  1515. i : longint;
  1516. begin
  1517. { Check only the most common opcodes here, the others are done in
  1518. the assembler pass }
  1519. case opcode of
  1520. A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
  1521. A_CMP,A_MOV,
  1522. A_ADD,A_SUB,A_ADC,A_SBB,
  1523. A_AND,A_OR,A_TEST,A_XOR: ;
  1524. else
  1525. exit;
  1526. end;
  1527. { Handle the BW,BL,WL separatly }
  1528. sizeerr:=false;
  1529. { special push/pop selector case }
  1530. if ((opcode=A_PUSH) or
  1531. (opcode=A_POP)) and
  1532. (operands[1].opr.typ=OPR_REGISTER) and
  1533. is_segment_reg(operands[1].opr.reg) then
  1534. exit;
  1535. if opsize in [S_BW,S_BL,S_WL] then
  1536. begin
  1537. if ops<>2 then
  1538. sizeerr:=true
  1539. else
  1540. begin
  1541. case opsize of
  1542. S_BW :
  1543. sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_W);
  1544. S_BL :
  1545. sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_L);
  1546. S_WL :
  1547. sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_L);
  1548. {$ifdef x86_64}
  1549. S_BQ:
  1550. sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_Q);
  1551. S_WQ:
  1552. sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_Q);
  1553. S_LQ:
  1554. sizeerr:=(tx86operand(operands[1]).opsize<>S_L) or (tx86operand(operands[2]).opsize<>S_Q);
  1555. {$endif}
  1556. else
  1557. ;
  1558. end;
  1559. end;
  1560. end
  1561. else
  1562. begin
  1563. for i:=1 to ops do
  1564. begin
  1565. if (operands[i].opr.typ<>OPR_CONSTANT) and
  1566. (tx86operand(operands[i]).opsize in [S_B,S_W,S_L]) and
  1567. (tx86operand(operands[i]).opsize<>opsize) then
  1568. sizeerr:=true;
  1569. end;
  1570. end;
  1571. if sizeerr then
  1572. begin
  1573. { if range checks are on then generate an error }
  1574. if (cs_compilesystem in current_settings.moduleswitches) or
  1575. not (cs_check_range in current_settings.localswitches) then
  1576. Message(asmr_w_size_suffix_and_dest_dont_match)
  1577. else
  1578. Message(asmr_e_size_suffix_and_dest_dont_match);
  1579. end;
  1580. end;
  1581. { This check must be done with the operand in ATT order
  1582. i.e.after swapping in the intel reader
  1583. but before swapping in the NASM and TASM writers PM }
  1584. procedure Tx86Instruction.CheckNonCommutativeOpcodes;
  1585. begin
  1586. if (
  1587. (ops=2) and
  1588. (operands[1].opr.typ=OPR_REGISTER) and
  1589. (operands[2].opr.typ=OPR_REGISTER) and
  1590. { if the first is ST and the second is also a register
  1591. it is necessarily ST1 .. ST7 }
  1592. ((operands[1].opr.reg=NR_ST) or
  1593. (operands[1].opr.reg=NR_ST0))
  1594. ) or
  1595. (ops=0) then
  1596. if opcode=A_FSUBR then
  1597. opcode:=A_FSUB
  1598. else if opcode=A_FSUB then
  1599. opcode:=A_FSUBR
  1600. else if opcode=A_FDIVR then
  1601. opcode:=A_FDIV
  1602. else if opcode=A_FDIV then
  1603. opcode:=A_FDIVR
  1604. else if opcode=A_FSUBRP then
  1605. opcode:=A_FSUBP
  1606. else if opcode=A_FSUBP then
  1607. opcode:=A_FSUBRP
  1608. else if opcode=A_FDIVRP then
  1609. opcode:=A_FDIVP
  1610. else if opcode=A_FDIVP then
  1611. opcode:=A_FDIVRP;
  1612. if (
  1613. (ops=1) and
  1614. (operands[1].opr.typ=OPR_REGISTER) and
  1615. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  1616. (operands[1].opr.reg<>NR_ST) and
  1617. (operands[1].opr.reg<>NR_ST0)
  1618. ) then
  1619. if opcode=A_FSUBRP then
  1620. opcode:=A_FSUBP
  1621. else if opcode=A_FSUBP then
  1622. opcode:=A_FSUBRP
  1623. else if opcode=A_FDIVRP then
  1624. opcode:=A_FDIVP
  1625. else if opcode=A_FDIVP then
  1626. opcode:=A_FDIVRP;
  1627. end;
  1628. procedure Tx86Instruction.FixupOpcode;
  1629. begin
  1630. { does nothing by default }
  1631. end;
  1632. {*****************************************************************************
  1633. opcode Adding
  1634. *****************************************************************************}
  1635. function Tx86Instruction.ConcatInstruction(p : TAsmList) : tai;
  1636. var
  1637. siz : topsize;
  1638. i : longint;
  1639. asize : int64;
  1640. ai : taicpu;
  1641. begin
  1642. ConcatInstruction:=nil;
  1643. ai:=nil;
  1644. for i:=1 to Ops do
  1645. if not operands[i].CheckOperand then
  1646. exit;
  1647. { Get Opsize }
  1648. if (opsize<>S_NO) or (Ops=0) then
  1649. siz:=opsize
  1650. else
  1651. begin
  1652. if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
  1653. siz:=tx86operand(operands[1]).opsize
  1654. else
  1655. siz:=tx86operand(operands[Ops]).opsize;
  1656. { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
  1657. if (ops=2) and
  1658. (tx86operand(operands[1]).opsize<>S_NO) and
  1659. (tx86operand(operands[2]).opsize<>S_NO) and
  1660. (tx86operand(operands[1]).opsize<>tx86operand(operands[2]).opsize) then
  1661. siz:=S_NO;
  1662. end;
  1663. if ((opcode=A_MOVD)or
  1664. (opcode=A_CVTSI2SS)) and
  1665. ((tx86operand(operands[1]).opsize=S_NO) or
  1666. (tx86operand(operands[2]).opsize=S_NO)) then
  1667. siz:=S_NO;
  1668. { NASM does not support FADD without args
  1669. as alias of FADDP
  1670. and GNU AS interprets FADD without operand differently
  1671. for version 2.9.1 and 2.9.5 !! }
  1672. if (ops=0) and
  1673. ((opcode=A_FADD) or
  1674. (opcode=A_FMUL) or
  1675. (opcode=A_FSUB) or
  1676. (opcode=A_FSUBR) or
  1677. (opcode=A_FDIV) or
  1678. (opcode=A_FDIVR)) then
  1679. begin
  1680. if opcode=A_FADD then
  1681. opcode:=A_FADDP
  1682. else if opcode=A_FMUL then
  1683. opcode:=A_FMULP
  1684. else if opcode=A_FSUB then
  1685. opcode:=A_FSUBP
  1686. else if opcode=A_FSUBR then
  1687. opcode:=A_FSUBRP
  1688. else if opcode=A_FDIV then
  1689. opcode:=A_FDIVP
  1690. else if opcode=A_FDIVR then
  1691. opcode:=A_FDIVRP;
  1692. message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
  1693. end;
  1694. {It is valid to specify some instructions without operand size.}
  1695. if siz=S_NO then
  1696. begin
  1697. if (ops=1) and (opcode=A_INT) then
  1698. siz:=S_B;
  1699. if (ops=1) and (opcode=A_XABORT) then
  1700. siz:=S_B;
  1701. {$ifdef i8086}
  1702. if (ops=1) and (opcode=A_BRKEM) then
  1703. siz:=S_B;
  1704. {$endif i8086}
  1705. if (ops=1) and (opcode=A_RET) or (opcode=A_RETN) or (opcode=A_RETF) or
  1706. (opcode=A_RETW) or (opcode=A_RETNW) or (opcode=A_RETFW) or
  1707. {$ifndef x86_64}
  1708. (opcode=A_RETD) or (opcode=A_RETND) or
  1709. {$endif x86_64}
  1710. (opcode=A_RETFD)
  1711. {$ifdef x86_64}
  1712. or (opcode=A_RETQ) or (opcode=A_RETNQ) or (opcode=A_RETFQ)
  1713. {$endif x86_64}
  1714. then
  1715. siz:=S_W;
  1716. if (ops=1) and (opcode=A_PUSH) then
  1717. begin
  1718. {$ifdef i8086}
  1719. if (tx86operand(operands[1]).opr.val>=-128) and (tx86operand(operands[1]).opr.val<=127) then
  1720. begin
  1721. siz:=S_B;
  1722. message(asmr_w_unable_to_determine_constant_size_using_byte);
  1723. end
  1724. else
  1725. begin
  1726. siz:=S_W;
  1727. message(asmr_w_unable_to_determine_constant_size_using_word);
  1728. end;
  1729. {$else i8086}
  1730. { We are a 32 compiler, assume 32-bit by default. This is Delphi
  1731. compatible but bad coding practise.}
  1732. siz:=S_L;
  1733. message(asmr_w_unable_to_determine_reference_size_using_dword);
  1734. {$endif i8086}
  1735. end;
  1736. if (opcode=A_JMP) or (opcode=A_JCC) or (opcode=A_CALL) then
  1737. if ops=1 then
  1738. siz:=S_NEAR
  1739. else
  1740. siz:=S_FAR;
  1741. end;
  1742. { GNU AS interprets FDIV without operand differently
  1743. for version 2.9.1 and 2.10
  1744. we add explicit args to it !! }
  1745. if (ops=0) and
  1746. ((opcode=A_FSUBP) or
  1747. (opcode=A_FSUBRP) or
  1748. (opcode=A_FDIVP) or
  1749. (opcode=A_FDIVRP) or
  1750. (opcode=A_FSUB) or
  1751. (opcode=A_FSUBR) or
  1752. (opcode=A_FADD) or
  1753. (opcode=A_FADDP) or
  1754. (opcode=A_FDIV) or
  1755. (opcode=A_FDIVR)) then
  1756. begin
  1757. message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
  1758. ops:=2;
  1759. operands[1].opr.typ:=OPR_REGISTER;
  1760. operands[2].opr.typ:=OPR_REGISTER;
  1761. operands[1].opr.reg:=NR_ST0;
  1762. operands[2].opr.reg:=NR_ST1;
  1763. end;
  1764. if (ops=1) and
  1765. (
  1766. (operands[1].opr.typ=OPR_REGISTER) and
  1767. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  1768. (operands[1].opr.reg<>NR_ST) and
  1769. (operands[1].opr.reg<>NR_ST0)
  1770. ) and
  1771. (
  1772. (opcode=A_FSUBP) or
  1773. (opcode=A_FSUBRP) or
  1774. (opcode=A_FDIVP) or
  1775. (opcode=A_FDIVRP) or
  1776. (opcode=A_FADDP) or
  1777. (opcode=A_FMULP)
  1778. ) then
  1779. begin
  1780. message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
  1781. ops:=2;
  1782. operands[2].opr.typ:=OPR_REGISTER;
  1783. operands[2].opr.reg:=operands[1].opr.reg;
  1784. operands[1].opr.reg:=NR_ST0;
  1785. end;
  1786. if (ops=1) and
  1787. (
  1788. (operands[1].opr.typ=OPR_REGISTER) and
  1789. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  1790. (operands[1].opr.reg<>NR_ST) and
  1791. (operands[1].opr.reg<>NR_ST0)
  1792. ) and
  1793. (
  1794. (opcode=A_FSUB) or
  1795. (opcode=A_FSUBR) or
  1796. (opcode=A_FDIV) or
  1797. (opcode=A_FDIVR) or
  1798. (opcode=A_FADD) or
  1799. (opcode=A_FMUL)
  1800. ) then
  1801. begin
  1802. message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
  1803. ops:=2;
  1804. operands[2].opr.typ:=OPR_REGISTER;
  1805. operands[2].opr.reg:=NR_ST0;
  1806. end;
  1807. { Check for 'POP CS' }
  1808. if (opcode=A_POP) and (ops=1) and (operands[1].opr.typ=OPR_REGISTER) and
  1809. (operands[1].opr.reg=NR_CS) then
  1810. {$ifdef i8086}
  1811. { On i8086 we print only a warning, because 'POP CS' works on 8086 and 8088
  1812. CPUs, but isn't supported on any later CPU }
  1813. Message(asmr_w_pop_cs_not_portable);
  1814. {$else i8086}
  1815. { On the i386 and x86_64 targets, we print out an error, because no CPU,
  1816. supported by these targets support 'POP CS' }
  1817. Message(asmr_e_pop_cs_not_valid);
  1818. {$endif i8086}
  1819. { I tried to convince Linus Torvalds to add
  1820. code to support ENTER instruction
  1821. (when raising a stack page fault)
  1822. but he replied that ENTER is a bad instruction and
  1823. Linux does not need to support it
  1824. So I think its at least a good idea to add a warning
  1825. if someone uses this in assembler code
  1826. FPC itself does not use it at all PM }
  1827. if (opcode=A_ENTER) and
  1828. (target_info.system in [system_i386_linux,system_i386_FreeBSD,system_i386_android]) then
  1829. Message(asmr_w_enter_not_supported_by_linux);
  1830. ai:=taicpu.op_none(opcode,siz);
  1831. ai.fileinfo:=filepos;
  1832. ai.SetOperandOrder(op_att);
  1833. ai.Ops:=Ops;
  1834. ai.Allocate_oper(Ops);
  1835. for i:=1 to Ops do
  1836. begin
  1837. ai.oper[i-1]^.vopext := (operands[i] as tx86operand).vopext;
  1838. case operands[i].opr.typ of
  1839. OPR_CONSTANT :
  1840. ai.loadconst(i-1,operands[i].opr.val);
  1841. OPR_REGISTER:
  1842. ai.loadreg(i-1,operands[i].opr.reg);
  1843. OPR_SYMBOL:
  1844. {$ifdef i8086}
  1845. if operands[i].opr.symseg then
  1846. taicpu(ai).loadsegsymbol(i-1,operands[i].opr.symbol)
  1847. else
  1848. {$endif i8086}
  1849. ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
  1850. OPR_LOCAL :
  1851. with operands[i].opr do
  1852. begin
  1853. ai.loadlocal(i-1,localsym,localsymofs,localindexreg,
  1854. localscale,localgetoffset,localforceref);
  1855. ai.oper[i-1]^.localoper^.localsegment:=localsegment;
  1856. // check for embedded broadcast
  1857. if MemRefInfo(opcode).ExistsSSEAVX then
  1858. begin
  1859. asize := 0;
  1860. if ((operands[i] as tx86operand).vopext <> 0) and
  1861. (MemRefInfo(opcode).MemRefSizeBCST in [msbBCST32,msbBCST64]) then
  1862. begin
  1863. case operands[i].size of
  1864. OS_32,OS_M32: asize:=OT_BITS32;
  1865. OS_64,OS_M64: asize:=OT_BITS64;
  1866. else;
  1867. end;
  1868. end;
  1869. if asize<>0 then
  1870. ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
  1871. end;
  1872. // if MemRefInfo(opcode).ExistsSSEAVX then
  1873. // begin
  1874. // asize := 0;
  1875. //
  1876. // case operands[i].size of
  1877. // OS_32,OS_M32: if (operands[i].HasType) or
  1878. // (MemRefInfo(opcode).MemRefSize = msiMem32) or
  1879. // (MemRefInfo(opcode).MemRefSizeBCST = msbBCST32)
  1880. // //(((tx86operand(operands[i]).vopext and OTVE_VECTOR_BCST) = OTVE_VECTOR_BCST) and
  1881. // // (MemRefInfo(opcode).MemRefSizeBCST = msbBCST32)
  1882. // //)
  1883. // then
  1884. // asize:=OT_BITS32;
  1885. // OS_64,OS_M64: if (operands[i].HasType) or
  1886. // (MemRefInfo(opcode).MemRefSize = msiMem64) or
  1887. // //(((tx86operand(operands[i]).vopext and OTVE_VECTOR_BCST) = OTVE_VECTOR_BCST) and
  1888. // // (MemRefInfo(opcode).MemRefSizeBCST = msbBCST64)
  1889. // //) then
  1890. // (MemRefInfo(opcode).MemRefSizeBCST = msbBCST64) then
  1891. // asize:=OT_BITS64;
  1892. // OS_M128: if (operands[i].HasType) or
  1893. // (MemRefInfo(opcode).MemRefSize = msiMem128) then
  1894. //asize:=OT_BITS128;
  1895. // OS_M256: if (operands[i].HasType) or
  1896. // (MemRefInfo(opcode).MemRefSize = msiMem256) then
  1897. //asize:=OT_BITS256;
  1898. // OS_M512: if (operands[i].HasType) or
  1899. // (MemRefInfo(opcode).MemRefSize = msiMem512) then
  1900. //asize:=OT_BITS512;
  1901. // else;
  1902. // end;
  1903. //
  1904. // if asize<>0 then
  1905. // ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
  1906. // end;
  1907. end;
  1908. OPR_REFERENCE:
  1909. begin
  1910. if current_settings.optimizerswitches <> [] then
  1911. if (not(MemRefInfo(opcode).MemRefSize in MemRefSizeInfoVMems)) and (opcode<>A_XLAT) and not is_x86_string_op(opcode) then
  1912. optimize_ref(operands[i].opr.ref,true);
  1913. ai.loadref(i-1,operands[i].opr.ref);
  1914. if operands[i].size<>OS_NO then
  1915. begin
  1916. asize:=0;
  1917. case operands[i].size of
  1918. OS_8,OS_S8 :
  1919. asize:=OT_BITS8;
  1920. OS_16,OS_S16, OS_M16:
  1921. asize:=OT_BITS16;
  1922. OS_32,OS_S32 :
  1923. {$ifdef i8086}
  1924. if siz=S_FAR then
  1925. asize:=OT_FAR
  1926. else
  1927. asize:=OT_BITS32;
  1928. {$else i8086}
  1929. asize:=OT_BITS32;
  1930. {$endif i8086}
  1931. OS_F32,OS_M32 :
  1932. asize:=OT_BITS32;
  1933. OS_64,OS_S64:
  1934. begin
  1935. { Only FPU and SSE/AVX operations know about 64bit
  1936. values, for all integer operations it is seen as 32bit
  1937. this applies only to i386, see tw16622}
  1938. if (gas_needsuffix[opcode] in [attsufFPU,attsufFPUint]) or (MemRefInfo(opcode).ExistsSSEAVX) then
  1939. asize:=OT_BITS64
  1940. {$ifdef i386}
  1941. else
  1942. asize:=OT_BITS32
  1943. {$endif i386}
  1944. ;
  1945. end;
  1946. OS_F64,OS_C64, OS_M64 :
  1947. asize:=OT_BITS64;
  1948. OS_F80 :
  1949. asize:=OT_BITS80;
  1950. OS_128,OS_M128:
  1951. asize := OT_BITS128;
  1952. OS_M256:
  1953. asize := OT_BITS256;
  1954. OS_M512:
  1955. asize := OT_BITS512;
  1956. else
  1957. ;
  1958. end;
  1959. if asize<>0 then
  1960. ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and OT_NON_SIZE) or asize;
  1961. end;
  1962. end;
  1963. else
  1964. ;
  1965. end;
  1966. end;
  1967. { Condition ? }
  1968. if condition<>C_None then
  1969. ai.SetCondition(condition);
  1970. { Set is_jmp, it enables asmwriter to emit short jumps if appropriate }
  1971. if (opcode=A_JMP) or (opcode=A_JCC) then
  1972. ai.is_jmp := True;
  1973. { Concat the opcode or give an error }
  1974. if assigned(ai) then
  1975. p.concat(ai)
  1976. else
  1977. Message(asmr_e_invalid_opcode_and_operand);
  1978. result:=ai;
  1979. end;
  1980. function Tx86Instruction.getstring: string;
  1981. var
  1982. i : longint;
  1983. s, sval : string;
  1984. regnr: string;
  1985. addsize : boolean;
  1986. begin
  1987. s:='['+std_op2str[opcode];
  1988. for i:=1 to ops do
  1989. begin
  1990. with operands[i] as Tx86Operand do
  1991. begin
  1992. if i=0 then
  1993. s:=s+' '
  1994. else
  1995. s:=s+',';
  1996. { type }
  1997. addsize:=false;
  1998. case operands[i].opr.typ of
  1999. OPR_CONSTANT : begin
  2000. str(operands[i].opr.val, sval);
  2001. s:=s+ sval;
  2002. end;
  2003. OPR_REGISTER : begin
  2004. regnr := '';
  2005. str(getsupreg(opr.reg),regnr);
  2006. if getsubreg(opr.reg)= R_SUBMMX then
  2007. s:=s+'xmmreg' + regnr
  2008. else
  2009. if getsubreg(opr.reg)= R_SUBMMY then
  2010. s:=s+'ymmreg' + regnr
  2011. else
  2012. if getsubreg(opr.reg)= R_SUBMMZ then
  2013. s:=s+'zmmreg' + regnr
  2014. else
  2015. if getregtype(opr.reg)= R_MMXREGISTER then
  2016. s:=s+'mmxreg'
  2017. else
  2018. if getregtype(opr.reg)= R_FPUREGISTER then
  2019. s:=s+'fpureg'
  2020. else
  2021. if getregtype(opr.reg)=R_INTREGISTER then
  2022. begin
  2023. s:=s+'reg';
  2024. addsize:=true;
  2025. end
  2026. else
  2027. if getregtype(opr.reg)=R_ADDRESSREGISTER then
  2028. begin
  2029. // 14102020 TG TODO CHECK
  2030. if (opr.reg >= NR_K0) and (opr.reg >= NR_K7) then
  2031. begin
  2032. s:=s+'k' + regnr;
  2033. end;
  2034. end;
  2035. end;
  2036. OPR_LOCAL,
  2037. OPR_REFERENCE: begin
  2038. s:=s + 'mem';
  2039. addsize:=true;
  2040. end;
  2041. else s:=s + '???';
  2042. end;
  2043. if addsize then
  2044. begin
  2045. sval := '';
  2046. str(tcgsize2size[size], sval);
  2047. s := s + sval;
  2048. end;
  2049. if vopext <> 0 then
  2050. begin
  2051. str(vopext and $07, regnr);
  2052. if vopext and OTVE_VECTOR_WRITEMASK = OTVE_VECTOR_WRITEMASK then
  2053. s := s + ' {k' + regnr + '}';
  2054. if vopext and OTVE_VECTOR_ZERO = OTVE_VECTOR_ZERO then
  2055. s := s + ' {z}';
  2056. if vopext and OTVE_VECTOR_SAE = OTVE_VECTOR_SAE then
  2057. s := s + ' {sae}';
  2058. if vopext and OTVE_VECTOR_BCST = OTVE_VECTOR_BCST then
  2059. case vopext and OTVE_VECTOR_BCST_MASK of
  2060. OTVE_VECTOR_BCST2: s := s + ' {1to2}';
  2061. OTVE_VECTOR_BCST4: s := s + ' {1to4}';
  2062. OTVE_VECTOR_BCST8: s := s + ' {1to8}';
  2063. OTVE_VECTOR_BCST16: s := s + ' {1to16}';
  2064. end;
  2065. if vopext and OTVE_VECTOR_ER = OTVE_VECTOR_ER then
  2066. case vopext and OTVE_VECTOR_ER_MASK of
  2067. OTVE_VECTOR_RNSAE: s := s + ' {rn-sae}';
  2068. OTVE_VECTOR_RDSAE: s := s + ' {rd-sae}';
  2069. OTVE_VECTOR_RUSAE: s := s + ' {ru-sae}';
  2070. OTVE_VECTOR_RZSAE: s := s + ' {rz-sae}';
  2071. end;
  2072. end;
  2073. end;
  2074. end;
  2075. GetString:=s+']';
  2076. end;
  2077. function Tx86Instruction.MightHaveExtension: boolean;
  2078. begin
  2079. Result:=aasmcpu.MightHaveExtension(opcode);
  2080. end;
  2081. end.