n386mat.pas 43 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl
  4. Generate i386 assembler for math nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit n386mat;
  19. {$i defines.inc}
  20. interface
  21. uses
  22. node,nmat;
  23. type
  24. ti386moddivnode = class(tmoddivnode)
  25. procedure pass_2;override;
  26. end;
  27. ti386shlshrnode = class(tshlshrnode)
  28. procedure pass_2;override;
  29. end;
  30. ti386unaryminusnode = class(tunaryminusnode)
  31. procedure pass_2;override;
  32. end;
  33. ti386notnode = class(tnotnode)
  34. procedure pass_2;override;
  35. end;
  36. implementation
  37. uses
  38. globtype,systems,
  39. cutils,verbose,globals,
  40. symconst,symdef,aasm,types,
  41. hcodegen,temp_gen,pass_2,
  42. ncon,
  43. cpubase,
  44. cgai386,tgcpu,n386util;
  45. {*****************************************************************************
  46. TI386MODDIVNODE
  47. *****************************************************************************}
  48. procedure ti386moddivnode.pass_2;
  49. var
  50. hreg1 : tregister;
  51. hreg2 : tregister;
  52. shrdiv, andmod, pushed,popeax,popedx : boolean;
  53. power : longint;
  54. hl : tasmlabel;
  55. hloc : tlocation;
  56. pushedreg : tpushed;
  57. typename,opname : string[6];
  58. begin
  59. shrdiv := false;
  60. andmod := false;
  61. secondpass(left);
  62. pushed:=maybe_push(right.registers32,left,is_64bitint(left.resulttype.def));
  63. secondpass(right);
  64. if pushed then
  65. restore(left,is_64bitint(left.resulttype.def));
  66. set_location(location,left.location);
  67. if is_64bitint(resulttype.def) then
  68. begin
  69. { save lcoation, because we change it now }
  70. set_location(hloc,location);
  71. release_qword_loc(location);
  72. release_qword_loc(right.location);
  73. location.registerlow:=getexplicitregister32(R_EAX);
  74. location.registerhigh:=getexplicitregister32(R_EDX);
  75. pushusedregisters(pushedreg,$ff
  76. and not($80 shr byte(location.registerlow))
  77. and not($80 shr byte(location.registerhigh)));
  78. { the left operand is in hloc, because the
  79. location of left is location but location
  80. is already destroyed
  81. }
  82. emit_pushq_loc(hloc);
  83. clear_location(hloc);
  84. emit_pushq_loc(right.location);
  85. if torddef(resulttype.def).typ=u64bit then
  86. typename:='QWORD'
  87. else
  88. typename:='INT64';
  89. if nodetype=divn then
  90. opname:='DIV_'
  91. else
  92. opname:='MOD_';
  93. saveregvars($ff);
  94. emitcall('FPC_'+opname+typename);
  95. emit_reg_reg(A_MOV,S_L,R_EAX,location.registerlow);
  96. emit_reg_reg(A_MOV,S_L,R_EDX,location.registerhigh);
  97. popusedregisters(pushedreg);
  98. location.loc:=LOC_REGISTER;
  99. end
  100. else
  101. begin
  102. { put numerator in register }
  103. if left.location.loc<>LOC_REGISTER then
  104. begin
  105. if left.location.loc=LOC_CREGISTER then
  106. begin
  107. hreg1:=getregister32;
  108. emit_reg_reg(A_MOV,S_L,left.location.register,hreg1);
  109. end
  110. else
  111. begin
  112. del_reference(left.location.reference);
  113. hreg1:=getregister32;
  114. emit_ref_reg(A_MOV,S_L,newreference(left.location.reference),
  115. hreg1);
  116. end;
  117. clear_location(left.location);
  118. left.location.loc:=LOC_REGISTER;
  119. left.location.register:=hreg1;
  120. end
  121. else hreg1:=left.location.register;
  122. if (nodetype=divn) and (right.nodetype=ordconstn) and
  123. ispowerof2(tordconstnode(right).value,power) then
  124. Begin
  125. shrdiv := true;
  126. {for signed numbers, the numerator must be adjusted before the
  127. shift instruction, but not wih unsigned numbers! Otherwise,
  128. "Cardinal($ffffffff) div 16" overflows! (JM)}
  129. If is_signed(left.resulttype.def) Then
  130. Begin
  131. If (aktOptProcessor <> class386) and
  132. not(CS_LittleSize in aktglobalswitches) then
  133. { use a sequence without jumps, saw this in
  134. comp.compilers (JM) }
  135. begin
  136. { no jumps, but more operations }
  137. if (hreg1 = R_EAX) and
  138. (R_EDX in unused) then
  139. begin
  140. hreg2 := getexplicitregister32(R_EDX);
  141. emit_none(A_CDQ,S_NO);
  142. end
  143. else
  144. begin
  145. getexplicitregister32(R_EDI);
  146. hreg2 := R_EDI;
  147. emit_reg_reg(A_MOV,S_L,hreg1,R_EDI);
  148. { if the left value is signed, R_EDI := $ffffffff,
  149. otherwise 0 }
  150. emit_const_reg(A_SAR,S_L,31,R_EDI);
  151. { if signed, R_EDI := right value-1, otherwise 0 }
  152. end;
  153. emit_const_reg(A_AND,S_L,tordconstnode(right).value-1,hreg2);
  154. { add to the left value }
  155. emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
  156. { release EDX if we used it }
  157. { also releas EDI }
  158. ungetregister32(hreg2);
  159. { do the shift }
  160. emit_const_reg(A_SAR,S_L,power,hreg1);
  161. end
  162. else
  163. begin
  164. { a jump, but less operations }
  165. emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
  166. getlabel(hl);
  167. emitjmp(C_NS,hl);
  168. if power=1 then
  169. emit_reg(A_INC,S_L,hreg1)
  170. else
  171. emit_const_reg(A_ADD,S_L,tordconstnode(right).value-1,hreg1);
  172. emitlab(hl);
  173. emit_const_reg(A_SAR,S_L,power,hreg1);
  174. end
  175. End
  176. Else
  177. emit_const_reg(A_SHR,S_L,power,hreg1);
  178. End
  179. else
  180. if (nodetype=modn) and (right.nodetype=ordconstn) and
  181. ispowerof2(tordconstnode(right).value,power) and Not(is_signed(left.resulttype.def)) Then
  182. {is there a similar trick for MOD'ing signed numbers? (JM)}
  183. Begin
  184. emit_const_reg(A_AND,S_L,tordconstnode(right).value-1,hreg1);
  185. andmod := true;
  186. End
  187. else
  188. begin
  189. { bring denominator to EDI }
  190. { EDI is always free, it's }
  191. { only used for temporary }
  192. { purposes }
  193. getexplicitregister32(R_EDI);
  194. if (right.location.loc<>LOC_REGISTER) and
  195. (right.location.loc<>LOC_CREGISTER) then
  196. begin
  197. del_reference(right.location.reference);
  198. left.location.loc:=LOC_REGISTER;
  199. emit_ref_reg(A_MOV,S_L,newreference(right.location.reference),R_EDI);
  200. end
  201. else
  202. begin
  203. emit_reg_reg(A_MOV,S_L,right.location.register,R_EDI);
  204. ungetregister32(right.location.register);
  205. end;
  206. popedx:=false;
  207. popeax:=false;
  208. if hreg1=R_EDX then
  209. begin
  210. if not(R_EAX in unused) then
  211. begin
  212. emit_reg(A_PUSH,S_L,R_EAX);
  213. popeax:=true;
  214. end
  215. else
  216. getexplicitregister32(R_EAX);
  217. emit_reg_reg(A_MOV,S_L,R_EDX,R_EAX);
  218. end
  219. else
  220. begin
  221. if not(R_EDX in unused) then
  222. begin
  223. emit_reg(A_PUSH,S_L,R_EDX);
  224. popedx:=true;
  225. end
  226. else
  227. getexplicitregister32(R_EDX);
  228. if hreg1<>R_EAX then
  229. begin
  230. if not(R_EAX in unused) then
  231. begin
  232. emit_reg(A_PUSH,S_L,R_EAX);
  233. popeax:=true;
  234. end
  235. else
  236. getexplicitregister32(R_EAX);
  237. emit_reg_reg(A_MOV,S_L,hreg1,R_EAX);
  238. end;
  239. end;
  240. { sign extension depends on the left type }
  241. if torddef(left.resulttype.def).typ=u32bit then
  242. emit_reg_reg(A_XOR,S_L,R_EDX,R_EDX)
  243. else
  244. emit_none(A_CDQ,S_NO);
  245. { division depends on the right type }
  246. if torddef(right.resulttype.def).typ=u32bit then
  247. emit_reg(A_DIV,S_L,R_EDI)
  248. else
  249. emit_reg(A_IDIV,S_L,R_EDI);
  250. ungetregister32(R_EDI);
  251. if nodetype=divn then
  252. begin
  253. { if result register is busy then copy }
  254. if popeax then
  255. begin
  256. if hreg1=R_EAX then
  257. internalerror(112);
  258. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1)
  259. end
  260. else
  261. if hreg1<>R_EAX then
  262. Begin
  263. ungetregister32(hreg1);
  264. { no need to allocate eax, that's already done before }
  265. { the div (JM) }
  266. hreg1 := R_EAX;
  267. end;
  268. if not popedx and (hreg1 <> R_EDX) then
  269. ungetregister(R_EDX);
  270. end
  271. else
  272. {if we did the mod by an "and", the result is in hreg1 and
  273. EDX certainly hasn't been pushed (JM)}
  274. if not(andmod) Then
  275. begin
  276. if popedx then
  277. {the mod was done by an (i)div (so the result is now in
  278. edx), but edx was occupied prior to the division, so
  279. move the result into a safe place (JM)}
  280. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1)
  281. else
  282. Begin
  283. if hreg1 <> R_EDX then
  284. ungetregister32(hreg1);
  285. hreg1 := R_EDX
  286. End;
  287. if not popeax and (hreg1 <> R_EAX)then
  288. ungetregister(R_EAX);
  289. end;
  290. if popeax then
  291. emit_reg(A_POP,S_L,R_EAX);
  292. if popedx then
  293. emit_reg(A_POP,S_L,R_EDX);
  294. end;
  295. If not(andmod or shrdiv) then
  296. {andmod and shrdiv only use hreg1 (which is already in usedinproc,
  297. since it was acquired with getregister), the others also use both
  298. EAX and EDX (JM)}
  299. Begin
  300. usedinproc:=usedinproc or ($80 shr byte(R_EAX));
  301. usedinproc:=usedinproc or ($80 shr byte(R_EDX));
  302. End;
  303. clear_location(location);
  304. location.loc:=LOC_REGISTER;
  305. location.register:=hreg1;
  306. end;
  307. end;
  308. {*****************************************************************************
  309. TI386SHLRSHRNODE
  310. *****************************************************************************}
  311. procedure ti386shlshrnode.pass_2;
  312. var
  313. hregister1,hregister2,hregister3,
  314. hregisterhigh,hregisterlow : tregister;
  315. pushed,popecx : boolean;
  316. op : tasmop;
  317. l1,l2,l3 : tasmlabel;
  318. begin
  319. popecx:=false;
  320. secondpass(left);
  321. pushed:=maybe_push(right.registers32,left,is_64bitint(left.resulttype.def));
  322. secondpass(right);
  323. if pushed then
  324. restore(left,is_64bitint(left.resulttype.def));
  325. if is_64bitint(left.resulttype.def) then
  326. begin
  327. { load left operator in a register }
  328. if left.location.loc<>LOC_REGISTER then
  329. begin
  330. if left.location.loc=LOC_CREGISTER then
  331. begin
  332. hregisterlow:=getregister32;
  333. hregisterhigh:=getregister32;
  334. emit_reg_reg(A_MOV,S_L,left.location.registerlow,
  335. hregisterlow);
  336. emit_reg_reg(A_MOV,S_L,left.location.registerhigh,
  337. hregisterlow);
  338. end
  339. else
  340. begin
  341. del_reference(left.location.reference);
  342. hregisterlow:=getregister32;
  343. hregisterhigh:=getregister32;
  344. emit_mov_ref_reg64(left.location.reference,
  345. hregisterlow,
  346. hregisterhigh);
  347. end;
  348. end
  349. else
  350. begin
  351. hregisterlow:=left.location.registerlow;
  352. hregisterhigh:=left.location.registerhigh;
  353. end;
  354. { shifting by a constant directly coded: }
  355. if (right.nodetype=ordconstn) then
  356. begin
  357. { shrd/shl works only for values <=31 !! }
  358. if tordconstnode(right).value>31 then
  359. begin
  360. if nodetype=shln then
  361. begin
  362. emit_reg_reg(A_XOR,S_L,hregisterhigh,
  363. hregisterhigh);
  364. emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31,
  365. hregisterlow);
  366. end
  367. else
  368. begin
  369. emit_reg_reg(A_XOR,S_L,hregisterlow,
  370. hregisterlow);
  371. emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31,
  372. hregisterhigh);
  373. end;
  374. location.registerhigh:=hregisterlow;
  375. location.registerlow:=hregisterhigh;
  376. end
  377. else
  378. begin
  379. if nodetype=shln then
  380. begin
  381. emit_const_reg_reg(A_SHLD,S_L,tordconstnode(right).value and 31,
  382. hregisterlow,hregisterhigh);
  383. emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31,
  384. hregisterlow);
  385. end
  386. else
  387. begin
  388. emit_const_reg_reg(A_SHRD,S_L,tordconstnode(right).value and 31,
  389. hregisterhigh,hregisterlow);
  390. emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31,
  391. hregisterhigh);
  392. end;
  393. location.registerlow:=hregisterlow;
  394. location.registerhigh:=hregisterhigh;
  395. end;
  396. location.loc:=LOC_REGISTER;
  397. end
  398. else
  399. begin
  400. { load right operators in a register }
  401. if right.location.loc<>LOC_REGISTER then
  402. begin
  403. if right.location.loc=LOC_CREGISTER then
  404. begin
  405. hregister2:=getexplicitregister32(R_ECX);
  406. emit_reg_reg(A_MOV,S_L,right.location.register,
  407. hregister2);
  408. end
  409. else
  410. begin
  411. del_reference(right.location.reference);
  412. hregister2:=getexplicitregister32(R_ECX);
  413. emit_ref_reg(A_MOV,S_L,newreference(right.location.reference),
  414. hregister2);
  415. end;
  416. end
  417. else
  418. hregister2:=right.location.register;
  419. { left operator is already in a register }
  420. { hence are both in a register }
  421. { is it in the case ECX ? }
  422. if (hregisterlow=R_ECX) then
  423. begin
  424. { then only swap }
  425. emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
  426. hregister3:=hregisterlow;
  427. hregisterlow:=hregister2;
  428. hregister2:=hregister3;
  429. end
  430. else if (hregisterhigh=R_ECX) then
  431. begin
  432. { then only swap }
  433. emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
  434. hregister3:=hregisterhigh;
  435. hregisterhigh:=hregister2;
  436. hregister2:=hregister3;
  437. end
  438. { if second operator not in ECX ? }
  439. else if (hregister2<>R_ECX) then
  440. begin
  441. { ECX occupied then push it }
  442. if not (R_ECX in unused) then
  443. begin
  444. popecx:=true;
  445. emit_reg(A_PUSH,S_L,R_ECX);
  446. end;
  447. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  448. end;
  449. if hregister2 <> R_ECX then
  450. ungetregister32(hregister2);
  451. { the damned shift instructions work only til a count of 32 }
  452. { so we've to do some tricks here }
  453. if nodetype=shln then
  454. begin
  455. getlabel(l1);
  456. getlabel(l2);
  457. getlabel(l3);
  458. emit_const_reg(A_CMP,S_L,64,R_ECX);
  459. emitjmp(C_L,l1);
  460. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  461. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  462. emitjmp(C_None,l3);
  463. emitlab(l1);
  464. emit_const_reg(A_CMP,S_L,32,R_ECX);
  465. emitjmp(C_L,l2);
  466. emit_const_reg(A_SUB,S_L,32,R_ECX);
  467. emit_reg_reg(A_SHL,S_L,R_CL,
  468. hregisterlow);
  469. emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
  470. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  471. emitjmp(C_None,l3);
  472. emitlab(l2);
  473. emit_reg_reg_reg(A_SHLD,S_L,R_CL,
  474. hregisterlow,hregisterhigh);
  475. emit_reg_reg(A_SHL,S_L,R_CL,
  476. hregisterlow);
  477. emitlab(l3);
  478. end
  479. else
  480. begin
  481. getlabel(l1);
  482. getlabel(l2);
  483. getlabel(l3);
  484. emit_const_reg(A_CMP,S_L,64,R_ECX);
  485. emitjmp(C_L,l1);
  486. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  487. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  488. emitjmp(C_None,l3);
  489. emitlab(l1);
  490. emit_const_reg(A_CMP,S_L,32,R_ECX);
  491. emitjmp(C_L,l2);
  492. emit_const_reg(A_SUB,S_L,32,R_ECX);
  493. emit_reg_reg(A_SHR,S_L,R_CL,
  494. hregisterhigh);
  495. emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
  496. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  497. emitjmp(C_None,l3);
  498. emitlab(l2);
  499. emit_reg_reg_reg(A_SHRD,S_L,R_CL,
  500. hregisterhigh,hregisterlow);
  501. emit_reg_reg(A_SHR,S_L,R_CL,
  502. hregisterhigh);
  503. emitlab(l3);
  504. end;
  505. { maybe put ECX back }
  506. if popecx then
  507. emit_reg(A_POP,S_L,R_ECX)
  508. else ungetregister32(R_ECX);
  509. location.registerlow:=hregisterlow;
  510. location.registerhigh:=hregisterhigh;
  511. end;
  512. end
  513. else
  514. begin
  515. { load left operators in a register }
  516. if left.location.loc<>LOC_REGISTER then
  517. begin
  518. if left.location.loc=LOC_CREGISTER then
  519. begin
  520. hregister1:=getregister32;
  521. emit_reg_reg(A_MOV,S_L,left.location.register,
  522. hregister1);
  523. end
  524. else
  525. begin
  526. del_reference(left.location.reference);
  527. hregister1:=getregister32;
  528. emit_ref_reg(A_MOV,S_L,newreference(left.location.reference),
  529. hregister1);
  530. end;
  531. end
  532. else
  533. hregister1:=left.location.register;
  534. { determine operator }
  535. if nodetype=shln then
  536. op:=A_SHL
  537. else
  538. op:=A_SHR;
  539. { shifting by a constant directly coded: }
  540. if (right.nodetype=ordconstn) then
  541. begin
  542. { l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
  543. if right.value<=31 then
  544. }
  545. emit_const_reg(op,S_L,tordconstnode(right).value and 31,
  546. hregister1);
  547. {
  548. else
  549. emit_reg_reg(A_XOR,S_L,hregister1,
  550. hregister1);
  551. }
  552. location.loc:=LOC_REGISTER;
  553. location.register:=hregister1;
  554. end
  555. else
  556. begin
  557. { load right operators in a register }
  558. if right.location.loc<>LOC_REGISTER then
  559. begin
  560. if right.location.loc=LOC_CREGISTER then
  561. begin
  562. hregister2:=getexplicitregister32(R_ECX);
  563. emit_reg_reg(A_MOV,S_L,right.location.register,
  564. hregister2);
  565. end
  566. else
  567. begin
  568. del_reference(right.location.reference);
  569. hregister2:=getexplicitregister32(R_ECX);
  570. emit_ref_reg(A_MOV,S_L,newreference(right.location.reference),
  571. hregister2);
  572. end;
  573. end
  574. else
  575. hregister2:=right.location.register;
  576. { left operator is already in a register }
  577. { hence are both in a register }
  578. { is it in the case ECX ? }
  579. if (hregister1=R_ECX) then
  580. begin
  581. { then only swap }
  582. emit_reg_reg(A_XCHG,S_L,hregister1,hregister2);
  583. hregister3:=hregister1;
  584. hregister1:=hregister2;
  585. hregister2:=hregister3;
  586. end
  587. { if second operator not in ECX ? }
  588. else if (hregister2<>R_ECX) then
  589. begin
  590. { ECX occupied then push it }
  591. if not (R_ECX in unused) then
  592. begin
  593. popecx:=true;
  594. emit_reg(A_PUSH,S_L,R_ECX);
  595. end
  596. else
  597. getexplicitregister32(R_ECX);
  598. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  599. end;
  600. ungetregister32(hregister2);
  601. { right operand is in ECX }
  602. emit_reg_reg(op,S_L,R_CL,hregister1);
  603. { maybe ECX back }
  604. if popecx then
  605. emit_reg(A_POP,S_L,R_ECX)
  606. else
  607. ungetregister32(R_ECX);
  608. location.register:=hregister1;
  609. end;
  610. end;
  611. end;
  612. {*****************************************************************************
  613. Ti386UNARYMINUSNODE
  614. *****************************************************************************}
  615. procedure ti386unaryminusnode.pass_2;
  616. {$ifdef SUPPORT_MMX}
  617. procedure do_mmx_neg;
  618. var
  619. op : tasmop;
  620. begin
  621. location.loc:=LOC_MMXREGISTER;
  622. if cs_mmx_saturation in aktlocalswitches then
  623. case mmx_type(resulttype.def) of
  624. mmxs8bit:
  625. op:=A_PSUBSB;
  626. mmxu8bit:
  627. op:=A_PSUBUSB;
  628. mmxs16bit,mmxfixed16:
  629. op:=A_PSUBSW;
  630. mmxu16bit:
  631. op:=A_PSUBUSW;
  632. end
  633. else
  634. case mmx_type(resulttype.def) of
  635. mmxs8bit,mmxu8bit:
  636. op:=A_PSUBB;
  637. mmxs16bit,mmxu16bit,mmxfixed16:
  638. op:=A_PSUBW;
  639. mmxs32bit,mmxu32bit:
  640. op:=A_PSUBD;
  641. end;
  642. emit_reg_reg(op,S_NO,location.register,R_MM7);
  643. emit_reg_reg(A_MOVQ,S_NO,R_MM7,location.register);
  644. end;
  645. {$endif}
  646. begin
  647. if is_64bitint(left.resulttype.def) then
  648. begin
  649. secondpass(left);
  650. clear_location(location);
  651. location.loc:=LOC_REGISTER;
  652. case left.location.loc of
  653. LOC_REGISTER :
  654. begin
  655. location.registerlow:=left.location.registerlow;
  656. location.registerhigh:=left.location.registerhigh;
  657. end;
  658. LOC_CREGISTER :
  659. begin
  660. location.registerlow:=getregister32;
  661. location.registerhigh:=getregister32;
  662. emit_reg_reg(A_MOV,S_L,left.location.registerlow,location.registerlow);
  663. emit_reg_reg(A_MOV,S_L,left.location.registerhigh,location.registerhigh);
  664. end;
  665. LOC_REFERENCE,LOC_MEM :
  666. begin
  667. del_reference(left.location.reference);
  668. location.registerlow:=getregister32;
  669. location.registerhigh:=getregister32;
  670. emit_mov_ref_reg64(left.location.reference,
  671. location.registerlow,
  672. location.registerhigh);
  673. end;
  674. end;
  675. {
  676. emit_reg(A_NEG,S_L,location.registerlow);
  677. emit_const_reg(A_ADC,S_L,0,location.registerhigh);
  678. emit_reg(A_NEG,S_L,location.registerhigh);
  679. }
  680. emit_reg(A_NOT,S_L,location.registerhigh);
  681. emit_reg(A_NEG,S_L,location.registerlow);
  682. emit_const_reg(A_SBB,S_L,-1,location.registerhigh);
  683. end
  684. else
  685. begin
  686. secondpass(left);
  687. location.loc:=LOC_REGISTER;
  688. case left.location.loc of
  689. LOC_REGISTER:
  690. begin
  691. location.register:=left.location.register;
  692. emit_reg(A_NEG,S_L,location.register);
  693. end;
  694. LOC_CREGISTER:
  695. begin
  696. location.register:=getregister32;
  697. emit_reg_reg(A_MOV,S_L,location.register,
  698. location.register);
  699. emit_reg(A_NEG,S_L,location.register);
  700. end;
  701. {$ifdef SUPPORT_MMX}
  702. LOC_MMXREGISTER:
  703. begin
  704. set_location(location,left.location);
  705. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  706. do_mmx_neg;
  707. end;
  708. LOC_CMMXREGISTER:
  709. begin
  710. location.register:=getregistermmx;
  711. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  712. emit_reg_reg(A_MOVQ,S_NO,left.location.register,
  713. location.register);
  714. do_mmx_neg;
  715. end;
  716. {$endif SUPPORT_MMX}
  717. LOC_REFERENCE,LOC_MEM:
  718. begin
  719. del_reference(left.location.reference);
  720. if (left.resulttype.def.deftype=floatdef) then
  721. begin
  722. location.loc:=LOC_FPU;
  723. floatload(tfloatdef(left.resulttype.def).typ,
  724. left.location.reference);
  725. emit_none(A_FCHS,S_NO);
  726. end
  727. {$ifdef SUPPORT_MMX}
  728. else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(left.resulttype.def) then
  729. begin
  730. location.register:=getregistermmx;
  731. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  732. emit_ref_reg(A_MOVQ,S_NO,
  733. newreference(left.location.reference),
  734. location.register);
  735. do_mmx_neg;
  736. end
  737. {$endif SUPPORT_MMX}
  738. else
  739. begin
  740. location.register:=getregister32;
  741. emit_ref_reg(A_MOV,S_L,
  742. newreference(left.location.reference),
  743. location.register);
  744. emit_reg(A_NEG,S_L,location.register);
  745. end;
  746. end;
  747. LOC_FPU:
  748. begin
  749. location.loc:=LOC_FPU;
  750. emit_none(A_FCHS,S_NO);
  751. end;
  752. LOC_CFPUREGISTER:
  753. begin
  754. emit_reg(A_FLD,S_NO,
  755. correct_fpuregister(left.location.register,fpuvaroffset));
  756. inc(fpuvaroffset);
  757. location.loc:=LOC_FPU;
  758. emit_none(A_FCHS,S_NO);
  759. end;
  760. end;
  761. end;
  762. { Here was a problem... }
  763. { Operand to be negated always }
  764. { seems to be converted to signed }
  765. { 32-bit before doing neg!! }
  766. { So this is useless... }
  767. { that's not true: -2^31 gives an overflow error if it is negaded (FK) }
  768. { emitoverflowcheck(p);}
  769. end;
  770. {*****************************************************************************
  771. TI386NOTNODE
  772. *****************************************************************************}
  773. procedure ti386notnode.pass_2;
  774. const
  775. flagsinvers : array[F_E..F_BE] of tresflags =
  776. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
  777. F_BE,F_B,F_AE,F_A);
  778. var
  779. hl : tasmlabel;
  780. opsize : topsize;
  781. begin
  782. if is_boolean(resulttype.def) then
  783. begin
  784. opsize:=def_opsize(resulttype.def);
  785. { the second pass could change the location of left }
  786. { if it is a register variable, so we've to do }
  787. { this before the case statement }
  788. if left.location.loc in [LOC_REFERENCE,LOC_MEM,
  789. LOC_FLAGS,LOC_REGISTER,LOC_CREGISTER] then
  790. secondpass(left);
  791. case left.location.loc of
  792. LOC_JUMP :
  793. begin
  794. hl:=truelabel;
  795. truelabel:=falselabel;
  796. falselabel:=hl;
  797. secondpass(left);
  798. maketojumpbool(left);
  799. hl:=truelabel;
  800. truelabel:=falselabel;
  801. falselabel:=hl;
  802. end;
  803. LOC_FLAGS :
  804. location.resflags:=flagsinvers[left.location.resflags];
  805. LOC_REGISTER :
  806. begin
  807. {location.register:=left.location.register;
  808. emit_const_reg(A_XOR,opsize,1,location.register);}
  809. location.loc:=LOC_FLAGS;
  810. location.resflags:=F_E;
  811. emit_reg_reg(A_TEST,opsize,
  812. left.location.register,left.location.register);
  813. ungetregister(left.location.register);
  814. end;
  815. LOC_CREGISTER :
  816. begin
  817. clear_location(location);
  818. location.loc:=LOC_REGISTER;
  819. location.register:=def_getreg(resulttype.def);
  820. emit_reg_reg(A_MOV,opsize,left.location.register,location.register);
  821. emit_reg_reg(A_TEST,opsize,location.register,location.register);
  822. ungetregister(location.register);
  823. location.loc:=LOC_FLAGS;
  824. location.resflags:=F_E;
  825. end;
  826. LOC_REFERENCE,
  827. LOC_MEM :
  828. begin
  829. clear_location(location);
  830. location.loc:=LOC_REGISTER;
  831. del_reference(left.location.reference);
  832. { this was placed before del_ref => internaalerror(10) }
  833. location.register:=def_getreg(resulttype.def);
  834. emit_ref_reg(A_MOV,opsize,
  835. newreference(left.location.reference),location.register);
  836. emit_reg_reg(A_TEST,opsize,location.register,location.register);
  837. ungetregister(location.register);
  838. location.loc:=LOC_FLAGS;
  839. location.resflags:=F_E;
  840. end;
  841. end;
  842. end
  843. {$ifdef SUPPORT_MMX}
  844. else
  845. if (cs_mmx in aktlocalswitches) and is_mmx_able_array(left.resulttype.def) then
  846. begin
  847. secondpass(left);
  848. location.loc:=LOC_MMXREGISTER;
  849. { prepare EDI }
  850. getexplicitregister32(R_EDI);
  851. emit_const_reg(A_MOV,S_L,longint($ffffffff),R_EDI);
  852. { load operand }
  853. case left.location.loc of
  854. LOC_MMXREGISTER:
  855. set_location(location,left.location);
  856. LOC_CMMXREGISTER:
  857. begin
  858. location.register:=getregistermmx;
  859. emit_reg_reg(A_MOVQ,S_NO,left.location.register,location.register);
  860. end;
  861. LOC_REFERENCE,LOC_MEM:
  862. begin
  863. del_reference(left.location.reference);
  864. location.register:=getregistermmx;
  865. emit_ref_reg(A_MOVQ,S_NO,
  866. newreference(left.location.reference),location.register);
  867. end;
  868. end;
  869. { load mask }
  870. emit_reg_reg(A_MOVD,S_NO,R_EDI,R_MM7);
  871. ungetregister32(R_EDI);
  872. { lower 32 bit }
  873. emit_reg_reg(A_PXOR,S_D,R_MM7,location.register);
  874. { shift mask }
  875. emit_const_reg(A_PSLLQ,S_NO,32,R_MM7);
  876. { higher 32 bit }
  877. emit_reg_reg(A_PXOR,S_D,R_MM7,location.register);
  878. end
  879. {$endif SUPPORT_MMX}
  880. else if is_64bitint(left.resulttype.def) then
  881. begin
  882. secondpass(left);
  883. clear_location(location);
  884. location.loc:=LOC_REGISTER;
  885. case left.location.loc of
  886. LOC_REGISTER :
  887. begin
  888. location.registerlow:=left.location.registerlow;
  889. location.registerhigh:=left.location.registerhigh;
  890. emit_reg(A_NOT,S_L,location.registerlow);
  891. emit_reg(A_NOT,S_L,location.registerhigh);
  892. end;
  893. LOC_CREGISTER :
  894. begin
  895. location.registerlow:=getregister32;
  896. location.registerhigh:=getregister32;
  897. emit_reg_reg(A_MOV,S_L,left.location.registerlow,location.registerlow);
  898. emit_reg_reg(A_MOV,S_L,left.location.registerhigh,location.registerhigh);
  899. emit_reg(A_NOT,S_L,location.registerlow);
  900. emit_reg(A_NOT,S_L,location.registerhigh);
  901. end;
  902. LOC_REFERENCE,LOC_MEM :
  903. begin
  904. del_reference(left.location.reference);
  905. location.registerlow:=getregister32;
  906. location.registerhigh:=getregister32;
  907. emit_mov_ref_reg64(left.location.reference,
  908. location.registerlow,
  909. location.registerhigh);
  910. emit_reg(A_NOT,S_L,location.registerlow);
  911. emit_reg(A_NOT,S_L,location.registerhigh);
  912. end;
  913. end;
  914. end
  915. else
  916. begin
  917. secondpass(left);
  918. clear_location(location);
  919. opsize:=def_opsize(resulttype.def);
  920. location.loc:=LOC_REGISTER;
  921. case left.location.loc of
  922. LOC_REGISTER :
  923. begin
  924. location.register:=left.location.register;
  925. emit_reg(A_NOT,opsize,location.register);
  926. end;
  927. LOC_CREGISTER :
  928. begin
  929. location.register:=def_getreg(resulttype.def);
  930. emit_reg_reg(A_MOV,opsize,left.location.register,location.register);
  931. emit_reg(A_NOT,opsize,location.register);
  932. end;
  933. LOC_REFERENCE,LOC_MEM :
  934. begin
  935. del_reference(left.location.reference);
  936. location.register:=def_getreg(resulttype.def);
  937. emit_ref_reg(A_MOV,opsize,
  938. newreference(left.location.reference),location.register);
  939. emit_reg(A_NOT,opsize,location.register);
  940. end;
  941. end;
  942. end;
  943. end;
  944. begin
  945. cmoddivnode:=ti386moddivnode;
  946. cshlshrnode:=ti386shlshrnode;
  947. cunaryminusnode:=ti386unaryminusnode;
  948. cnotnode:=ti386notnode;
  949. end.
  950. {
  951. $Log$
  952. Revision 1.13 2001-04-13 01:22:19 peter
  953. * symtable change to classes
  954. * range check generation and errors fixed, make cycle DEBUG=1 works
  955. * memory leaks fixed
  956. Revision 1.12 2001/04/04 22:37:06 peter
  957. * fix for not with no 32bit values
  958. Revision 1.11 2001/04/02 21:20:38 peter
  959. * resulttype rewrite
  960. Revision 1.10 2001/02/03 12:52:34 jonas
  961. * fixed web bug 1383
  962. Revision 1.9 2000/12/07 17:19:46 jonas
  963. * new constant handling: from now on, hex constants >$7fffffff are
  964. parsed as unsigned constants (otherwise, $80000000 got sign extended
  965. and became $ffffffff80000000), all constants in the longint range
  966. become longints, all constants >$7fffffff and <=cardinal($ffffffff)
  967. are cardinals and the rest are int64's.
  968. * added lots of longint typecast to prevent range check errors in the
  969. compiler and rtl
  970. * type casts of symbolic ordinal constants are now preserved
  971. * fixed bug where the original resulttype.def wasn't restored correctly
  972. after doing a 64bit rangecheck
  973. Revision 1.8 2000/12/05 11:44:33 jonas
  974. + new integer regvar handling, should be much more efficient
  975. Revision 1.7 2000/11/29 00:30:48 florian
  976. * unused units removed from uses clause
  977. * some changes for widestrings
  978. Revision 1.6 2000/11/20 14:05:50 jonas
  979. * fixed bug in my changes to fix the regalloc info for div/mod ("merged")
  980. Revision 1.5 2000/10/31 22:02:56 peter
  981. * symtable splitted, no real code changes
  982. Revision 1.4 2000/10/19 16:26:52 jonas
  983. * fixed wrong regalloc info for secondmoddiv ("merged", also small
  984. correction made afterwards in fixes branch)
  985. Revision 1.3 2000/10/17 15:41:48 jonas
  986. * fixed stupid error in previous commit :/
  987. Revision 1.1 2000/10/15 09:33:32 peter
  988. * moved n386*.pas to i386/ cpu_target dir
  989. Revision 1.4 2000/10/14 10:14:49 peter
  990. * moehrendorf oct 2000 rewrite
  991. Revision 1.3 2000/09/30 16:08:45 peter
  992. * more cg11 updates
  993. Revision 1.2 2000/09/24 15:06:18 peter
  994. * use defines.inc
  995. Revision 1.1 2000/09/22 22:24:37 florian
  996. * initial revision
  997. }