sparc.inc 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717
  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 2002-2004 by the Free Pascal development team.
  4. Processor dependent implementation for the system unit for
  5. Sparc
  6. See the file COPYING.FPC, included in this distribution,
  7. for details about the copyright.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  11. **********************************************************************}
  12. {****************************************************************************
  13. SPARC specific stuff
  14. ****************************************************************************}
  15. function get_fsr : dword;assembler;[public, alias: 'FPC_GETFSR'];
  16. var
  17. fsr : dword;
  18. asm
  19. st %fsr,fsr
  20. ld fsr,%l0
  21. st %l0,__result
  22. end;
  23. procedure set_fsr(fsr : dword);assembler;[public, alias: 'FPC_SETFSR'];
  24. var
  25. _fsr : dword;
  26. asm
  27. // force memory location
  28. st fsr,_fsr
  29. ld _fsr,%fsr
  30. end;
  31. function get_got : pointer;assembler;nostackframe;[public, alias: 'FPC_GETGOT'];
  32. asm
  33. retl
  34. add %o7,%l7,%l7
  35. end;
  36. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  37. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  38. begin
  39. softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
  40. { enable div by 0 and invalid operation fpu exceptions
  41. round towards zero; ieee compliant arithmetics }
  42. set_fsr((get_fsr and $3fbfffff) or $09000000);
  43. end;
  44. {$define FPC_SYSTEM_HAS_SYSRESETFPU}
  45. Procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  46. begin
  47. softfloat_exception_flags:=0;
  48. end;
  49. procedure fpc_cpuinit;
  50. begin
  51. SysResetFPU;
  52. if not(IsLibrary) then
  53. SysInitFPU;
  54. end;
  55. {$define FPC_SYSTEM_HAS_GET_FRAME}
  56. function get_frame:pointer;assembler;nostackframe;
  57. asm
  58. mov %fp,%o0
  59. end;
  60. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  61. function get_caller_addr(framebp:pointer;addr:pointer=nil):pointer;assembler;nostackframe;
  62. asm
  63. { framebp = %o0 }
  64. subcc %o0,0,%o0
  65. be .Lframezero
  66. nop
  67. { flush register windows, so they are stored in the stack }
  68. ta 3
  69. ld [%o0+60],%o0
  70. { check if new %o0 register is zero }
  71. subcc %o0,0,%o0
  72. be .Lframezero
  73. nop
  74. { if not zero, add 8 to skip jmpl and delay slot }
  75. add %o0,8,%o0
  76. .Lframezero:
  77. end;
  78. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  79. function get_caller_frame(framebp:pointer;addr:pointer=nil):pointer;assembler;nostackframe;
  80. asm
  81. { framebp = %o0 }
  82. subcc %o0,0,%o0
  83. be .Lframezero
  84. nop
  85. { flush register windows, so they are stored in the stack }
  86. ta 3
  87. ld [%o0+56],%o0
  88. .Lframezero:
  89. end;
  90. {$define FPC_SYSTEM_HAS_SPTR}
  91. function Sptr:Pointer;assembler;nostackframe;
  92. asm
  93. mov %sp,%o0
  94. end;
  95. {$ifndef FPC_SYSTEM_HAS_MOVE}
  96. {$define FPC_SYSTEM_HAS_MOVE}
  97. procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];assembler;
  98. {
  99. Registers:
  100. %l0 temp. to do copying
  101. %l1 inc/decrement
  102. %l2/l3/l4/l5 qword move
  103. }
  104. asm
  105. // count < 0 ?
  106. cmp %g0,%i2
  107. bge .Lmoveexit
  108. nop
  109. // possible overlap?
  110. cmp %i0,%i1
  111. bcc .Lnopossibleoverlap
  112. nop
  113. // source < dest ....
  114. add %i0,%i2,%l0
  115. // overlap?
  116. cmp %l0,%i1
  117. // source+count < dest ?
  118. bcs .Lnopossibleoverlap
  119. nop
  120. .Lcopybackward:
  121. // check alignment of source and dest
  122. or %i0,%i1,%l0
  123. // move src and dest to the end of the blocks
  124. // assuming 16 byte block size
  125. sub %i2,1,%l1
  126. add %i0,%l1,%i0
  127. add %i1,%l1,%i1
  128. {
  129. // everything 16 byte aligned ?
  130. andcc %l0,15,%l0
  131. be .Lmovetwordwise
  132. // load direction in delay slot
  133. mov -16,%l1
  134. // adjust according to block size
  135. add %i0,8,%i0
  136. add %i1,8,%i1
  137. andcc %l0,7,%l0
  138. be .Lmoveqwordwise
  139. mov -8,%l1
  140. // adjust according to block size
  141. add %i0,4,%i0
  142. add %i1,4,%i1
  143. andcc %l0,3,%l0
  144. be .Lmovedwordwise
  145. mov -4,%l1
  146. // adjust according to block size
  147. add %i0,2,%i0
  148. add %i1,2,%i1
  149. andcc %l0,1,%l0
  150. be .Lmovewordwise
  151. mov -2,%l1
  152. // adjust according to block size
  153. add %i0,1,%i0
  154. add %i1,1,%i1
  155. }
  156. ba .Lmovebytewise
  157. mov -1,%l1
  158. .Lnopossibleoverlap:
  159. // check alignment of source and dest
  160. or %i0,%i1,%l0
  161. // everything 16 byte aligned ?
  162. andcc %l0,15,%l0
  163. be .Lmovetwordwise
  164. // load direction in delay slot
  165. mov 16,%l1
  166. andcc %l0,7,%l0
  167. be .Lmoveqwordwise
  168. mov 8,%l1
  169. andcc %l0,3,%l0
  170. be .Lmovedwordwise
  171. mov 4,%l1
  172. andcc %l0,1,%l0
  173. be .Lmovewordwise
  174. mov 2,%l1
  175. ba .Lmovebytewise
  176. mov 1,%l1
  177. .Lmovetwordwise:
  178. srl %i2,4,%l6
  179. cmp %g0,%l6
  180. sll %l6,4,%l7
  181. be .Lmoveqwordwise_shift
  182. nop
  183. .Lmovetwordwise_loop:
  184. ld [%i0],%l2
  185. ld [%i0+4],%l3
  186. subcc %l6,1,%l6
  187. ld [%i0+8],%l4
  188. ld [%i0+12],%l5
  189. add %i0,%l1,%i0
  190. st %l2,[%i1]
  191. st %l3,[%i1+4]
  192. st %l4,[%i1+8]
  193. st %l5,[%i1+12]
  194. add %i1,%l1,%i1
  195. bne .Lmovetwordwise_loop
  196. nop
  197. subcc %i2,%l7,%i2
  198. be .Lmoveexit
  199. nop
  200. .Lmoveqwordwise_shift:
  201. sra %l1,1,%l1
  202. .Lmoveqwordwise:
  203. srl %i2,3,%l6
  204. cmp %g0,%l6
  205. sll %l6,3,%l7
  206. be .Lmovedwordwise_shift
  207. nop
  208. .Lmoveqwordwise_loop:
  209. ld [%i0],%l2
  210. ld [%i0+4],%l3
  211. subcc %l6,1,%l6
  212. add %i0,%l1,%i0
  213. st %l2,[%i1]
  214. st %l3,[%i1+4]
  215. add %i1,%l1,%i1
  216. bne .Lmoveqwordwise_loop
  217. nop
  218. subcc %i2,%l7,%i2
  219. be .Lmoveexit
  220. nop
  221. .Lmovedwordwise_shift:
  222. sra %l1,1,%l1
  223. .Lmovedwordwise:
  224. srl %i2,2,%l6
  225. cmp %g0,%l6
  226. sll %l6,2,%l7
  227. be .Lmovewordwise_shift
  228. nop
  229. .Lmovedwordwise_loop:
  230. ld [%i0],%l0
  231. subcc %l6,1,%l6
  232. add %i0,%l1,%i0
  233. st %l0,[%i1]
  234. add %i1,%l1,%i1
  235. bne .Lmovedwordwise_loop
  236. nop
  237. subcc %i2,%l7,%i2
  238. be .Lmoveexit
  239. nop
  240. .Lmovewordwise_shift:
  241. sra %l1,1,%l1
  242. .Lmovewordwise:
  243. srl %i2,1,%l6
  244. cmp %g0,%l6
  245. sll %l6,1,%l7
  246. be .Lmovebytewise_shift
  247. nop
  248. .Lmovewordwise_loop:
  249. lduh [%i0],%l0
  250. subcc %l6,1,%l6
  251. add %i0,%l1,%i0
  252. sth %l0,[%i1]
  253. add %i1,%l1,%i1
  254. bne .Lmovewordwise_loop
  255. nop
  256. subcc %i2,%l7,%i2
  257. be .Lmoveexit
  258. nop
  259. .Lmovebytewise_shift:
  260. sra %l1,1,%l1
  261. .Lmovebytewise:
  262. cmp %g0,%i2
  263. be .Lmoveexit
  264. nop
  265. ldub [%i0],%l0
  266. subcc %i2,1,%i2
  267. add %i0,%l1,%i0
  268. stb %l0,[%i1]
  269. add %i1,%l1,%i1
  270. bne .Lmovebytewise
  271. nop
  272. .Lmoveexit:
  273. end;
  274. {$endif FPC_SYSTEM_HAS_MOVE}
  275. {****************************************************************************
  276. Integer math
  277. ****************************************************************************}
  278. {$define FPC_SYSTEM_HAS_ABS_LONGINT}
  279. function abs(l:longint):longint; assembler;{$ifdef SYSTEMINLINE}inline;{$endif}nostackframe;
  280. asm
  281. sra %o0,31,%g1
  282. add %o0,%g1,%o0
  283. xor %o0,%g1,%o0
  284. end;
  285. var
  286. fpc_system_lock : byte;export name 'fpc_system_lock';
  287. {$define FPC_SYSTEM_HAS_DECLOCKED_LONGINT}
  288. function declocked(var l : longint) : boolean;assembler;
  289. {$ifndef FPC_PIC}nostackframe;{$endif}
  290. asm
  291. { usually, we shouldn't lock here so saving the stack frame for these extra intructions is
  292. worse the effort, especially while waiting :)
  293. }
  294. {$ifdef FPC_PIC}
  295. sethi %hi(_GLOBAL_OFFSET_TABLE_ -8),%l7
  296. or %l7,%lo(_GLOBAL_OFFSET_TABLE_ -4),%l7
  297. call get_got
  298. nop
  299. {$endif FPC_PIC}
  300. .Ldeclocked1:
  301. sethi %hi(fpc_system_lock), %g1
  302. or %g1,%lo(fpc_system_lock), %g1
  303. {$ifdef FPC_PIC}
  304. ld [%g1+%l7],%g1
  305. {$endif FPC_PIC}
  306. ldstub [%g1],%g1
  307. cmp %g1,0
  308. bne .Ldeclocked1
  309. nop
  310. {$ifdef FPC_PIC}
  311. ld [%i0],%g1
  312. sub %g1,1,%g1
  313. st %g1,[%i0]
  314. subcc %g1,1,%g0
  315. addx %g0,%g0,%i0
  316. {$else not FPC_PIC}
  317. ld [%o0],%g1
  318. sub %g1,1,%g1
  319. st %g1,[%o0]
  320. subcc %g1,1,%g0
  321. addx %g0,%g0,%o0
  322. {$endif FPC_PIC}
  323. { unlock }
  324. sethi %hi(fpc_system_lock), %g1
  325. or %g1,%lo(fpc_system_lock), %g1
  326. {$ifdef FPC_PIC}
  327. ld [%g1+%l7],%g1
  328. {$endif FPC_PIC}
  329. stb %g0,[%g1]
  330. end;
  331. {$define FPC_SYSTEM_HAS_INCLOCKED_LONGINT}
  332. procedure inclocked(var l : longint);assembler;
  333. {$ifndef FPC_PIC}nostackframe;{$endif}
  334. asm
  335. { usually, we shouldn't lock here so saving the stack frame for these extra intructions is
  336. worse the effort, especially while waiting :)
  337. }
  338. {$ifdef FPC_PIC}
  339. sethi %hi(_GLOBAL_OFFSET_TABLE_ -8),%l7
  340. or %l7,%lo(_GLOBAL_OFFSET_TABLE_ -4),%l7
  341. call get_got
  342. nop
  343. {$endif FPC_PIC}
  344. .Linclocked1:
  345. sethi %hi(fpc_system_lock), %g1
  346. or %g1,%lo(fpc_system_lock), %g1
  347. {$ifdef FPC_PIC}
  348. ld [%g1+%l7],%g1
  349. {$endif FPC_PIC}
  350. ldstub [%g1],%g1
  351. cmp %g1,0
  352. bne .Linclocked1
  353. nop
  354. {$ifdef FPC_PIC}
  355. ld [%i0],%g1
  356. add %g1,1,%g1
  357. st %g1,[%i0]
  358. {$else not FPC_PIC}
  359. ld [%o0],%g1
  360. add %g1,1,%g1
  361. st %g1,[%o0]
  362. {$endif FPC_PIC}
  363. { unlock }
  364. sethi %hi(fpc_system_lock), %g1
  365. or %g1,%lo(fpc_system_lock), %g1
  366. {$ifdef FPC_PIC}
  367. ld [%g1+%l7],%g1
  368. {$endif FPC_PIC}
  369. stb %g0,[%g1]
  370. end;
  371. function InterLockedDecrement (var Target: longint) : longint; assembler;
  372. {$ifndef FPC_PIC}nostackframe;{$endif}
  373. asm
  374. { usually, we shouldn't lock here so saving the stack frame for these extra intructions is
  375. worse the effort, especially while waiting :)
  376. }
  377. {$ifdef FPC_PIC}
  378. sethi %hi(_GLOBAL_OFFSET_TABLE_ -8),%l7
  379. or %l7,%lo(_GLOBAL_OFFSET_TABLE_ -4),%l7
  380. call get_got
  381. nop
  382. {$endif FPC_PIC}
  383. .LInterLockedDecrement1:
  384. sethi %hi(fpc_system_lock), %g1
  385. or %g1,%lo(fpc_system_lock), %g1
  386. {$ifdef FPC_PIC}
  387. ld [%g1+%l7],%g1
  388. {$endif FPC_PIC}
  389. ldstub [%g1],%g1
  390. cmp %g1,0
  391. bne .LInterLockedDecrement1
  392. nop
  393. {$ifdef FPC_PIC}
  394. ld [%i0],%g1
  395. sub %g1,1,%g1
  396. st %g1,[%i0]
  397. mov %g1,%i0
  398. {$else not FPC_PIC}
  399. ld [%o0],%g1
  400. sub %g1,1,%g1
  401. st %g1,[%o0]
  402. mov %g1,%o0
  403. {$endif FPC_PIC}
  404. { unlock }
  405. sethi %hi(fpc_system_lock), %g1
  406. or %g1,%lo(fpc_system_lock), %g1
  407. {$ifdef FPC_PIC}
  408. ld [%g1+%l7],%g1
  409. {$endif FPC_PIC}
  410. stb %g0,[%g1]
  411. end;
  412. function InterLockedIncrement (var Target: longint) : longint; assembler;
  413. {$ifndef FPC_PIC}nostackframe;{$endif}
  414. asm
  415. { usually, we shouldn't lock here so saving the stack frame for these extra intructions is
  416. worse the effort, especially while waiting :)
  417. }
  418. {$ifdef FPC_PIC}
  419. sethi %hi(_GLOBAL_OFFSET_TABLE_ -8),%l7
  420. or %l7,%lo(_GLOBAL_OFFSET_TABLE_ -4),%l7
  421. call get_got
  422. nop
  423. {$endif FPC_PIC}
  424. .LInterLockedIncrement1:
  425. sethi %hi(fpc_system_lock), %g1
  426. or %g1,%lo(fpc_system_lock), %g1
  427. {$ifdef FPC_PIC}
  428. ld [%g1+%l7],%g1
  429. {$endif FPC_PIC}
  430. ldstub [%g1],%g1
  431. cmp %g1,0
  432. bne .LInterLockedIncrement1
  433. nop
  434. {$ifdef FPC_PIC}
  435. ld [%i0],%g1
  436. add %g1,1,%g1
  437. st %g1,[%i0]
  438. mov %g1,%i0
  439. {$else not FPC_PIC}
  440. ld [%o0],%g1
  441. add %g1,1,%g1
  442. st %g1,[%o0]
  443. mov %g1,%o0
  444. {$endif FPC_PIC}
  445. { unlock }
  446. sethi %hi(fpc_system_lock), %g1
  447. or %g1,%lo(fpc_system_lock), %g1
  448. {$ifdef FPC_PIC}
  449. ld [%g1+%l7],%g1
  450. {$endif FPC_PIC}
  451. stb %g0,[%g1]
  452. end;
  453. function InterLockedExchange (var Target: longint;Source : longint) : longint; assembler;
  454. {$ifndef FPC_PIC}nostackframe;{$endif}
  455. asm
  456. { usually, we shouldn't lock here so saving the stack frame for these extra intructions is
  457. worse the effort, especially while waiting :)
  458. }
  459. {$ifdef FPC_PIC}
  460. sethi %hi(_GLOBAL_OFFSET_TABLE_ -8),%l7
  461. or %l7,%lo(_GLOBAL_OFFSET_TABLE_ -4),%l7
  462. call get_got
  463. nop
  464. {$endif FPC_PIC}
  465. .LInterLockedExchange1:
  466. sethi %hi(fpc_system_lock), %g1
  467. or %g1,%lo(fpc_system_lock), %g1
  468. {$ifdef FPC_PIC}
  469. ld [%g1+%l7],%g1
  470. {$endif FPC_PIC}
  471. ldstub [%g1],%g1
  472. cmp %g1,0
  473. bne .LInterLockedExchange1
  474. nop
  475. {$ifdef FPC_PIC}
  476. ld [%i0],%g1
  477. st %i1,[%i0]
  478. mov %g1,%i0
  479. {$else not FPC_PIC}
  480. ld [%o0],%g1
  481. st %o1,[%o0]
  482. mov %g1,%o0
  483. {$endif FPC_PIC}
  484. { unlock }
  485. sethi %hi(fpc_system_lock), %g1
  486. or %g1,%lo(fpc_system_lock), %g1
  487. {$ifdef FPC_PIC}
  488. ld [%g1+%l7],%g1
  489. {$endif FPC_PIC}
  490. stb %g0,[%g1]
  491. end;
  492. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint; assembler;
  493. {$ifndef FPC_PIC}nostackframe;{$endif}
  494. asm
  495. { usually, we shouldn't lock here so saving the stack frame for these extra intructions is
  496. worse the effort, especially while waiting :)
  497. }
  498. {$ifdef FPC_PIC}
  499. sethi %hi(_GLOBAL_OFFSET_TABLE_ -8),%l7
  500. or %l7,%lo(_GLOBAL_OFFSET_TABLE_ -4),%l7
  501. call get_got
  502. nop
  503. {$endif FPC_PIC}
  504. .LInterLockedExchangeAdd1:
  505. sethi %hi(fpc_system_lock), %g1
  506. or %g1,%lo(fpc_system_lock), %g1
  507. {$ifdef FPC_PIC}
  508. ld [%g1+%l7],%g1
  509. {$endif FPC_PIC}
  510. ldstub [%g1],%g1
  511. cmp %g1,0
  512. bne .LInterLockedExchangeAdd1
  513. nop
  514. {$ifdef FPC_PIC}
  515. ld [%i0],%g1
  516. add %g1,%i1,%i1
  517. st %i1,[%i0]
  518. mov %g1,%i0
  519. {$else not FPC_PIC}
  520. ld [%o0],%g1
  521. add %g1,%o1,%o1
  522. st %o1,[%o0]
  523. mov %g1,%o0
  524. {$endif FPC_PIC}
  525. { unlock }
  526. sethi %hi(fpc_system_lock), %g1
  527. or %g1,%lo(fpc_system_lock), %g1
  528. {$ifdef FPC_PIC}
  529. ld [%g1+%l7],%g1
  530. {$endif FPC_PIC}
  531. stb %g0,[%g1]
  532. end;
  533. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint; assembler;
  534. {$ifndef FPC_PIC}nostackframe;{$endif}
  535. asm
  536. { usually, we shouldn't lock here so saving the stack frame for these extra intructions is
  537. worse the effort, especially while waiting :)
  538. }
  539. { input: address of target in o0, newvalue in o1, comparand in o2 }
  540. { output: value stored in target before entry of the function }
  541. { side-effect: NewValue stored in target if (target = comparand) }
  542. {$ifdef FPC_PIC}
  543. sethi %hi(_GLOBAL_OFFSET_TABLE_ -8),%l7
  544. or %l7,%lo(_GLOBAL_OFFSET_TABLE_ -4),%l7
  545. call get_got
  546. nop
  547. {$endif FPC_PIC}
  548. .LInterlockedCompareExchange1:
  549. sethi %hi(fpc_system_lock), %g1
  550. or %g1,%lo(fpc_system_lock), %g1
  551. {$ifdef FPC_PIC}
  552. ld [%g1+%l7],%g1
  553. {$endif FPC_PIC}
  554. ldstub [%g1],%g1
  555. cmp %g1,0
  556. bne .LInterlockedCompareExchange1
  557. nop
  558. {$ifdef FPC_PIC}
  559. ld [%i0],%g1
  560. cmp %g1,%i2
  561. bne .LInterlockedCompareExchange2
  562. nop
  563. st %i1,[%i0]
  564. .LInterlockedCompareExchange2:
  565. mov %g1,%i0
  566. {$else not FPC_PIC}
  567. ld [%o0],%g1
  568. cmp %g1,%o2
  569. bne .LInterlockedCompareExchange2
  570. nop
  571. st %o1,[%o0]
  572. .LInterlockedCompareExchange2:
  573. mov %g1,%o0
  574. {$endif FPC_PIC}
  575. { unlock }
  576. sethi %hi(fpc_system_lock), %g1
  577. or %g1,%lo(fpc_system_lock), %g1
  578. {$ifdef FPC_PIC}
  579. ld [%g1+%l7],%g1
  580. {$endif FPC_PIC}
  581. stb %g0,[%g1]
  582. end;
  583. {$ifndef FPC_SYSTEM_HAS_MEM_BARRIER}
  584. {$define FPC_SYSTEM_HAS_MEM_BARRIER}
  585. const
  586. LoadLoad = $01;
  587. StoreLoad = $02;
  588. LoadStore = $04;
  589. StoreStore = $08;
  590. LookAside = $10;
  591. MemIssue = $20;
  592. Sync = $40;
  593. {$if not(defined(SPARCV7)) and not(defined(SPARCV8))}
  594. {$define CPUSPARC_HAS_MEMBAR}
  595. {$endif}
  596. procedure ReadBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
  597. asm
  598. {$ifdef CPUSPARC_HAS_MEMBAR}
  599. ba,pt .L1
  600. membar LoadLoad
  601. .L1:
  602. {$endif}
  603. end;
  604. procedure ReadDependencyBarrier;{$ifdef SYSTEMINLINE}inline;{$endif}
  605. begin
  606. { reads imply barrier on earlier reads depended on }
  607. end;
  608. procedure ReadWriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
  609. asm
  610. {$ifdef CPUSPARC_HAS_MEMBAR}
  611. ba,pt .L1
  612. membar LoadLoad + LoadStore + StoreLoad + StoreStore
  613. .L1:
  614. {$endif}
  615. end;
  616. procedure WriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
  617. asm
  618. {$ifdef CPUSPARC_HAS_MEMBAR}
  619. ba,pt .L1
  620. stbar
  621. .L1:
  622. {$endif}
  623. end;
  624. {$endif}