aoptcpu.pas 27 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses
  22. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai, aasmcpu;
  23. Type
  24. TAsmOpSet = set of TAsmOp;
  25. TCpuAsmOptimizer = class(TAsmOptimizer)
  26. function RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean; override;
  27. function GetNextInstructionUsingReg(Current: tai;
  28. var Next: tai; reg: TRegister): Boolean;
  29. function RegUsedAfterInstruction(reg: Tregister; p: tai;
  30. var AllUsedRegs: TAllUsedRegs): Boolean;
  31. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  32. function TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  33. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  34. procedure PeepHoleOptPass2; override;
  35. End;
  36. Implementation
  37. uses
  38. globals,aasmbase,cpuinfo,verbose;
  39. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  40. begin
  41. result :=
  42. (instr.typ = ait_instruction) and
  43. (taicpu(instr).opcode = op);
  44. end;
  45. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  46. begin
  47. result:=(oper.typ=top_reg) and (oper.reg=reg);
  48. end;
  49. function IsSameReg(this,next: taicpu): boolean;
  50. begin
  51. result:=(next.oper[0]^.typ=top_reg) and
  52. (next.oper[1]^.typ=top_reg) and
  53. (next.oper[0]^.reg=next.oper[1]^.reg) and
  54. (next.oper[0]^.reg=this.oper[0]^.reg);
  55. end;
  56. function regLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  57. var
  58. p: taicpu;
  59. begin
  60. p:=taicpu(hp);
  61. result:=false;
  62. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  63. exit;
  64. case p.opcode of
  65. { These instructions do not write into a register at all }
  66. A_NOP,
  67. A_C_EQ_D,A_C_EQ_S,A_C_LE_D,A_C_LE_S,A_C_LT_D,A_C_LT_S,
  68. A_BA,A_BC,
  69. A_SB,A_SH,A_SW,A_SWL,A_SWR,A_SWC1,A_SDC1:
  70. exit;
  71. end;
  72. result:=(p.ops>0) and (p.oper[0]^.typ=top_reg) and
  73. (p.oper[0]^.reg=reg);
  74. end;
  75. function CanBeCMOV(p: tai): boolean;
  76. begin
  77. result:=assigned(p) and (p.typ=ait_instruction) and
  78. (taicpu(p).opcode in [A_MOV_D,A_MOV_S,A_MOVE]);
  79. end;
  80. procedure ChangeToCMOV(p: taicpu; cond: tasmcond; reg: tregister);
  81. begin
  82. case cond of
  83. C_COP1TRUE:
  84. case p.opcode of
  85. A_MOV_D: p.opcode:=A_MOVT_D;
  86. A_MOV_S: p.opcode:=A_MOVT_S;
  87. A_MOVE: p.opcode:=A_MOVT;
  88. else
  89. InternalError(2014061701);
  90. end;
  91. C_COP1FALSE:
  92. case p.opcode of
  93. A_MOV_D: p.opcode:=A_MOVF_D;
  94. A_MOV_S: p.opcode:=A_MOVF_S;
  95. A_MOVE: p.opcode:=A_MOVF;
  96. else
  97. InternalError(2014061702);
  98. end;
  99. C_EQ:
  100. case p.opcode of
  101. A_MOV_D: p.opcode:=A_MOVZ_D;
  102. A_MOV_S: p.opcode:=A_MOVZ_S;
  103. A_MOVE: p.opcode:=A_MOVZ;
  104. else
  105. InternalError(2014061703);
  106. end;
  107. C_NE:
  108. case p.opcode of
  109. A_MOV_D: p.opcode:=A_MOVN_D;
  110. A_MOV_S: p.opcode:=A_MOVN_S;
  111. A_MOVE: p.opcode:=A_MOVN;
  112. else
  113. InternalError(2014061704);
  114. end;
  115. else
  116. InternalError(2014061705);
  117. end;
  118. p.ops:=3;
  119. p.loadreg(2,reg);
  120. end;
  121. function instructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  122. var
  123. p: taicpu;
  124. i: longint;
  125. begin
  126. result:=false;
  127. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  128. exit;
  129. p:=taicpu(hp);
  130. i:=1;
  131. while(i<p.ops) do
  132. begin
  133. case p.oper[I]^.typ of
  134. top_reg:
  135. result:=(p.oper[I]^.reg=reg) and (I<2);
  136. top_ref:
  137. result:=
  138. (p.oper[I]^.ref^.base=reg) or
  139. (p.oper[I]^.ref^.index=reg);
  140. end;
  141. if result then exit; {Bailout if we found something}
  142. Inc(I);
  143. end;
  144. end;
  145. function TCpuAsmOptimizer.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
  146. var
  147. i : Longint;
  148. begin
  149. result:=false;
  150. for i:=0 to taicpu(p1).ops-1 do
  151. if (taicpu(p1).oper[i]^.typ=top_reg) and (taicpu(p1).oper[i]^.reg=Reg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
  152. begin
  153. result:=true;
  154. exit;
  155. end;
  156. end;
  157. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  158. var Next: tai; reg: TRegister): Boolean;
  159. begin
  160. Next:=Current;
  161. repeat
  162. Result:=GetNextInstruction(Next,Next);
  163. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  164. (is_calljmp(taicpu(Next).opcode));
  165. if Result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  166. begin
  167. result:=false;
  168. next:=nil;
  169. end;
  170. end;
  171. function TCpuAsmOptimizer.RegUsedAfterInstruction(reg: Tregister; p: tai;
  172. var AllUsedRegs: TAllUsedRegs): Boolean;
  173. begin
  174. AllUsedRegs[getregtype(reg)].Update(tai(p.Next),true);
  175. RegUsedAfterInstruction :=
  176. AllUsedRegs[getregtype(reg)].IsUsed(reg) and
  177. not(regLoadedWithNewValue(reg,p)) and
  178. (
  179. not(GetNextInstruction(p,p)) or
  180. instructionLoadsFromReg(reg,p) or
  181. not(regLoadedWithNewValue(reg,p))
  182. );
  183. end;
  184. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  185. var
  186. next,hp1: tai;
  187. alloc,dealloc: tai_regalloc;
  188. begin
  189. { Fold
  190. op $reg1,...
  191. opcode $reg2,$reg1
  192. dealloc $reg1
  193. into
  194. op $reg2,...
  195. opcode may be A_MOVE, A_MOV_s, A_MOV_d, etc.
  196. }
  197. result:=false;
  198. if (taicpu(p).ops>1) and
  199. GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  200. MatchInstruction(next,opcode) and
  201. MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
  202. { the destination register of mov cannot be used between p and next }
  203. (not RegUsedBetween(taicpu(next).oper[0]^.reg,p,next)) then
  204. begin
  205. dealloc:=FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.Next));
  206. if assigned(dealloc) then
  207. begin
  208. { taicpu(p).oper[0]^.reg is not used anymore, try to find its allocation
  209. and remove it if possible }
  210. GetLastInstruction(p,hp1);
  211. asml.Remove(dealloc);
  212. alloc:=FindRegAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  213. if assigned(alloc) then
  214. begin
  215. asml.Remove(alloc);
  216. alloc.free;
  217. dealloc.free;
  218. end
  219. else
  220. asml.InsertAfter(dealloc,p);
  221. { try to move the allocation of the target register }
  222. GetLastInstruction(next,hp1);
  223. alloc:=FindRegAlloc(taicpu(next).oper[0]^.reg,tai(hp1.Next));
  224. if assigned(alloc) then
  225. begin
  226. asml.Remove(alloc);
  227. asml.InsertBefore(alloc,p);
  228. { adjust used regs }
  229. IncludeRegInUsedRegs(taicpu(next).oper[0]^.reg,UsedRegs);
  230. end;
  231. { finally get rid of the mov }
  232. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  233. asml.remove(next);
  234. next.free;
  235. end;
  236. end;
  237. end;
  238. function TCpuAsmOptimizer.TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  239. begin
  240. result:=(next.opcode in storeops) and
  241. MatchOperand(next.oper[0]^,taicpu(p).oper[0]^.reg) and
  242. { Ry cannot be modified between move and store }
  243. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  244. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  245. if result then
  246. begin
  247. next.loadreg(0,taicpu(p).oper[1]^.reg);
  248. asml.remove(p);
  249. p.free;
  250. p:=next;
  251. end;
  252. end;
  253. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  254. var
  255. next,next2: tai;
  256. TmpUsedRegs: TAllUsedRegs;
  257. begin
  258. result:=false;
  259. case p.typ of
  260. ait_instruction:
  261. begin
  262. case taicpu(p).opcode of
  263. A_SLL:
  264. begin
  265. { if this is a sign extension... }
  266. if (taicpu(p).oper[2]^.typ=top_const) and
  267. GetNextInstruction(p,next) and
  268. MatchInstruction(next,A_SRA) and
  269. IsSameReg(taicpu(p),taicpu(next)) and
  270. (taicpu(next).oper[2]^.typ=top_const) and
  271. (taicpu(next).oper[2]^.val=taicpu(p).oper[2]^.val) and
  272. (taicpu(next).oper[2]^.val=16) and
  273. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  274. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[0]^.reg) and
  275. MatchInstruction(next2,A_SH) and
  276. (taicpu(next2).oper[0]^.typ=top_reg) and
  277. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  278. { the initial register may not be reused }
  279. (not RegUsedBetween(taicpu(p).oper[1]^.reg,next,next2)) then
  280. begin
  281. CopyUsedRegs(TmpUsedRegs);
  282. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  283. UpdateUsedRegs(TmpUsedRegs, tai(next.next));
  284. if not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg,next2,TmpUsedRegs) then
  285. begin
  286. taicpu(next2).loadreg(0,taicpu(p).oper[1]^.reg);
  287. asml.remove(p);
  288. asml.remove(next);
  289. p.free;
  290. next.free;
  291. p:=next2;
  292. end;
  293. ReleaseUsedRegs(TmpUsedRegs);
  294. end
  295. else
  296. TryRemoveMov(p,A_MOVE);
  297. end;
  298. A_SRL:
  299. begin
  300. { Remove 'andi' in sequences
  301. srl Rx,Ry,16
  302. andi Rx,Rx,65535
  303. srl Rx,Ry,24
  304. andi Rx,Rx,255
  305. since 'srl' clears all relevant upper bits }
  306. if (taicpu(p).oper[2]^.typ=top_const) and
  307. GetNextInstruction(p,next) and
  308. MatchInstruction(next,A_ANDI) and
  309. IsSameReg(taicpu(p),taicpu(next)) and
  310. (taicpu(next).oper[2]^.typ=top_const) and
  311. ((
  312. (taicpu(p).oper[2]^.val>=16) and
  313. (taicpu(next).oper[2]^.val=65535)
  314. ) or (
  315. (taicpu(p).oper[2]^.val>=24) and
  316. (taicpu(next).oper[2]^.val=255)
  317. )) then
  318. begin
  319. asml.remove(next);
  320. next.free;
  321. end
  322. else
  323. TryRemoveMov(p,A_MOVE);
  324. end;
  325. A_ANDI:
  326. begin
  327. { Remove sign extension after 'andi' if bit 7/15 of const operand is clear }
  328. if (taicpu(p).oper[2]^.typ=top_const) and
  329. GetNextInstruction(p,next) and
  330. MatchInstruction(next,A_SLL) and
  331. GetNextInstruction(next,next2) and
  332. MatchInstruction(next2,A_SRA) and
  333. IsSameReg(taicpu(p),taicpu(next)) and
  334. IsSameReg(taicpu(p),taicpu(next2)) and
  335. (taicpu(next).oper[2]^.typ=top_const) and
  336. (taicpu(next2).oper[2]^.typ=top_const) and
  337. (taicpu(next).oper[2]^.val=taicpu(next2).oper[2]^.val) and
  338. ((
  339. (taicpu(p).oper[2]^.val<=$7fff) and
  340. (taicpu(next).oper[2]^.val=16)
  341. ) or (
  342. (taicpu(p).oper[2]^.val<=$7f) and
  343. (taicpu(next).oper[2]^.val=24)
  344. )) then
  345. begin
  346. asml.remove(next);
  347. asml.remove(next2);
  348. next.free;
  349. next2.free;
  350. end
  351. { Remove zero extension if register is used only for byte/word memory store }
  352. else if (taicpu(p).oper[2]^.typ=top_const) and
  353. GetNextInstruction(p,next) and
  354. ((taicpu(p).oper[2]^.val=255) and MatchInstruction(next,A_SB)) or
  355. ((taicpu(p).oper[2]^.val=65535) and MatchInstruction(next,A_SH)) and
  356. (taicpu(next).oper[0]^.typ=top_reg) and
  357. (taicpu(next).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  358. begin
  359. CopyUsedRegs(TmpUsedRegs);
  360. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  361. if not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg,next,TmpUsedRegs) then
  362. begin
  363. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  364. asml.remove(p);
  365. p.free;
  366. p:=next;
  367. end;
  368. ReleaseUsedRegs(TmpUsedRegs);
  369. end
  370. else
  371. TryRemoveMov(p,A_MOVE);
  372. end;
  373. A_MOV_S:
  374. begin
  375. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  376. (next.typ=ait_instruction) then
  377. begin
  378. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SWC1]) then
  379. { optimization successful };
  380. end;
  381. end;
  382. A_MOV_D:
  383. begin
  384. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  385. (next.typ=ait_instruction) then
  386. begin
  387. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SDC1]) then
  388. { optimization successful };
  389. end;
  390. end;
  391. A_MOVE:
  392. begin
  393. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  394. (next.typ=ait_instruction) then
  395. begin
  396. { MOVE Rx,Ry; store Rx,(ref); dealloc Rx ==> store Ry,(ref) }
  397. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SB,A_SH,A_SW]) then
  398. { optimization successful }
  399. { MOVE Rx,Ry; opcode Rx,Rx,any ==> opcode Rx,Ry,any
  400. MOVE Rx,Ry; opcode Rx,Rz,Rx ==> opcode Rx,Rz,Ry }
  401. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU]) and
  402. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) and
  403. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  404. begin
  405. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  406. begin
  407. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  408. asml.remove(p);
  409. p.free;
  410. p:=next;
  411. end
  412. { TODO: if Ry=NR_R0, this effectively changes instruction into MOVE,
  413. providing further optimization possibilities }
  414. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
  415. begin
  416. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  417. asml.remove(p);
  418. p.free;
  419. p:=next;
  420. end;
  421. end
  422. { MOVE Rx,Ry; opcode Rz,Rx,any; dealloc Rx ==> opcode Rz,Ry,any }
  423. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU]) and
  424. MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
  425. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  426. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  427. begin
  428. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  429. asml.remove(p);
  430. p.free;
  431. p:=next;
  432. end
  433. { MULT[U] must be handled separately }
  434. else if (taicpu(next).opcode in [A_MULT,A_MULTU]) and
  435. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  436. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  437. begin
  438. if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  439. begin
  440. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  441. asml.remove(p);
  442. p.free;
  443. p:=next;
  444. end
  445. else if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  446. begin
  447. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  448. asml.remove(p);
  449. p.free;
  450. p:=next;
  451. end;
  452. end;
  453. { TODO: MOVE Rx,Ry; Bcc Rx,Rz,label; dealloc Rx ==> Bcc Ry,Rz,label }
  454. end;
  455. end;
  456. A_LB,A_LBU,A_LH,A_LHU,A_LW,
  457. A_ADD,A_ADDU,
  458. A_ADDI,A_ADDIU,
  459. A_SUB,A_SUBU,
  460. A_SRA,A_SRAV,
  461. A_SRLV,
  462. A_SLLV,
  463. A_AND,A_OR,A_XOR,A_ORI,A_XORI:
  464. TryRemoveMov(p,A_MOVE);
  465. A_LWC1,
  466. A_ADD_s, A_SUB_s, A_MUL_s, A_DIV_s,
  467. A_ABS_s, A_NEG_s, A_SQRT_s,
  468. A_CVT_s_w, A_CVT_s_l, A_CVT_s_d:
  469. TryRemoveMov(p,A_MOV_s);
  470. A_LDC1,
  471. A_ADD_d, A_SUB_d, A_MUL_d, A_DIV_d,
  472. A_ABS_d, A_NEG_d, A_SQRT_d,
  473. A_CVT_d_w, A_CVT_d_l, A_CVT_d_s:
  474. TryRemoveMov(p,A_MOV_d);
  475. end;
  476. end;
  477. end;
  478. end;
  479. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  480. var
  481. p: tai;
  482. l: longint;
  483. hp1,hp2,hp3: tai;
  484. condition: tasmcond;
  485. condreg: tregister;
  486. begin
  487. { Currently, everything below is mips4+ }
  488. if (current_settings.cputype<cpu_mips4) then
  489. exit;
  490. p:=BlockStart;
  491. ClearUsedRegs;
  492. while (p<>BlockEnd) Do
  493. begin
  494. UpdateUsedRegs(tai(p.next));
  495. case p.typ of
  496. ait_instruction:
  497. begin
  498. case taicpu(p).opcode of
  499. A_BC:
  500. begin
  501. condreg:=NR_NO;
  502. if (taicpu(p).condition in [C_COP1TRUE,C_COP1FALSE]) then
  503. { TODO: must be taken from "p" if/when codegen makes use of multiple %fcc }
  504. condreg:=NR_FCC0
  505. else if (taicpu(p).condition in [C_EQ,C_NE]) then
  506. begin
  507. if (taicpu(p).oper[0]^.reg=NR_R0) then
  508. condreg:=taicpu(p).oper[1]^.reg
  509. else if (taicpu(p).oper[1]^.reg=NR_R0) then
  510. condreg:=taicpu(p).oper[0]^.reg
  511. end;
  512. if (condreg<>NR_NO) then
  513. begin
  514. { check for
  515. bCC xxx
  516. <several movs>
  517. xxx:
  518. }
  519. l:=0;
  520. GetNextInstruction(p, hp1);
  521. while CanBeCMOV(hp1) do // CanBeCMOV returns False for nil or labels
  522. begin
  523. inc(l);
  524. GetNextInstruction(hp1,hp1);
  525. end;
  526. if assigned(hp1) then
  527. begin
  528. if FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  529. begin
  530. if (l<=4) and (l>0) then
  531. begin
  532. condition:=inverse_cond(taicpu(p).condition);
  533. hp2:=p;
  534. GetNextInstruction(p,hp1);
  535. p:=hp1;
  536. repeat
  537. ChangeToCMOV(taicpu(hp1),condition,condreg);
  538. GetNextInstruction(hp1,hp1);
  539. until not CanBeCMOV(hp1);
  540. { wait with removing else GetNextInstruction could
  541. ignore the label if it was the only usage in the
  542. jump moved away }
  543. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  544. RemoveDelaySlot(hp2);
  545. asml.remove(hp2);
  546. hp2.free;
  547. continue;
  548. end;
  549. end
  550. else
  551. begin
  552. { check further for
  553. bCC xxx
  554. <several movs 1>
  555. b yyy
  556. xxx:
  557. <several movs 2>
  558. yyy:
  559. }
  560. { hp2 points to jmp yyy }
  561. hp2:=hp1;
  562. { skip hp1 to xxx }
  563. GetNextInstruction(hp1, hp1);
  564. if assigned(hp2) and
  565. assigned(hp1) and
  566. (l<=3) and
  567. (hp2.typ=ait_instruction) and
  568. (taicpu(hp2).opcode=A_BA) and
  569. { real label and jump, no further references to the
  570. label are allowed }
  571. (tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol).getrefs<=2) and
  572. FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  573. begin
  574. l:=0;
  575. { skip hp1 to <several moves 2> }
  576. GetNextInstruction(hp1, hp1);
  577. while CanBeCMOV(hp1) do
  578. begin
  579. inc(l);
  580. GetNextInstruction(hp1, hp1);
  581. end;
  582. { hp1 points to yyy: }
  583. if assigned(hp1) and
  584. FindLabel(tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol),hp1) then
  585. begin
  586. condition:=inverse_cond(taicpu(p).condition);
  587. GetNextInstruction(p,hp1);
  588. hp3:=p;
  589. p:=hp1;
  590. repeat
  591. ChangeToCMOV(taicpu(hp1),condition,condreg);
  592. GetNextInstruction(hp1,hp1);
  593. until not CanBeCMOV(hp1);
  594. { hp2 is still at b yyy }
  595. GetNextInstruction(hp2,hp1);
  596. { hp2 is now at xxx: }
  597. condition:=inverse_cond(condition);
  598. GetNextInstruction(hp1,hp1);
  599. { hp1 is now at <several movs 2> }
  600. repeat
  601. ChangeToCMOV(taicpu(hp1),condition,condreg);
  602. GetNextInstruction(hp1,hp1);
  603. until not CanBeCMOV(hp1);
  604. { remove bCC }
  605. tasmlabel(taicpu(hp3).oper[taicpu(hp3).ops-1]^.ref^.symbol).decrefs;
  606. RemoveDelaySlot(hp3);
  607. asml.remove(hp3);
  608. hp3.free;
  609. { remove jmp }
  610. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  611. RemoveDelaySlot(hp2);
  612. asml.remove(hp2);
  613. hp2.free;
  614. continue;
  615. end;
  616. end;
  617. end;
  618. end;
  619. end;
  620. end;
  621. end;
  622. end;
  623. end;
  624. UpdateUsedRegs(p);
  625. p:=tai(p.next);
  626. end;
  627. end;
  628. begin
  629. casmoptimizer:=TCpuAsmOptimizer;
  630. end.