Tomas Hajny 09e0734b7c * fix working with short record function results under OS/2 vor 11 Jahren
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aopt386.pas ba5297be37 * support disabling the i386 peephole optimizer with -Oonopeephole vor 11 Jahren
cgcpu.pas 31edfdc05f * i386: push references with size OS_F64 using less instructions. vor 11 Jahren
cpubase.inc bfbb0c5b9d * optimize mov/lea vor 12 Jahren
cpuelf.pas 74581a07af AROS: assembler fixes vor 11 Jahren
cpuinfo.pas d88d644925 + support for FMA intrinsic: if there is no hardware support, the compiler throws an error. vor 11 Jahren
cpunode.pas 4a79481c51 * isolated segment-related functionality of tabsolutevarsym into i386/i8086- vor 11 Jahren
cpupara.pas 09e0734b7c * fix working with short record function results under OS/2 vor 11 Jahren
cpupi.pas b1dc518ac4 * removed systems_need_16_byte_stack_alignment and use target_info.stackalign instead vor 13 Jahren
cputarg.pas 4431ba2c08 merged/updated AROS/i386 target to trunk from AROS branch, to support Marcus Sackrow's work on AROS support which will hopefully benefit all Amiga-like targets (classic, MorphOS) on the long run. Compiler only, RTL comes in the next run. vor 11 Jahren
csopt386.pas 4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables vor 11 Jahren
daopt386.pas 4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables vor 11 Jahren
hlcgcpu.pas 26b53607f8 + added method reference_reset_base with support for different pointer types to vor 11 Jahren
i386att.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. vor 11 Jahren
i386atts.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. vor 11 Jahren
i386int.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. vor 11 Jahren
i386nop.inc 842e027a9f + prove of concept how FMA4 could be supported in inline assembler vor 11 Jahren
i386op.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. vor 11 Jahren
i386prop.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. vor 11 Jahren
i386tab.inc 842e027a9f + prove of concept how FMA4 could be supported in inline assembler vor 11 Jahren
n386add.pas 07ad2a04ac * fix warnings when compiling the compiler with DFA optimizer enabled on i386 vor 11 Jahren
n386cal.pas 4ee15b84da AROS: syscall (library call) support for based on the Amiga/68k and MorphOS/PPC versions vor 11 Jahren
n386flw.pas 5479b6e722 * Provide initialization of all variables, fixes cycling with OPT="-dTEST_WIN32_SEH -OoDFA". vor 11 Jahren
n386inl.pas 66e82f1655 + i386: generate optimized code for 64-bit arithmetic shifts by constant amount. Shifts by 63 and by less than 32 take just two instructions, shifts by 32..62 bits are done with 3 instructions. vor 12 Jahren
n386ld.pas 4a79481c51 * isolated segment-related functionality of tabsolutevarsym into i386/i8086- vor 11 Jahren
n386mat.pas 5356f17fa5 * i386: switch the div/mod node to shared code, leaving in place the specific optimization for division by power of 2. vor 11 Jahren
n386mem.pas 338c064beb * moved x86-specific tpointerdef functionality to architecture-specific vor 11 Jahren
n386set.pas d0db391d7c * cleanup of unused units vor 12 Jahren
popt386.pas 2ee0c8de45 * i386: For integer comparisons with zero, emit "test $-1,%reg" instead of "test %reg,%reg". It is more spilling-friendly, because it transforms into "test $-1,spilltemp" and does not require a register. vor 11 Jahren
r386ari.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386att.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386con.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386dwrf.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386int.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386iri.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386nasm.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386nor.inc 283ff05127 * merged avx support in inline assembler developed by Torsten Grundke vor 13 Jahren
r386nri.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386num.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386ot.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386rni.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386sri.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
r386stab.inc 283ff05127 * merged avx support in inline assembler developed by Torsten Grundke vor 13 Jahren
r386std.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. vor 12 Jahren
ra386att.pas 757ed4e8d3 * standard assembler reader for i386 vor 20 Jahren
ra386int.pas 6c6bf452ca * Fixed level 2 comment warnings. vor 17 Jahren
rgcpu.pas b7fe6797bf Merged revisions 2921-2922,2925 via svnmerge from vor 19 Jahren
rropt386.pas 4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables vor 11 Jahren
symcpu.pas aa6b62cf4c Add new procedure option: po_syscall_has_libsym, vor 11 Jahren