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nx86inl.pas 12 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate x86 inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86inl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl,ncginl;
  22. type
  23. tx86inlinenode = class(tcginlinenode)
  24. { first pass override
  25. so that the code generator will actually generate
  26. these nodes.
  27. }
  28. function first_pi: tnode ; override;
  29. function first_arctan_real: tnode; override;
  30. function first_abs_real: tnode; override;
  31. function first_sqr_real: tnode; override;
  32. function first_sqrt_real: tnode; override;
  33. function first_ln_real: tnode; override;
  34. function first_cos_real: tnode; override;
  35. function first_sin_real: tnode; override;
  36. { second pass override to generate these nodes }
  37. procedure second_IncludeExclude;override;
  38. procedure second_pi; override;
  39. procedure second_arctan_real; override;
  40. procedure second_abs_real; override;
  41. procedure second_sqr_real; override;
  42. procedure second_sqrt_real; override;
  43. procedure second_ln_real; override;
  44. procedure second_cos_real; override;
  45. procedure second_sin_real; override;
  46. procedure second_prefetch;override;
  47. private
  48. procedure load_fpu_location;
  49. end;
  50. implementation
  51. uses
  52. systems,
  53. globals,
  54. cutils,verbose,
  55. defutil,
  56. aasmtai,aasmcpu,
  57. cgbase,pass_2,
  58. cpuinfo,cpubase,paramgr,
  59. nbas,ncon,ncal,ncnv,nld,
  60. cga,cgutils,cgx86,cgobj;
  61. {*****************************************************************************
  62. TX86INLINENODE
  63. *****************************************************************************}
  64. function tx86inlinenode.first_pi : tnode;
  65. begin
  66. expectloc:=LOC_FPUREGISTER;
  67. registersfpu:=1;
  68. first_pi := nil;
  69. end;
  70. function tx86inlinenode.first_arctan_real : tnode;
  71. begin
  72. expectloc:=LOC_FPUREGISTER;
  73. registersint:=left.registersint;
  74. registersfpu:=max(left.registersfpu,2);
  75. {$ifdef SUPPORT_MMX}
  76. registersmmx:=left.registersmmx;
  77. {$endif SUPPORT_MMX}
  78. first_arctan_real := nil;
  79. end;
  80. function tx86inlinenode.first_abs_real : tnode;
  81. begin
  82. expectloc:=LOC_FPUREGISTER;
  83. registersint:=left.registersint;
  84. registersfpu:=max(left.registersfpu,1);
  85. {$ifdef SUPPORT_MMX}
  86. registersmmx:=left.registersmmx;
  87. {$endif SUPPORT_MMX}
  88. first_abs_real := nil;
  89. end;
  90. function tx86inlinenode.first_sqr_real : tnode;
  91. begin
  92. expectloc:=LOC_FPUREGISTER;
  93. registersint:=left.registersint;
  94. registersfpu:=max(left.registersfpu,1);
  95. {$ifdef SUPPORT_MMX}
  96. registersmmx:=left.registersmmx;
  97. {$endif SUPPORT_MMX}
  98. first_sqr_real := nil;
  99. end;
  100. function tx86inlinenode.first_sqrt_real : tnode;
  101. begin
  102. expectloc:=LOC_FPUREGISTER;
  103. registersint:=left.registersint;
  104. registersfpu:=max(left.registersfpu,1);
  105. {$ifdef SUPPORT_MMX}
  106. registersmmx:=left.registersmmx;
  107. {$endif SUPPORT_MMX}
  108. first_sqrt_real := nil;
  109. end;
  110. function tx86inlinenode.first_ln_real : tnode;
  111. begin
  112. expectloc:=LOC_FPUREGISTER;
  113. registersint:=left.registersint;
  114. registersfpu:=max(left.registersfpu,2);
  115. {$ifdef SUPPORT_MMX}
  116. registersmmx:=left.registersmmx;
  117. {$endif SUPPORT_MMX}
  118. first_ln_real := nil;
  119. end;
  120. function tx86inlinenode.first_cos_real : tnode;
  121. begin
  122. expectloc:=LOC_FPUREGISTER;
  123. registersint:=left.registersint;
  124. registersfpu:=max(left.registersfpu,1);
  125. {$ifdef SUPPORT_MMX}
  126. registersmmx:=left.registersmmx;
  127. {$endif SUPPORT_MMX}
  128. first_cos_real := nil;
  129. end;
  130. function tx86inlinenode.first_sin_real : tnode;
  131. begin
  132. expectloc:=LOC_FPUREGISTER;
  133. registersint:=left.registersint;
  134. registersfpu:=max(left.registersfpu,1);
  135. {$ifdef SUPPORT_MMX}
  136. registersmmx:=left.registersmmx;
  137. {$endif SUPPORT_MMX}
  138. first_sin_real := nil;
  139. end;
  140. procedure tx86inlinenode.second_Pi;
  141. begin
  142. location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
  143. emit_none(A_FLDPI,S_NO);
  144. tcgx86(cg).inc_fpu_stack;
  145. location.register:=NR_FPU_RESULT_REG;
  146. end;
  147. { load the FPU into the an fpu register }
  148. procedure tx86inlinenode.load_fpu_location;
  149. begin
  150. location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
  151. location.register:=NR_FPU_RESULT_REG;
  152. secondpass(left);
  153. case left.location.loc of
  154. LOC_FPUREGISTER:
  155. ;
  156. LOC_CFPUREGISTER:
  157. begin
  158. cg.a_loadfpu_reg_reg(exprasmlist,left.location.size,
  159. left.location.register,location.register);
  160. end;
  161. LOC_REFERENCE,LOC_CREFERENCE:
  162. begin
  163. cg.a_loadfpu_ref_reg(exprasmlist,
  164. def_cgsize(left.resulttype.def),
  165. left.location.reference,location.register);
  166. end
  167. else
  168. internalerror(309991);
  169. end;
  170. end;
  171. procedure tx86inlinenode.second_arctan_real;
  172. begin
  173. load_fpu_location;
  174. emit_none(A_FLD1,S_NO);
  175. emit_none(A_FPATAN,S_NO);
  176. end;
  177. procedure tx86inlinenode.second_abs_real;
  178. begin
  179. load_fpu_location;
  180. emit_none(A_FABS,S_NO);
  181. end;
  182. procedure tx86inlinenode.second_sqr_real;
  183. begin
  184. if use_sse(resulttype.def) then
  185. begin
  186. secondpass(left);
  187. location_force_mmregscalar(exprasmlist,left.location,false);
  188. location:=left.location;
  189. cg.a_opmm_loc_reg(exprasmlist,OP_MUL,left.location.size,left.location,left.location.register,mms_movescalar);
  190. end
  191. else
  192. begin
  193. load_fpu_location;
  194. emit_reg_reg(A_FMUL,S_NO,NR_ST0,NR_ST0);
  195. end;
  196. end;
  197. procedure tx86inlinenode.second_sqrt_real;
  198. begin
  199. if use_sse(resulttype.def) then
  200. begin
  201. secondpass(left);
  202. location_force_mmregscalar(exprasmlist,left.location,false);
  203. location:=left.location;
  204. case tfloatdef(resulttype.def).typ of
  205. s32real:
  206. exprasmlist.concat(taicpu.op_reg_reg(A_SQRTSS,S_XMM,location.register,location.register));
  207. s64real:
  208. exprasmlist.concat(taicpu.op_reg_reg(A_SQRTSD,S_XMM,location.register,location.register));
  209. else
  210. internalerror(200510031);
  211. end;
  212. end
  213. else
  214. begin
  215. load_fpu_location;
  216. emit_none(A_FSQRT,S_NO);
  217. end;
  218. end;
  219. procedure tx86inlinenode.second_ln_real;
  220. begin
  221. load_fpu_location;
  222. emit_none(A_FLDLN2,S_NO);
  223. emit_none(A_FXCH,S_NO);
  224. emit_none(A_FYL2X,S_NO);
  225. end;
  226. procedure tx86inlinenode.second_cos_real;
  227. begin
  228. load_fpu_location;
  229. emit_none(A_FCOS,S_NO);
  230. end;
  231. procedure tx86inlinenode.second_sin_real;
  232. begin
  233. load_fpu_location;
  234. emit_none(A_FSIN,S_NO)
  235. end;
  236. procedure tx86inlinenode.second_prefetch;
  237. var
  238. ref : treference;
  239. r : tregister;
  240. begin
  241. {$ifdef i386}
  242. if aktspecificoptprocessor>=ClassPentium3 then
  243. {$endif i386}
  244. begin
  245. secondpass(left);
  246. case left.location.loc of
  247. LOC_CREFERENCE,
  248. LOC_REFERENCE:
  249. begin
  250. r:=cg.getintregister(exprasmlist,OS_ADDR);
  251. cg.a_loadaddr_ref_reg(exprasmlist,left.location.reference,r);
  252. reference_reset_base(ref,r,0);
  253. exprasmlist.concat(taicpu.op_ref(A_PREFETCHNTA,S_NO,ref));
  254. end;
  255. else
  256. internalerror(200402021);
  257. end;
  258. end;
  259. end;
  260. {*****************************************************************************
  261. INCLUDE/EXCLUDE GENERIC HANDLING
  262. *****************************************************************************}
  263. procedure tx86inlinenode.second_IncludeExclude;
  264. var
  265. hregister : tregister;
  266. asmop : tasmop;
  267. bitsperop,l : longint;
  268. cgop : topcg;
  269. opsize : tcgsize;
  270. begin
  271. opsize:=OS_32;
  272. bitsperop:=(8*tcgsize2size[opsize]);
  273. secondpass(tcallparanode(left).left);
  274. if tcallparanode(tcallparanode(left).right).left.nodetype=ordconstn then
  275. begin
  276. { calculate bit position }
  277. l:=1 shl (tordconstnode(tcallparanode(tcallparanode(left).right).left).value mod bitsperop);
  278. { determine operator }
  279. if inlinenumber=in_include_x_y then
  280. cgop:=OP_OR
  281. else
  282. begin
  283. cgop:=OP_AND;
  284. l:=not(l);
  285. end;
  286. case tcallparanode(left).left.location.loc of
  287. LOC_REFERENCE :
  288. begin
  289. inc(tcallparanode(left).left.location.reference.offset,
  290. (tordconstnode(tcallparanode(tcallparanode(left).right).left).value div bitsperop)*tcgsize2size[opsize]);
  291. cg.a_op_const_ref(exprasmlist,cgop,opsize,l,tcallparanode(left).left.location.reference);
  292. end;
  293. LOC_CREGISTER :
  294. cg.a_op_const_reg(exprasmlist,cgop,tcallparanode(left).left.location.size,l,tcallparanode(left).left.location.register);
  295. else
  296. internalerror(200405022);
  297. end;
  298. end
  299. else
  300. begin
  301. { generate code for the element to set }
  302. secondpass(tcallparanode(tcallparanode(left).right).left);
  303. { determine asm operator }
  304. if inlinenumber=in_include_x_y then
  305. asmop:=A_BTS
  306. else
  307. asmop:=A_BTR;
  308. if tcallparanode(tcallparanode(left).right).left.location.loc in [LOC_CREGISTER,LOC_REGISTER] then
  309. { we don't need a mod 32 because this is done automatically }
  310. { by the bts instruction. For proper checking we would }
  311. { note: bts doesn't do any mod'ing, that's why we can also use }
  312. { it for normalsets! (JM) }
  313. { need a cmp and jmp, but this should be done by the }
  314. { type cast code which does range checking if necessary (FK) }
  315. hregister:=cg.makeregsize(exprasmlist,Tcallparanode(Tcallparanode(left).right).left.location.register,opsize)
  316. else
  317. hregister:=cg.getintregister(exprasmlist,opsize);
  318. cg.a_load_loc_reg(exprasmlist,opsize,tcallparanode(tcallparanode(left).right).left.location,hregister);
  319. if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
  320. emit_reg_ref(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.reference)
  321. else
  322. emit_reg_reg(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.register);
  323. end;
  324. end;
  325. end.