cgobj.pas 170 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. { how many times is this current code executed }
  48. executionweight : longint;
  49. alignment : talignment;
  50. rg : array[tregistertype] of trgobj;
  51. {$ifdef flowgraph}
  52. aktflownode:word;
  53. {$endif}
  54. {************************************************}
  55. { basic routines }
  56. constructor create;
  57. {# Initialize the register allocators needed for the codegenerator.}
  58. procedure init_register_allocators;virtual;
  59. {# Clean up the register allocators needed for the codegenerator.}
  60. procedure done_register_allocators;virtual;
  61. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  62. procedure set_regalloc_live_range_direction(dir: TRADirection);
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:TAsmList):Tregister;virtual;
  71. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  77. procedure add_move_instruction(instr:Taicpu);virtual;
  78. function uses_registers(rt:Tregistertype):boolean;virtual;
  79. {# Get a specific register.}
  80. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  81. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  82. {# Get multiple registers specified.}
  83. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. {# Free multiple registers specified.}
  85. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  86. procedure allocallcpuregisters(list:TAsmList);virtual;
  87. procedure deallocallcpuregisters(list:TAsmList);virtual;
  88. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  89. procedure translate_register(var reg : tregister);
  90. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : TAsmList;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  97. { Synchronize register, make sure it is still valid }
  98. procedure a_reg_sync(list : TAsmList;r : tregister);
  99. {# Pass a parameter, which is located in a register, to a routine.
  100. This routine should push/send the parameter to the routine, as
  101. required by the specific processor ABI and routine modifiers.
  102. This must be overriden for each CPU target.
  103. @param(size size of the operand in the register)
  104. @param(r register source of the operand)
  105. @param(cgpara where the parameter will be stored)
  106. }
  107. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  108. {# Pass a parameter, which is a constant, to a routine.
  109. A generic version is provided. This routine should
  110. be overriden for optimization purposes if the cpu
  111. permits directly sending this type of parameter.
  112. @param(size size of the operand in constant)
  113. @param(a value of constant to send)
  114. @param(cgpara where the parameter will be stored)
  115. }
  116. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  117. {# Pass the value of a parameter, which is located in memory, to a routine.
  118. A generic version is provided. This routine should
  119. be overriden for optimization purposes if the cpu
  120. permits directly sending this type of parameter.
  121. @param(size size of the operand in constant)
  122. @param(r Memory reference of value to send)
  123. @param(cgpara where the parameter will be stored)
  124. }
  125. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  126. {# Pass the value of a parameter, which can be located either in a register or memory location,
  127. to a routine.
  128. A generic version is provided.
  129. @param(l location of the operand to send)
  130. @param(nr parameter number (starting from one) of routine (from left to right))
  131. @param(cgpara where the parameter will be stored)
  132. }
  133. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  134. {# Pass the address of a reference to a routine. This routine
  135. will calculate the address of the reference, and pass this
  136. calculated address as a parameter.
  137. A generic version is provided. This routine should
  138. be overriden for optimization purposes if the cpu
  139. permits directly sending this type of parameter.
  140. @param(r reference to get address from)
  141. @param(nr parameter number (starting from one) of routine (from left to right))
  142. }
  143. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  144. { Remarks:
  145. * If a method specifies a size you have only to take care
  146. of that number of bits, i.e. load_const_reg with OP_8 must
  147. only load the lower 8 bit of the specified register
  148. the rest of the register can be undefined
  149. if necessary the compiler will call a method
  150. to zero or sign extend the register
  151. * The a_load_XX_XX with OP_64 needn't to be
  152. implemented for 32 bit
  153. processors, the code generator takes care of that
  154. * the addr size is for work with the natural pointer
  155. size
  156. * the procedures without fpu/mm are only for integer usage
  157. * normally the first location is the source and the
  158. second the destination
  159. }
  160. {# Emits instruction to call the method specified by symbol name.
  161. This routine must be overriden for each new target cpu.
  162. There is no a_call_ref because loading the reference will use
  163. a temp register on most cpu's resulting in conflicts with the
  164. registers used for the parameters (PFV)
  165. }
  166. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  167. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  168. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  169. { same as a_call_name, might be overriden on certain architectures to emit
  170. static calls without usage of a got trampoline }
  171. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  172. { move instructions }
  173. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  174. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  175. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  176. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  177. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  178. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  179. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  180. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  181. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  182. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  183. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  184. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  185. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  186. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  187. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  188. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  189. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  190. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  191. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  192. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  193. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  194. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  195. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  196. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  197. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  198. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  199. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  200. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  201. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  202. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  203. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  204. { bit test instructions }
  205. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  206. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister); virtual;
  207. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister); virtual;
  208. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); virtual;
  209. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  210. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  211. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  212. { bit set/clear instructions }
  213. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  214. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference); virtual;
  215. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister); virtual;
  216. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister); virtual;
  217. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  218. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  219. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  220. { fpu move instructions }
  221. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  222. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  223. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  224. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  225. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  226. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  227. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  228. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  229. { vector register move instructions }
  230. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  231. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  232. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  233. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  234. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  235. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  236. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  237. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  238. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  239. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  240. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  241. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  242. { basic arithmetic operations }
  243. { note: for operators which require only one argument (not, neg), use }
  244. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  245. { that in this case the *second* operand is used as both source and }
  246. { destination (JM) }
  247. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  248. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  249. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  250. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  251. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  252. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  253. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  254. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  255. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  256. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  257. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  258. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  259. { trinary operations for processors that support them, 'emulated' }
  260. { on others. None with "ref" arguments since I don't think there }
  261. { are any processors that support it (JM) }
  262. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  263. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  264. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  265. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  266. { comparison operations }
  267. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  268. l : tasmlabel);virtual; abstract;
  269. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  270. l : tasmlabel); virtual;
  271. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  272. l : tasmlabel);
  273. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  274. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  275. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  276. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  277. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  278. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  279. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  280. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  281. l : tasmlabel);
  282. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  283. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  284. {$ifdef cpuflags}
  285. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  286. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  287. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  288. }
  289. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  290. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  291. {$endif cpuflags}
  292. {
  293. This routine tries to optimize the op_const_reg/ref opcode, and should be
  294. called at the start of a_op_const_reg/ref. It returns the actual opcode
  295. to emit, and the constant value to emit. This function can opcode OP_NONE to
  296. remove the opcode and OP_MOVE to replace it with a simple load
  297. @param(op The opcode to emit, returns the opcode which must be emitted)
  298. @param(a The constant which should be emitted, returns the constant which must
  299. be emitted)
  300. }
  301. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  302. {#
  303. This routine is used in exception management nodes. It should
  304. save the exception reason currently in the FUNCTION_RETURN_REG. The
  305. save should be done either to a temp (pointed to by href).
  306. or on the stack (pushing the value on the stack).
  307. The size of the value to save is OS_S32. The default version
  308. saves the exception reason to a temp. memory area.
  309. }
  310. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  311. {#
  312. This routine is used in exception management nodes. It should
  313. save the exception reason constant. The
  314. save should be done either to a temp (pointed to by href).
  315. or on the stack (pushing the value on the stack).
  316. The size of the value to save is OS_S32. The default version
  317. saves the exception reason to a temp. memory area.
  318. }
  319. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  320. {#
  321. This routine is used in exception management nodes. It should
  322. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  323. should either be in the temp. area (pointed to by href , href should
  324. *NOT* be freed) or on the stack (the value should be popped).
  325. The size of the value to save is OS_S32. The default version
  326. saves the exception reason to a temp. memory area.
  327. }
  328. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  329. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  330. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  331. {# This should emit the opcode to copy len bytes from the source
  332. to destination.
  333. It must be overriden for each new target processor.
  334. @param(source Source reference of copy)
  335. @param(dest Destination reference of copy)
  336. }
  337. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  338. {# This should emit the opcode to copy len bytes from the an unaligned source
  339. to destination.
  340. It must be overriden for each new target processor.
  341. @param(source Source reference of copy)
  342. @param(dest Destination reference of copy)
  343. }
  344. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  345. {# This should emit the opcode to a shortrstring from the source
  346. to destination.
  347. @param(source Source reference of copy)
  348. @param(dest Destination reference of copy)
  349. }
  350. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  351. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  352. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  353. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  354. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  355. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  356. {# Generates range checking code. It is to note
  357. that this routine does not need to be overriden,
  358. as it takes care of everything.
  359. @param(p Node which contains the value to check)
  360. @param(todef Type definition of node to range check)
  361. }
  362. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  363. {# Generates overflow checking code for a node }
  364. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  365. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  366. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  367. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  368. {# Emits instructions when compilation is done in profile
  369. mode (this is set as a command line option). The default
  370. behavior does nothing, should be overriden as required.
  371. }
  372. procedure g_profilecode(list : TAsmList);virtual;
  373. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  374. @param(size Number of bytes to allocate)
  375. }
  376. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  377. {# Emits instruction for allocating the locals in entry
  378. code of a routine. This is one of the first
  379. routine called in @var(genentrycode).
  380. @param(localsize Number of bytes to allocate as locals)
  381. }
  382. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  383. {# Emits instructions for returning from a subroutine.
  384. Should also restore the framepointer and stack.
  385. @param(parasize Number of bytes of parameters to deallocate from stack)
  386. }
  387. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  388. {# This routine is called when generating the code for the entry point
  389. of a routine. It should save all registers which are not used in this
  390. routine, and which should be declared as saved in the std_saved_registers
  391. set.
  392. This routine is mainly used when linking to code which is generated
  393. by ABI-compliant compilers (like GCC), to make sure that the reserved
  394. registers of that ABI are not clobbered.
  395. @param(usedinproc Registers which are used in the code of this routine)
  396. }
  397. procedure g_save_registers(list:TAsmList);virtual;
  398. {# This routine is called when generating the code for the exit point
  399. of a routine. It should restore all registers which were previously
  400. saved in @var(g_save_standard_registers).
  401. @param(usedinproc Registers which are used in the code of this routine)
  402. }
  403. procedure g_restore_registers(list:TAsmList);virtual;
  404. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  405. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  406. function g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;virtual;
  407. { generate a stub which only purpose is to pass control the given external method,
  408. setting up any additional environment before doing so (if required).
  409. The default implementation issues a jump instruction to the external name. }
  410. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  411. { initialize the pic/got register }
  412. procedure g_maybe_got_init(list: TAsmList); virtual;
  413. protected
  414. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  415. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  416. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister); virtual;
  417. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  418. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  419. function get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  420. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  421. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  422. end;
  423. {$ifndef cpu64bitalu}
  424. {# @abstract(Abstract code generator for 64 Bit operations)
  425. This class implements an abstract code generator class
  426. for 64 Bit operations.
  427. }
  428. tcg64 = class
  429. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  430. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  431. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  432. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  433. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  434. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  435. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  436. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  437. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  438. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  439. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  440. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  441. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  442. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  443. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  444. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  445. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  446. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  447. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  448. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  449. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  450. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  451. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  452. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  453. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  454. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  455. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  456. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  457. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  458. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  459. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  460. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  461. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  462. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  463. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  464. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  465. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  466. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  467. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  468. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  469. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  470. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  471. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  472. {
  473. This routine tries to optimize the const_reg opcode, and should be
  474. called at the start of a_op64_const_reg. It returns the actual opcode
  475. to emit, and the constant value to emit. If this routine returns
  476. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  477. @param(op The opcode to emit, returns the opcode which must be emitted)
  478. @param(a The constant which should be emitted, returns the constant which must
  479. be emitted)
  480. @param(reg The register to emit the opcode with, returns the register with
  481. which the opcode will be emitted)
  482. }
  483. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  484. { override to catch 64bit rangechecks }
  485. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  486. end;
  487. {$endif cpu64bitalu}
  488. var
  489. {# Main code generator class }
  490. cg : tcg;
  491. {$ifndef cpu64bitalu}
  492. {# Code generator class for all operations working with 64-Bit operands }
  493. cg64 : tcg64;
  494. {$endif cpu64bitalu}
  495. procedure destroy_codegen;
  496. implementation
  497. uses
  498. globals,options,systems,
  499. verbose,defutil,paramgr,symsym,
  500. tgobj,cutils,procinfo,
  501. ncgrtti;
  502. {*****************************************************************************
  503. basic functionallity
  504. ******************************************************************************}
  505. constructor tcg.create;
  506. begin
  507. end;
  508. {*****************************************************************************
  509. register allocation
  510. ******************************************************************************}
  511. procedure tcg.init_register_allocators;
  512. begin
  513. fillchar(rg,sizeof(rg),0);
  514. add_reg_instruction_hook:=@add_reg_instruction;
  515. executionweight:=1;
  516. end;
  517. procedure tcg.done_register_allocators;
  518. begin
  519. { Safety }
  520. fillchar(rg,sizeof(rg),0);
  521. add_reg_instruction_hook:=nil;
  522. end;
  523. {$ifdef flowgraph}
  524. procedure Tcg.init_flowgraph;
  525. begin
  526. aktflownode:=0;
  527. end;
  528. procedure Tcg.done_flowgraph;
  529. begin
  530. end;
  531. {$endif}
  532. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  533. begin
  534. if not assigned(rg[R_INTREGISTER]) then
  535. internalerror(200312122);
  536. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  537. end;
  538. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  539. begin
  540. if not assigned(rg[R_FPUREGISTER]) then
  541. internalerror(200312123);
  542. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  543. end;
  544. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  545. begin
  546. if not assigned(rg[R_MMREGISTER]) then
  547. internalerror(2003121214);
  548. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  549. end;
  550. function tcg.getaddressregister(list:TAsmList):Tregister;
  551. begin
  552. if assigned(rg[R_ADDRESSREGISTER]) then
  553. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  554. else
  555. begin
  556. if not assigned(rg[R_INTREGISTER]) then
  557. internalerror(200312121);
  558. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  559. end;
  560. end;
  561. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  562. var
  563. subreg:Tsubregister;
  564. begin
  565. subreg:=cgsize2subreg(getregtype(reg),size);
  566. result:=reg;
  567. setsubreg(result,subreg);
  568. { notify RA }
  569. if result<>reg then
  570. list.concat(tai_regalloc.resize(result));
  571. end;
  572. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  573. begin
  574. if not assigned(rg[getregtype(r)]) then
  575. internalerror(200312125);
  576. rg[getregtype(r)].getcpuregister(list,r);
  577. end;
  578. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  579. begin
  580. if not assigned(rg[getregtype(r)]) then
  581. internalerror(200312126);
  582. rg[getregtype(r)].ungetcpuregister(list,r);
  583. end;
  584. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  585. begin
  586. if assigned(rg[rt]) then
  587. rg[rt].alloccpuregisters(list,r)
  588. else
  589. internalerror(200310092);
  590. end;
  591. procedure tcg.allocallcpuregisters(list:TAsmList);
  592. begin
  593. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  594. {$ifndef i386}
  595. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  596. {$ifdef cpumm}
  597. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  598. {$endif cpumm}
  599. {$endif i386}
  600. end;
  601. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  602. begin
  603. if assigned(rg[rt]) then
  604. rg[rt].dealloccpuregisters(list,r)
  605. else
  606. internalerror(200310093);
  607. end;
  608. procedure tcg.deallocallcpuregisters(list:TAsmList);
  609. begin
  610. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  611. {$ifndef i386}
  612. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  613. {$ifdef cpumm}
  614. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  615. {$endif cpumm}
  616. {$endif i386}
  617. end;
  618. function tcg.uses_registers(rt:Tregistertype):boolean;
  619. begin
  620. if assigned(rg[rt]) then
  621. result:=rg[rt].uses_registers
  622. else
  623. result:=false;
  624. end;
  625. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  626. var
  627. rt : tregistertype;
  628. begin
  629. rt:=getregtype(r);
  630. { Only add it when a register allocator is configured.
  631. No IE can be generated, because the VMT is written
  632. without a valid rg[] }
  633. if assigned(rg[rt]) then
  634. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  635. end;
  636. procedure tcg.add_move_instruction(instr:Taicpu);
  637. var
  638. rt : tregistertype;
  639. begin
  640. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  641. if assigned(rg[rt]) then
  642. rg[rt].add_move_instruction(instr)
  643. else
  644. internalerror(200310095);
  645. end;
  646. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  647. var
  648. rt : tregistertype;
  649. begin
  650. for rt:=low(rg) to high(rg) do
  651. begin
  652. if assigned(rg[rt]) then
  653. rg[rt].live_range_direction:=dir;
  654. end;
  655. end;
  656. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  657. var
  658. rt : tregistertype;
  659. begin
  660. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  661. begin
  662. if assigned(rg[rt]) then
  663. rg[rt].do_register_allocation(list,headertai);
  664. end;
  665. { running the other register allocator passes could require addition int/addr. registers
  666. when spilling so run int/addr register allocation at the end }
  667. if assigned(rg[R_INTREGISTER]) then
  668. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  669. if assigned(rg[R_ADDRESSREGISTER]) then
  670. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  671. end;
  672. procedure tcg.translate_register(var reg : tregister);
  673. begin
  674. rg[getregtype(reg)].translate_register(reg);
  675. end;
  676. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  677. begin
  678. list.concat(tai_regalloc.alloc(r,nil));
  679. end;
  680. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  681. begin
  682. list.concat(tai_regalloc.dealloc(r,nil));
  683. end;
  684. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  685. var
  686. instr : tai;
  687. begin
  688. instr:=tai_regalloc.sync(r);
  689. list.concat(instr);
  690. add_reg_instruction(instr,r);
  691. end;
  692. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  693. begin
  694. list.concat(tai_label.create(l));
  695. end;
  696. {*****************************************************************************
  697. for better code generation these methods should be overridden
  698. ******************************************************************************}
  699. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  700. var
  701. ref : treference;
  702. begin
  703. cgpara.check_simple_location;
  704. case cgpara.location^.loc of
  705. LOC_REGISTER,LOC_CREGISTER:
  706. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  707. LOC_REFERENCE,LOC_CREFERENCE:
  708. begin
  709. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  710. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  711. end
  712. else
  713. internalerror(2002071004);
  714. end;
  715. end;
  716. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  717. var
  718. ref : treference;
  719. begin
  720. cgpara.check_simple_location;
  721. case cgpara.location^.loc of
  722. LOC_REGISTER,LOC_CREGISTER:
  723. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  724. LOC_REFERENCE,LOC_CREFERENCE:
  725. begin
  726. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  727. a_load_const_ref(list,cgpara.location^.size,a,ref);
  728. end
  729. else
  730. internalerror(2002071004);
  731. end;
  732. end;
  733. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  734. var
  735. ref : treference;
  736. begin
  737. cgpara.check_simple_location;
  738. case cgpara.location^.loc of
  739. LOC_REGISTER,LOC_CREGISTER:
  740. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  741. LOC_REFERENCE,LOC_CREFERENCE:
  742. begin
  743. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  744. if (size <> OS_NO) and
  745. (tcgsize2size[size] < sizeof(aint)) then
  746. begin
  747. if (cgpara.size = OS_NO) or
  748. assigned(cgpara.location^.next) then
  749. internalerror(2006052401);
  750. a_load_ref_ref(list,size,cgpara.size,r,ref);
  751. end
  752. else
  753. { use concatcopy, because the parameter can be larger than }
  754. { what the OS_* constants can handle }
  755. g_concatcopy(list,r,ref,cgpara.intsize);
  756. end
  757. else
  758. internalerror(2002071004);
  759. end;
  760. end;
  761. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  762. begin
  763. case l.loc of
  764. LOC_REGISTER,
  765. LOC_CREGISTER :
  766. a_param_reg(list,l.size,l.register,cgpara);
  767. LOC_CONSTANT :
  768. a_param_const(list,l.size,l.value,cgpara);
  769. LOC_CREFERENCE,
  770. LOC_REFERENCE :
  771. a_param_ref(list,l.size,l.reference,cgpara);
  772. else
  773. internalerror(2002032211);
  774. end;
  775. end;
  776. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  777. var
  778. hr : tregister;
  779. begin
  780. cgpara.check_simple_location;
  781. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  782. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  783. else
  784. begin
  785. hr:=getaddressregister(list);
  786. a_loadaddr_ref_reg(list,r,hr);
  787. a_param_reg(list,OS_ADDR,hr,cgpara);
  788. end;
  789. end;
  790. {****************************************************************************
  791. some generic implementations
  792. ****************************************************************************}
  793. {$ifopt r+}
  794. {$define rangeon}
  795. {$r-}
  796. {$endif}
  797. {$ifopt q+}
  798. {$define overflowon}
  799. {$q-}
  800. {$endif}
  801. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  802. var
  803. bitmask: aword;
  804. tmpreg: tregister;
  805. stopbit: byte;
  806. begin
  807. tmpreg:=getintregister(list,sreg.subsetregsize);
  808. if (subsetsize in [OS_S8..OS_S128]) then
  809. begin
  810. { sign extend in case the value has a bitsize mod 8 <> 0 }
  811. { both instructions will be optimized away if not }
  812. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  813. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  814. end
  815. else
  816. begin
  817. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  818. stopbit := sreg.startbit + sreg.bitlen;
  819. // on x86(64), 1 shl 32(64) = 1 instead of 0
  820. // use aword to prevent overflow with 1 shl 31
  821. if (stopbit - sreg.startbit <> AIntBits) then
  822. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  823. else
  824. bitmask := high(aword);
  825. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  826. end;
  827. tmpreg := makeregsize(list,tmpreg,subsetsize);
  828. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  829. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  830. end;
  831. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  832. begin
  833. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  834. end;
  835. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  836. var
  837. bitmask: aword;
  838. tmpreg: tregister;
  839. stopbit: byte;
  840. begin
  841. stopbit := sreg.startbit + sreg.bitlen;
  842. // on x86(64), 1 shl 32(64) = 1 instead of 0
  843. if (stopbit <> AIntBits) then
  844. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  845. else
  846. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  847. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  848. begin
  849. tmpreg:=getintregister(list,sreg.subsetregsize);
  850. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  851. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  852. if (slopt <> SL_REGNOSRCMASK) then
  853. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  854. end;
  855. if (slopt <> SL_SETMAX) then
  856. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  857. case slopt of
  858. SL_SETZERO : ;
  859. SL_SETMAX :
  860. if (sreg.bitlen <> AIntBits) then
  861. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  862. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  863. sreg.subsetreg)
  864. else
  865. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  866. else
  867. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  868. end;
  869. end;
  870. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  871. var
  872. tmpreg: tregister;
  873. bitmask: aword;
  874. stopbit: byte;
  875. begin
  876. if (fromsreg.bitlen >= tosreg.bitlen) then
  877. begin
  878. tmpreg := getintregister(list,tosreg.subsetregsize);
  879. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  880. if (fromsreg.startbit <= tosreg.startbit) then
  881. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  882. else
  883. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  884. stopbit := tosreg.startbit + tosreg.bitlen;
  885. // on x86(64), 1 shl 32(64) = 1 instead of 0
  886. if (stopbit <> AIntBits) then
  887. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  888. else
  889. bitmask := (aword(1) shl tosreg.startbit) - 1;
  890. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  891. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  892. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  893. end
  894. else
  895. begin
  896. tmpreg := getintregister(list,tosubsetsize);
  897. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  898. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  899. end;
  900. end;
  901. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  902. var
  903. tmpreg: tregister;
  904. begin
  905. tmpreg := getintregister(list,tosize);
  906. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  907. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  908. end;
  909. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  910. var
  911. tmpreg: tregister;
  912. begin
  913. tmpreg := getintregister(list,subsetsize);
  914. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  915. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  916. end;
  917. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  918. var
  919. bitmask: aword;
  920. stopbit: byte;
  921. begin
  922. stopbit := sreg.startbit + sreg.bitlen;
  923. // on x86(64), 1 shl 32(64) = 1 instead of 0
  924. if (stopbit <> AIntBits) then
  925. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  926. else
  927. bitmask := (aword(1) shl sreg.startbit) - 1;
  928. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  929. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  930. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  931. end;
  932. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  933. begin
  934. case loc.loc of
  935. LOC_REFERENCE,LOC_CREFERENCE:
  936. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  937. LOC_REGISTER,LOC_CREGISTER:
  938. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  939. LOC_CONSTANT:
  940. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  941. LOC_SUBSETREG,LOC_CSUBSETREG:
  942. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  943. LOC_SUBSETREF,LOC_CSUBSETREF:
  944. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  945. else
  946. internalerror(200608053);
  947. end;
  948. end;
  949. (*
  950. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  951. in memory. They are like a regular reference, but contain an extra bit
  952. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  953. and a bit length (always constant).
  954. Bit packed values are stored differently in memory depending on whether we
  955. are on a big or a little endian system (compatible with at least GPC). The
  956. size of the basic working unit is always the smallest power-of-2 byte size
  957. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  958. bytes, 17..32 bits -> 4 bytes etc).
  959. On a big endian, 5-bit: values are stored like this:
  960. 11111222 22333334 44445555 56666677 77788888
  961. The leftmost bit of each 5-bit value corresponds to the most significant
  962. bit.
  963. On little endian, it goes like this:
  964. 22211111 43333322 55554444 77666665 88888777
  965. In this case, per byte the left-most bit is more significant than those on
  966. the right, but the bits in the next byte are all more significant than
  967. those in the previous byte (e.g., the 222 in the first byte are the low
  968. three bits of that value, while the 22 in the second byte are the upper
  969. two bits.
  970. Big endian, 9 bit values:
  971. 11111111 12222222 22333333 33344444 ...
  972. Little endian, 9 bit values:
  973. 11111111 22222221 33333322 44444333 ...
  974. This is memory representation and the 16 bit values are byteswapped.
  975. Similarly as in the previous case, the 2222222 string contains the lower
  976. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  977. registers (two 16 bit registers in the current implementation, although a
  978. single 32 bit register would be possible too, in particular if 32 bit
  979. alignment can be guaranteed), this becomes:
  980. 22222221 11111111 44444333 33333322 ...
  981. (l)ow u l l u l u
  982. The startbit/bitindex in a subsetreference always refers to
  983. a) on big endian: the most significant bit of the value
  984. (bits counted from left to right, both memory an registers)
  985. b) on little endian: the least significant bit when the value
  986. is loaded in a register (bit counted from right to left)
  987. Although a) results in more complex code for big endian systems, it's
  988. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  989. Apple's universal interfaces which depend on these layout differences).
  990. Note: when changing the loadsize calculated in get_subsetref_load_info,
  991. make sure the appropriate alignment is guaranteed, at least in case of
  992. {$defined cpurequiresproperalignment}.
  993. *)
  994. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  995. var
  996. intloadsize: aint;
  997. begin
  998. intloadsize := packedbitsloadsize(sref.bitlen);
  999. if (intloadsize = 0) then
  1000. internalerror(2006081310);
  1001. if (intloadsize > sizeof(aint)) then
  1002. intloadsize := sizeof(aint);
  1003. loadsize := int_cgsize(intloadsize);
  1004. if (loadsize = OS_NO) then
  1005. internalerror(2006081311);
  1006. if (sref.bitlen > sizeof(aint)*8) then
  1007. internalerror(2006081312);
  1008. extra_load :=
  1009. (sref.bitlen <> 1) and
  1010. ((sref.bitindexreg <> NR_NO) or
  1011. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1012. end;
  1013. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1014. var
  1015. restbits: byte;
  1016. begin
  1017. if (target_info.endian = endian_big) then
  1018. begin
  1019. { valuereg contains the upper bits, extra_value_reg the lower }
  1020. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1021. if (subsetsize in [OS_S8..OS_S128]) then
  1022. begin
  1023. { sign extend }
  1024. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1025. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1026. end
  1027. else
  1028. begin
  1029. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1030. { mask other bits }
  1031. if (sref.bitlen <> AIntBits) then
  1032. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1033. end;
  1034. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1035. end
  1036. else
  1037. begin
  1038. { valuereg contains the lower bits, extra_value_reg the upper }
  1039. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1040. if (subsetsize in [OS_S8..OS_S128]) then
  1041. begin
  1042. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1043. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1044. end
  1045. else
  1046. begin
  1047. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1048. { mask other bits }
  1049. if (sref.bitlen <> AIntBits) then
  1050. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1051. end;
  1052. end;
  1053. { merge }
  1054. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1055. end;
  1056. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister);
  1057. var
  1058. hl: tasmlabel;
  1059. tmpref: treference;
  1060. extra_value_reg,
  1061. tmpreg: tregister;
  1062. begin
  1063. tmpreg := getintregister(list,OS_INT);
  1064. tmpref := sref.ref;
  1065. inc(tmpref.offset,loadbitsize div 8);
  1066. extra_value_reg := getintregister(list,OS_INT);
  1067. if (target_info.endian = endian_big) then
  1068. begin
  1069. { since this is a dynamic index, it's possible that the value }
  1070. { is entirely in valuereg. }
  1071. { get the data in valuereg in the right place }
  1072. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1073. if (subsetsize in [OS_S8..OS_S128]) then
  1074. begin
  1075. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1076. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1077. end
  1078. else
  1079. begin
  1080. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1081. if (loadbitsize <> AIntBits) then
  1082. { mask left over bits }
  1083. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1084. end;
  1085. tmpreg := getintregister(list,OS_INT);
  1086. { ensure we don't load anything past the end of the array }
  1087. current_asmdata.getjumplabel(hl);
  1088. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1089. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1090. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1091. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1092. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1093. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1094. { load next "loadbitsize" bits of the array }
  1095. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1096. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1097. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1098. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1099. { => extra_value_reg is now 0 }
  1100. { merge }
  1101. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1102. { no need to mask, necessary masking happened earlier on }
  1103. a_label(list,hl);
  1104. end
  1105. else
  1106. begin
  1107. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1108. { ensure we don't load anything past the end of the array }
  1109. current_asmdata.getjumplabel(hl);
  1110. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1111. { Y-x = -(Y-x) }
  1112. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1113. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1114. { load next "loadbitsize" bits of the array }
  1115. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1116. { tmpreg is in the range 1..<cpu_bitsize>-1 -> always ok }
  1117. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1118. { merge }
  1119. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1120. a_label(list,hl);
  1121. { sign extend or mask other bits }
  1122. if (subsetsize in [OS_S8..OS_S128]) then
  1123. begin
  1124. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1125. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1126. end
  1127. else
  1128. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1129. end;
  1130. end;
  1131. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1132. var
  1133. tmpref: treference;
  1134. valuereg,extra_value_reg: tregister;
  1135. tosreg: tsubsetregister;
  1136. loadsize: tcgsize;
  1137. loadbitsize: byte;
  1138. extra_load: boolean;
  1139. begin
  1140. get_subsetref_load_info(sref,loadsize,extra_load);
  1141. loadbitsize := tcgsize2size[loadsize]*8;
  1142. { load the (first part) of the bit sequence }
  1143. valuereg := getintregister(list,OS_INT);
  1144. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1145. if not extra_load then
  1146. begin
  1147. { everything is guaranteed to be in a single register of loadsize }
  1148. if (sref.bitindexreg = NR_NO) then
  1149. begin
  1150. { use subsetreg routine, it may have been overridden with an optimized version }
  1151. tosreg.subsetreg := valuereg;
  1152. tosreg.subsetregsize := OS_INT;
  1153. { subsetregs always count bits from right to left }
  1154. if (target_info.endian = endian_big) then
  1155. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1156. else
  1157. tosreg.startbit := sref.startbit;
  1158. tosreg.bitlen := sref.bitlen;
  1159. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1160. exit;
  1161. end
  1162. else
  1163. begin
  1164. if (sref.startbit <> 0) then
  1165. internalerror(2006081510);
  1166. if (target_info.endian = endian_big) then
  1167. begin
  1168. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1169. if (subsetsize in [OS_S8..OS_S128]) then
  1170. begin
  1171. { sign extend to entire register }
  1172. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1173. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1174. end
  1175. else
  1176. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1177. end
  1178. else
  1179. begin
  1180. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1181. if (subsetsize in [OS_S8..OS_S128]) then
  1182. begin
  1183. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1184. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1185. end
  1186. end;
  1187. { mask other bits/sign extend }
  1188. if not(subsetsize in [OS_S8..OS_S128]) then
  1189. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1190. end
  1191. end
  1192. else
  1193. begin
  1194. { load next value as well }
  1195. extra_value_reg := getintregister(list,OS_INT);
  1196. if (sref.bitindexreg = NR_NO) then
  1197. begin
  1198. tmpref := sref.ref;
  1199. inc(tmpref.offset,loadbitsize div 8);
  1200. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1201. { can be overridden to optimize }
  1202. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1203. end
  1204. else
  1205. begin
  1206. if (sref.startbit <> 0) then
  1207. internalerror(2006080610);
  1208. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg);
  1209. end;
  1210. end;
  1211. { store in destination }
  1212. { avoid unnecessary sign extension and zeroing }
  1213. valuereg := makeregsize(list,valuereg,OS_INT);
  1214. destreg := makeregsize(list,destreg,OS_INT);
  1215. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1216. destreg := makeregsize(list,destreg,tosize);
  1217. end;
  1218. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1219. begin
  1220. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1221. end;
  1222. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1223. var
  1224. hl: tasmlabel;
  1225. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1226. tosreg, fromsreg: tsubsetregister;
  1227. tmpref: treference;
  1228. bitmask: aword;
  1229. loadsize: tcgsize;
  1230. loadbitsize: byte;
  1231. extra_load: boolean;
  1232. begin
  1233. { the register must be able to contain the requested value }
  1234. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1235. internalerror(2006081613);
  1236. get_subsetref_load_info(sref,loadsize,extra_load);
  1237. loadbitsize := tcgsize2size[loadsize]*8;
  1238. { load the (first part) of the bit sequence }
  1239. valuereg := getintregister(list,OS_INT);
  1240. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1241. { constant offset of bit sequence? }
  1242. if not extra_load then
  1243. begin
  1244. if (sref.bitindexreg = NR_NO) then
  1245. begin
  1246. { use subsetreg routine, it may have been overridden with an optimized version }
  1247. tosreg.subsetreg := valuereg;
  1248. tosreg.subsetregsize := OS_INT;
  1249. { subsetregs always count bits from right to left }
  1250. if (target_info.endian = endian_big) then
  1251. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1252. else
  1253. tosreg.startbit := sref.startbit;
  1254. tosreg.bitlen := sref.bitlen;
  1255. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1256. end
  1257. else
  1258. begin
  1259. if (sref.startbit <> 0) then
  1260. internalerror(2006081710);
  1261. { should be handled by normal code and will give wrong result }
  1262. { on x86 for the '1 shl bitlen' below }
  1263. if (sref.bitlen = AIntBits) then
  1264. internalerror(2006081711);
  1265. { zero the bits we have to insert }
  1266. if (slopt <> SL_SETMAX) then
  1267. begin
  1268. maskreg := getintregister(list,OS_INT);
  1269. if (target_info.endian = endian_big) then
  1270. begin
  1271. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1272. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1273. end
  1274. else
  1275. begin
  1276. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1277. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1278. end;
  1279. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1280. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1281. end;
  1282. { insert the value }
  1283. if (slopt <> SL_SETZERO) then
  1284. begin
  1285. tmpreg := getintregister(list,OS_INT);
  1286. if (slopt <> SL_SETMAX) then
  1287. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1288. else if (sref.bitlen <> AIntBits) then
  1289. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1290. else
  1291. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1292. if (target_info.endian = endian_big) then
  1293. begin
  1294. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1295. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1296. begin
  1297. if (loadbitsize <> AIntBits) then
  1298. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1299. else
  1300. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1301. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1302. end;
  1303. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1304. end
  1305. else
  1306. begin
  1307. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1308. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1309. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1310. end;
  1311. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1312. end;
  1313. end;
  1314. { store back to memory }
  1315. valuereg := makeregsize(list,valuereg,loadsize);
  1316. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1317. exit;
  1318. end
  1319. else
  1320. begin
  1321. { load next value }
  1322. extra_value_reg := getintregister(list,OS_INT);
  1323. tmpref := sref.ref;
  1324. inc(tmpref.offset,loadbitsize div 8);
  1325. { should maybe be taken out too, can be done more efficiently }
  1326. { on e.g. i386 with shld/shrd }
  1327. if (sref.bitindexreg = NR_NO) then
  1328. begin
  1329. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1330. fromsreg.subsetreg := fromreg;
  1331. fromsreg.subsetregsize := fromsize;
  1332. tosreg.subsetreg := valuereg;
  1333. tosreg.subsetregsize := OS_INT;
  1334. { transfer first part }
  1335. fromsreg.bitlen := loadbitsize-sref.startbit;
  1336. tosreg.bitlen := fromsreg.bitlen;
  1337. if (target_info.endian = endian_big) then
  1338. begin
  1339. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1340. { upper bits of the value ... }
  1341. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1342. { ... to bit 0 }
  1343. tosreg.startbit := 0
  1344. end
  1345. else
  1346. begin
  1347. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1348. { lower bits of the value ... }
  1349. fromsreg.startbit := 0;
  1350. { ... to startbit }
  1351. tosreg.startbit := sref.startbit;
  1352. end;
  1353. case slopt of
  1354. SL_SETZERO,
  1355. SL_SETMAX:
  1356. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1357. else
  1358. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1359. end;
  1360. valuereg := makeregsize(list,valuereg,loadsize);
  1361. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1362. { transfer second part }
  1363. if (target_info.endian = endian_big) then
  1364. begin
  1365. { extra_value_reg must contain the lower bits of the value at bits }
  1366. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1367. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1368. { - bitlen - startbit }
  1369. fromsreg.startbit := 0;
  1370. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1371. end
  1372. else
  1373. begin
  1374. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1375. fromsreg.startbit := fromsreg.bitlen;
  1376. tosreg.startbit := 0;
  1377. end;
  1378. tosreg.subsetreg := extra_value_reg;
  1379. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1380. tosreg.bitlen := fromsreg.bitlen;
  1381. case slopt of
  1382. SL_SETZERO,
  1383. SL_SETMAX:
  1384. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1385. else
  1386. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1387. end;
  1388. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1389. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1390. exit;
  1391. end
  1392. else
  1393. begin
  1394. if (sref.startbit <> 0) then
  1395. internalerror(2006081812);
  1396. { should be handled by normal code and will give wrong result }
  1397. { on x86 for the '1 shl bitlen' below }
  1398. if (sref.bitlen = AIntBits) then
  1399. internalerror(2006081713);
  1400. { generate mask to zero the bits we have to insert }
  1401. if (slopt <> SL_SETMAX) then
  1402. begin
  1403. maskreg := getintregister(list,OS_INT);
  1404. if (target_info.endian = endian_big) then
  1405. begin
  1406. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1407. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1408. end
  1409. else
  1410. begin
  1411. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1412. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1413. end;
  1414. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1415. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1416. end;
  1417. { insert the value }
  1418. if (slopt <> SL_SETZERO) then
  1419. begin
  1420. tmpreg := getintregister(list,OS_INT);
  1421. if (slopt <> SL_SETMAX) then
  1422. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1423. else if (sref.bitlen <> AIntBits) then
  1424. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1425. else
  1426. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1427. if (target_info.endian = endian_big) then
  1428. begin
  1429. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1430. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1431. { mask left over bits }
  1432. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1433. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1434. end
  1435. else
  1436. begin
  1437. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1438. { mask left over bits }
  1439. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1440. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1441. end;
  1442. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1443. end;
  1444. valuereg := makeregsize(list,valuereg,loadsize);
  1445. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1446. { make sure we do not read/write past the end of the array }
  1447. current_asmdata.getjumplabel(hl);
  1448. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1449. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1450. tmpindexreg := getintregister(list,OS_INT);
  1451. { load current array value }
  1452. if (slopt <> SL_SETZERO) then
  1453. begin
  1454. tmpreg := getintregister(list,OS_INT);
  1455. if (slopt <> SL_SETMAX) then
  1456. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1457. else if (sref.bitlen <> AIntBits) then
  1458. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1459. else
  1460. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1461. end;
  1462. { generate mask to zero the bits we have to insert }
  1463. if (slopt <> SL_SETMAX) then
  1464. begin
  1465. maskreg := getintregister(list,OS_INT);
  1466. if (target_info.endian = endian_big) then
  1467. begin
  1468. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1469. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1470. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1471. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1472. end
  1473. else
  1474. begin
  1475. { Y-x = -(Y-x) }
  1476. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1477. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1478. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1479. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1480. end;
  1481. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1482. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1483. end;
  1484. if (slopt <> SL_SETZERO) then
  1485. begin
  1486. if (target_info.endian = endian_big) then
  1487. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1488. else
  1489. begin
  1490. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1491. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1492. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1493. end;
  1494. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1495. end;
  1496. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1497. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1498. a_label(list,hl);
  1499. end;
  1500. end;
  1501. end;
  1502. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1503. var
  1504. tmpreg: tregister;
  1505. begin
  1506. tmpreg := getintregister(list,tosubsetsize);
  1507. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1508. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1509. end;
  1510. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1511. var
  1512. tmpreg: tregister;
  1513. begin
  1514. tmpreg := getintregister(list,tosize);
  1515. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1516. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1517. end;
  1518. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1519. var
  1520. tmpreg: tregister;
  1521. begin
  1522. tmpreg := getintregister(list,subsetsize);
  1523. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1524. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1525. end;
  1526. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1527. var
  1528. tmpreg: tregister;
  1529. slopt: tsubsetloadopt;
  1530. begin
  1531. { perform masking of the source value in advance }
  1532. slopt := SL_REGNOSRCMASK;
  1533. if (sref.bitlen <> AIntBits) then
  1534. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1535. if (
  1536. { broken x86 "x shl regbitsize = x" }
  1537. ((sref.bitlen <> AIntBits) and
  1538. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1539. ((sref.bitlen = AIntBits) and
  1540. (a = -1))
  1541. ) then
  1542. slopt := SL_SETMAX
  1543. else if (a = 0) then
  1544. slopt := SL_SETZERO;
  1545. tmpreg := getintregister(list,subsetsize);
  1546. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1547. a_load_const_reg(list,subsetsize,a,tmpreg);
  1548. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1549. end;
  1550. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1551. begin
  1552. case loc.loc of
  1553. LOC_REFERENCE,LOC_CREFERENCE:
  1554. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1555. LOC_REGISTER,LOC_CREGISTER:
  1556. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1557. LOC_SUBSETREG,LOC_CSUBSETREG:
  1558. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1559. LOC_SUBSETREF,LOC_CSUBSETREF:
  1560. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1561. else
  1562. internalerror(200608054);
  1563. end;
  1564. end;
  1565. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1566. var
  1567. tmpreg: tregister;
  1568. begin
  1569. tmpreg := getintregister(list,tosubsetsize);
  1570. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1571. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1572. end;
  1573. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1574. var
  1575. tmpreg: tregister;
  1576. begin
  1577. tmpreg := getintregister(list,tosubsetsize);
  1578. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1579. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1580. end;
  1581. {$ifdef rangeon}
  1582. {$r+}
  1583. {$undef rangeon}
  1584. {$endif}
  1585. {$ifdef overflowon}
  1586. {$q+}
  1587. {$undef overflowon}
  1588. {$endif}
  1589. { generic bit address calculation routines }
  1590. function tcg.get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  1591. begin
  1592. result.ref:=ref;
  1593. inc(result.ref.offset,bitnumber div 8);
  1594. result.bitindexreg:=NR_NO;
  1595. result.startbit:=bitnumber mod 8;
  1596. result.bitlen:=1;
  1597. end;
  1598. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  1599. begin
  1600. result.subsetreg:=setreg;
  1601. result.subsetregsize:=setregsize;
  1602. { subsetregs always count from the least significant to the most significant bit }
  1603. if (target_info.endian=endian_big) then
  1604. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1605. else
  1606. result.startbit:=bitnumber;
  1607. result.bitlen:=1;
  1608. end;
  1609. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1610. var
  1611. tmpreg,
  1612. tmpaddrreg: tregister;
  1613. begin
  1614. result.ref:=ref;
  1615. result.startbit:=0;
  1616. result.bitlen:=1;
  1617. tmpreg:=getintregister(list,bitnumbersize);
  1618. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1619. tmpaddrreg:=getaddressregister(list);
  1620. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1621. if (result.ref.base=NR_NO) then
  1622. result.ref.base:=tmpaddrreg
  1623. else if (result.ref.index=NR_NO) then
  1624. result.ref.index:=tmpaddrreg
  1625. else
  1626. begin
  1627. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1628. result.ref.index:=tmpaddrreg;
  1629. end;
  1630. tmpreg:=getintregister(list,OS_INT);
  1631. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1632. result.bitindexreg:=tmpreg;
  1633. end;
  1634. { bit testing routines }
  1635. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1636. var
  1637. tmpvalue: tregister;
  1638. begin
  1639. tmpvalue:=getintregister(list,valuesize);
  1640. if (target_info.endian=endian_little) then
  1641. begin
  1642. { rotate value register "bitnumber" bits to the right }
  1643. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1644. { extract the bit we want }
  1645. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1646. end
  1647. else
  1648. begin
  1649. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1650. { bit in uppermost position, then move it to the lowest position }
  1651. { "and" is not necessary since combination of shl/shr will clear }
  1652. { all other bits }
  1653. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1654. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1655. end;
  1656. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1657. end;
  1658. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister);
  1659. begin
  1660. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1661. end;
  1662. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister);
  1663. begin
  1664. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1665. end;
  1666. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
  1667. var
  1668. tmpsreg: tsubsetregister;
  1669. begin
  1670. { the first parameter is used to calculate the bit offset in }
  1671. { case of big endian, and therefore must be the size of the }
  1672. { set and not of the whole subsetreg }
  1673. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1674. { now fix the size of the subsetreg }
  1675. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1676. { correct offset of the set in the subsetreg }
  1677. inc(tmpsreg.startbit,setreg.startbit);
  1678. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1679. end;
  1680. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1681. begin
  1682. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1683. end;
  1684. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1685. var
  1686. tmpreg: tregister;
  1687. begin
  1688. case loc.loc of
  1689. LOC_REFERENCE,LOC_CREFERENCE:
  1690. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1691. LOC_REGISTER,LOC_CREGISTER,
  1692. LOC_SUBSETREG,LOC_CSUBSETREG,
  1693. LOC_CONSTANT:
  1694. begin
  1695. case loc.loc of
  1696. LOC_REGISTER,LOC_CREGISTER:
  1697. tmpreg:=loc.register;
  1698. LOC_SUBSETREG,LOC_CSUBSETREG:
  1699. begin
  1700. tmpreg:=getintregister(list,loc.size);
  1701. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1702. end;
  1703. LOC_CONSTANT:
  1704. begin
  1705. tmpreg:=getintregister(list,loc.size);
  1706. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1707. end;
  1708. end;
  1709. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1710. end;
  1711. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1712. else
  1713. internalerror(2007051701);
  1714. end;
  1715. end;
  1716. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  1717. begin
  1718. case loc.loc of
  1719. LOC_REFERENCE,LOC_CREFERENCE:
  1720. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1721. LOC_REGISTER,LOC_CREGISTER:
  1722. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1723. LOC_SUBSETREG,LOC_CSUBSETREG:
  1724. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1725. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1726. else
  1727. internalerror(2007051702);
  1728. end;
  1729. end;
  1730. { bit setting/clearing routines }
  1731. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1732. var
  1733. tmpvalue: tregister;
  1734. begin
  1735. tmpvalue:=getintregister(list,destsize);
  1736. if (target_info.endian=endian_little) then
  1737. begin
  1738. a_load_const_reg(list,destsize,1,tmpvalue);
  1739. { rotate bit "bitnumber" bits to the left }
  1740. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  1741. end
  1742. else
  1743. begin
  1744. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  1745. { shr bitnumber" results in correct mask }
  1746. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  1747. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  1748. end;
  1749. { set/clear the bit we want }
  1750. if (doset) then
  1751. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  1752. else
  1753. begin
  1754. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  1755. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  1756. end;
  1757. end;
  1758. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference);
  1759. begin
  1760. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  1761. end;
  1762. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister);
  1763. begin
  1764. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  1765. end;
  1766. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister);
  1767. var
  1768. tmpsreg: tsubsetregister;
  1769. begin
  1770. { the first parameter is used to calculate the bit offset in }
  1771. { case of big endian, and therefore must be the size of the }
  1772. { set and not of the whole subsetreg }
  1773. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  1774. { now fix the size of the subsetreg }
  1775. tmpsreg.subsetregsize:=destreg.subsetregsize;
  1776. { correct offset of the set in the subsetreg }
  1777. inc(tmpsreg.startbit,destreg.startbit);
  1778. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  1779. end;
  1780. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  1781. begin
  1782. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  1783. end;
  1784. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  1785. var
  1786. tmpreg: tregister;
  1787. begin
  1788. case loc.loc of
  1789. LOC_REFERENCE:
  1790. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  1791. LOC_CREGISTER:
  1792. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  1793. { e.g. a 2-byte set in a record regvar }
  1794. LOC_CSUBSETREG:
  1795. begin
  1796. { hard to do in-place in a generic way, so operate on a copy }
  1797. tmpreg:=getintregister(list,loc.size);
  1798. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1799. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  1800. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1801. end;
  1802. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1803. else
  1804. internalerror(2007051703)
  1805. end;
  1806. end;
  1807. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  1808. begin
  1809. case loc.loc of
  1810. LOC_REFERENCE:
  1811. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  1812. LOC_CREGISTER:
  1813. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  1814. LOC_CSUBSETREG:
  1815. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  1816. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1817. else
  1818. internalerror(2007051704)
  1819. end;
  1820. end;
  1821. { memory/register loading }
  1822. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1823. var
  1824. tmpref : treference;
  1825. tmpreg : tregister;
  1826. i : longint;
  1827. begin
  1828. if ref.alignment<tcgsize2size[fromsize] then
  1829. begin
  1830. tmpref:=ref;
  1831. { we take care of the alignment now }
  1832. tmpref.alignment:=0;
  1833. case FromSize of
  1834. OS_16,OS_S16:
  1835. begin
  1836. tmpreg:=getintregister(list,OS_16);
  1837. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  1838. if target_info.endian=endian_big then
  1839. inc(tmpref.offset);
  1840. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1841. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1842. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1843. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  1844. if target_info.endian=endian_big then
  1845. dec(tmpref.offset)
  1846. else
  1847. inc(tmpref.offset);
  1848. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1849. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1850. end;
  1851. OS_32,OS_S32:
  1852. begin
  1853. { could add an optimised case for ref.alignment=2 }
  1854. tmpreg:=getintregister(list,OS_32);
  1855. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  1856. if target_info.endian=endian_big then
  1857. inc(tmpref.offset,3);
  1858. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1859. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1860. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1861. for i:=1 to 3 do
  1862. begin
  1863. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  1864. if target_info.endian=endian_big then
  1865. dec(tmpref.offset)
  1866. else
  1867. inc(tmpref.offset);
  1868. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1869. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1870. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1871. end;
  1872. end
  1873. else
  1874. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1875. end;
  1876. end
  1877. else
  1878. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1879. end;
  1880. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1881. var
  1882. tmpref : treference;
  1883. tmpreg,
  1884. tmpreg2 : tregister;
  1885. i : longint;
  1886. begin
  1887. if ref.alignment in [1,2] then
  1888. begin
  1889. tmpref:=ref;
  1890. { we take care of the alignment now }
  1891. tmpref.alignment:=0;
  1892. case FromSize of
  1893. OS_16,OS_S16:
  1894. if ref.alignment=2 then
  1895. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  1896. else
  1897. begin
  1898. { first load in tmpreg, because the target register }
  1899. { may be used in ref as well }
  1900. if target_info.endian=endian_little then
  1901. inc(tmpref.offset);
  1902. tmpreg:=getintregister(list,OS_8);
  1903. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  1904. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1905. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  1906. if target_info.endian=endian_little then
  1907. dec(tmpref.offset)
  1908. else
  1909. inc(tmpref.offset);
  1910. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  1911. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1912. end;
  1913. OS_32,OS_S32:
  1914. if ref.alignment=2 then
  1915. begin
  1916. if target_info.endian=endian_little then
  1917. inc(tmpref.offset,2);
  1918. tmpreg:=getintregister(list,OS_32);
  1919. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  1920. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  1921. if target_info.endian=endian_little then
  1922. dec(tmpref.offset,2)
  1923. else
  1924. inc(tmpref.offset,2);
  1925. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  1926. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1927. end
  1928. else
  1929. begin
  1930. if target_info.endian=endian_little then
  1931. inc(tmpref.offset,3);
  1932. tmpreg:=getintregister(list,OS_32);
  1933. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1934. tmpreg2:=getintregister(list,OS_32);
  1935. for i:=1 to 3 do
  1936. begin
  1937. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  1938. if target_info.endian=endian_little then
  1939. dec(tmpref.offset)
  1940. else
  1941. inc(tmpref.offset);
  1942. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  1943. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  1944. end;
  1945. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  1946. end
  1947. else
  1948. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1949. end;
  1950. end
  1951. else
  1952. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1953. end;
  1954. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1955. var
  1956. tmpreg: tregister;
  1957. begin
  1958. { verify if we have the same reference }
  1959. if references_equal(sref,dref) then
  1960. exit;
  1961. tmpreg:=getintregister(list,tosize);
  1962. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1963. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1964. end;
  1965. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1966. var
  1967. tmpreg: tregister;
  1968. begin
  1969. tmpreg:=getintregister(list,size);
  1970. a_load_const_reg(list,size,a,tmpreg);
  1971. a_load_reg_ref(list,size,size,tmpreg,ref);
  1972. end;
  1973. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1974. begin
  1975. case loc.loc of
  1976. LOC_REFERENCE,LOC_CREFERENCE:
  1977. a_load_const_ref(list,loc.size,a,loc.reference);
  1978. LOC_REGISTER,LOC_CREGISTER:
  1979. a_load_const_reg(list,loc.size,a,loc.register);
  1980. LOC_SUBSETREG,LOC_CSUBSETREG:
  1981. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1982. LOC_SUBSETREF,LOC_CSUBSETREF:
  1983. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1984. else
  1985. internalerror(200203272);
  1986. end;
  1987. end;
  1988. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1989. begin
  1990. case loc.loc of
  1991. LOC_REFERENCE,LOC_CREFERENCE:
  1992. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1993. LOC_REGISTER,LOC_CREGISTER:
  1994. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1995. LOC_SUBSETREG,LOC_CSUBSETREG:
  1996. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1997. LOC_SUBSETREF,LOC_CSUBSETREF:
  1998. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1999. else
  2000. internalerror(200203271);
  2001. end;
  2002. end;
  2003. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2004. begin
  2005. case loc.loc of
  2006. LOC_REFERENCE,LOC_CREFERENCE:
  2007. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2008. LOC_REGISTER,LOC_CREGISTER:
  2009. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2010. LOC_CONSTANT:
  2011. a_load_const_reg(list,tosize,loc.value,reg);
  2012. LOC_SUBSETREG,LOC_CSUBSETREG:
  2013. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2014. LOC_SUBSETREF,LOC_CSUBSETREF:
  2015. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2016. else
  2017. internalerror(200109092);
  2018. end;
  2019. end;
  2020. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2021. begin
  2022. case loc.loc of
  2023. LOC_REFERENCE,LOC_CREFERENCE:
  2024. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2025. LOC_REGISTER,LOC_CREGISTER:
  2026. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2027. LOC_CONSTANT:
  2028. a_load_const_ref(list,tosize,loc.value,ref);
  2029. LOC_SUBSETREG,LOC_CSUBSETREG:
  2030. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2031. LOC_SUBSETREF,LOC_CSUBSETREF:
  2032. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2033. else
  2034. internalerror(200109302);
  2035. end;
  2036. end;
  2037. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2038. begin
  2039. case loc.loc of
  2040. LOC_REFERENCE,LOC_CREFERENCE:
  2041. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2042. LOC_REGISTER,LOC_CREGISTER:
  2043. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2044. LOC_CONSTANT:
  2045. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2046. LOC_SUBSETREG,LOC_CSUBSETREG:
  2047. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2048. LOC_SUBSETREF,LOC_CSUBSETREF:
  2049. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2050. else
  2051. internalerror(2006052310);
  2052. end;
  2053. end;
  2054. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2055. begin
  2056. case loc.loc of
  2057. LOC_REFERENCE,LOC_CREFERENCE:
  2058. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2059. LOC_REGISTER,LOC_CREGISTER:
  2060. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2061. LOC_SUBSETREG,LOC_CSUBSETREG:
  2062. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2063. LOC_SUBSETREF,LOC_CSUBSETREF:
  2064. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2065. else
  2066. internalerror(2006051510);
  2067. end;
  2068. end;
  2069. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  2070. var
  2071. powerval : longint;
  2072. begin
  2073. case op of
  2074. OP_OR :
  2075. begin
  2076. { or with zero returns same result }
  2077. if a = 0 then
  2078. op:=OP_NONE
  2079. else
  2080. { or with max returns max }
  2081. if a = -1 then
  2082. op:=OP_MOVE;
  2083. end;
  2084. OP_AND :
  2085. begin
  2086. { and with max returns same result }
  2087. if (a = -1) then
  2088. op:=OP_NONE
  2089. else
  2090. { and with 0 returns 0 }
  2091. if a=0 then
  2092. op:=OP_MOVE;
  2093. end;
  2094. OP_DIV :
  2095. begin
  2096. { division by 1 returns result }
  2097. if a = 1 then
  2098. op:=OP_NONE
  2099. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2100. begin
  2101. a := powerval;
  2102. op:= OP_SHR;
  2103. end;
  2104. end;
  2105. OP_IDIV:
  2106. begin
  2107. if a = 1 then
  2108. op:=OP_NONE;
  2109. end;
  2110. OP_MUL,OP_IMUL:
  2111. begin
  2112. if a = 1 then
  2113. op:=OP_NONE
  2114. else
  2115. if a=0 then
  2116. op:=OP_MOVE
  2117. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2118. begin
  2119. a := powerval;
  2120. op:= OP_SHL;
  2121. end;
  2122. end;
  2123. OP_ADD,OP_SUB:
  2124. begin
  2125. if a = 0 then
  2126. op:=OP_NONE;
  2127. end;
  2128. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  2129. begin
  2130. if a = 0 then
  2131. op:=OP_NONE;
  2132. end;
  2133. end;
  2134. end;
  2135. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2136. begin
  2137. case loc.loc of
  2138. LOC_REFERENCE, LOC_CREFERENCE:
  2139. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2140. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2141. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2142. else
  2143. internalerror(200203301);
  2144. end;
  2145. end;
  2146. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2147. begin
  2148. case loc.loc of
  2149. LOC_REFERENCE, LOC_CREFERENCE:
  2150. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2151. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2152. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2153. else
  2154. internalerror(48991);
  2155. end;
  2156. end;
  2157. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2158. var
  2159. reg: tregister;
  2160. regsize: tcgsize;
  2161. begin
  2162. if (fromsize>=tosize) then
  2163. regsize:=fromsize
  2164. else
  2165. regsize:=tosize;
  2166. reg:=getfpuregister(list,regsize);
  2167. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2168. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2169. end;
  2170. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2171. var
  2172. ref : treference;
  2173. begin
  2174. case cgpara.location^.loc of
  2175. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2176. begin
  2177. cgpara.check_simple_location;
  2178. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2179. end;
  2180. LOC_REFERENCE,LOC_CREFERENCE:
  2181. begin
  2182. cgpara.check_simple_location;
  2183. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2184. a_loadfpu_reg_ref(list,size,size,r,ref);
  2185. end;
  2186. LOC_REGISTER,LOC_CREGISTER:
  2187. begin
  2188. { paramfpu_ref does the check_simpe_location check here if necessary }
  2189. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  2190. a_loadfpu_reg_ref(list,size,size,r,ref);
  2191. a_paramfpu_ref(list,size,ref,cgpara);
  2192. tg.Ungettemp(list,ref);
  2193. end;
  2194. else
  2195. internalerror(2002071004);
  2196. end;
  2197. end;
  2198. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2199. var
  2200. href : treference;
  2201. begin
  2202. cgpara.check_simple_location;
  2203. case cgpara.location^.loc of
  2204. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2205. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2206. LOC_REFERENCE,LOC_CREFERENCE:
  2207. begin
  2208. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2209. { concatcopy should choose the best way to copy the data }
  2210. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2211. end;
  2212. else
  2213. internalerror(200402201);
  2214. end;
  2215. end;
  2216. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  2217. var
  2218. tmpreg : tregister;
  2219. begin
  2220. tmpreg:=getintregister(list,size);
  2221. a_load_ref_reg(list,size,size,ref,tmpreg);
  2222. a_op_const_reg(list,op,size,a,tmpreg);
  2223. a_load_reg_ref(list,size,size,tmpreg,ref);
  2224. end;
  2225. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  2226. var
  2227. tmpreg: tregister;
  2228. begin
  2229. tmpreg := getintregister(list, size);
  2230. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2231. a_op_const_reg(list,op,size,a,tmpreg);
  2232. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2233. end;
  2234. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  2235. var
  2236. tmpreg: tregister;
  2237. begin
  2238. tmpreg := getintregister(list, size);
  2239. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2240. a_op_const_reg(list,op,size,a,tmpreg);
  2241. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2242. end;
  2243. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  2244. begin
  2245. case loc.loc of
  2246. LOC_REGISTER, LOC_CREGISTER:
  2247. a_op_const_reg(list,op,loc.size,a,loc.register);
  2248. LOC_REFERENCE, LOC_CREFERENCE:
  2249. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2250. LOC_SUBSETREG, LOC_CSUBSETREG:
  2251. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2252. LOC_SUBSETREF, LOC_CSUBSETREF:
  2253. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2254. else
  2255. internalerror(200109061);
  2256. end;
  2257. end;
  2258. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2259. var
  2260. tmpreg : tregister;
  2261. begin
  2262. tmpreg:=getintregister(list,size);
  2263. a_load_ref_reg(list,size,size,ref,tmpreg);
  2264. a_op_reg_reg(list,op,size,reg,tmpreg);
  2265. a_load_reg_ref(list,size,size,tmpreg,ref);
  2266. end;
  2267. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2268. var
  2269. tmpreg: tregister;
  2270. begin
  2271. case op of
  2272. OP_NOT,OP_NEG:
  2273. { handle it as "load ref,reg; op reg" }
  2274. begin
  2275. a_load_ref_reg(list,size,size,ref,reg);
  2276. a_op_reg_reg(list,op,size,reg,reg);
  2277. end;
  2278. else
  2279. begin
  2280. tmpreg:=getintregister(list,size);
  2281. a_load_ref_reg(list,size,size,ref,tmpreg);
  2282. a_op_reg_reg(list,op,size,tmpreg,reg);
  2283. end;
  2284. end;
  2285. end;
  2286. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2287. var
  2288. tmpreg: tregister;
  2289. begin
  2290. tmpreg := getintregister(list, opsize);
  2291. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2292. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2293. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2294. end;
  2295. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2296. var
  2297. tmpreg: tregister;
  2298. begin
  2299. tmpreg := getintregister(list, opsize);
  2300. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2301. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2302. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2303. end;
  2304. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2305. begin
  2306. case loc.loc of
  2307. LOC_REGISTER, LOC_CREGISTER:
  2308. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2309. LOC_REFERENCE, LOC_CREFERENCE:
  2310. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2311. LOC_SUBSETREG, LOC_CSUBSETREG:
  2312. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2313. LOC_SUBSETREF, LOC_CSUBSETREF:
  2314. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2315. else
  2316. internalerror(200109061);
  2317. end;
  2318. end;
  2319. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2320. var
  2321. tmpreg: tregister;
  2322. begin
  2323. case loc.loc of
  2324. LOC_REGISTER,LOC_CREGISTER:
  2325. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2326. LOC_REFERENCE,LOC_CREFERENCE:
  2327. begin
  2328. tmpreg:=getintregister(list,loc.size);
  2329. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2330. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2331. end;
  2332. LOC_SUBSETREG, LOC_CSUBSETREG:
  2333. begin
  2334. tmpreg:=getintregister(list,loc.size);
  2335. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2336. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2337. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2338. end;
  2339. LOC_SUBSETREF, LOC_CSUBSETREF:
  2340. begin
  2341. tmpreg:=getintregister(list,loc.size);
  2342. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2343. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2344. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2345. end;
  2346. else
  2347. internalerror(200109061);
  2348. end;
  2349. end;
  2350. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2351. a:aint;src,dst:Tregister);
  2352. begin
  2353. a_load_reg_reg(list,size,size,src,dst);
  2354. a_op_const_reg(list,op,size,a,dst);
  2355. end;
  2356. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2357. size: tcgsize; src1, src2, dst: tregister);
  2358. var
  2359. tmpreg: tregister;
  2360. begin
  2361. if (dst<>src1) then
  2362. begin
  2363. a_load_reg_reg(list,size,size,src2,dst);
  2364. a_op_reg_reg(list,op,size,src1,dst);
  2365. end
  2366. else
  2367. begin
  2368. { can we do a direct operation on the target register ? }
  2369. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2370. a_op_reg_reg(list,op,size,src2,dst)
  2371. else
  2372. begin
  2373. tmpreg:=getintregister(list,size);
  2374. a_load_reg_reg(list,size,size,src2,tmpreg);
  2375. a_op_reg_reg(list,op,size,src1,tmpreg);
  2376. a_load_reg_reg(list,size,size,tmpreg,dst);
  2377. end;
  2378. end;
  2379. end;
  2380. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2381. begin
  2382. a_op_const_reg_reg(list,op,size,a,src,dst);
  2383. ovloc.loc:=LOC_VOID;
  2384. end;
  2385. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2386. begin
  2387. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2388. ovloc.loc:=LOC_VOID;
  2389. end;
  2390. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2391. l : tasmlabel);
  2392. var
  2393. tmpreg: tregister;
  2394. begin
  2395. tmpreg:=getintregister(list,size);
  2396. a_load_ref_reg(list,size,size,ref,tmpreg);
  2397. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2398. end;
  2399. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2400. l : tasmlabel);
  2401. var
  2402. tmpreg : tregister;
  2403. begin
  2404. case loc.loc of
  2405. LOC_REGISTER,LOC_CREGISTER:
  2406. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2407. LOC_REFERENCE,LOC_CREFERENCE:
  2408. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2409. LOC_SUBSETREG, LOC_CSUBSETREG:
  2410. begin
  2411. tmpreg:=getintregister(list,size);
  2412. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2413. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2414. end;
  2415. LOC_SUBSETREF, LOC_CSUBSETREF:
  2416. begin
  2417. tmpreg:=getintregister(list,size);
  2418. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2419. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2420. end;
  2421. else
  2422. internalerror(200109061);
  2423. end;
  2424. end;
  2425. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2426. var
  2427. tmpreg: tregister;
  2428. begin
  2429. tmpreg:=getintregister(list,size);
  2430. a_load_ref_reg(list,size,size,ref,tmpreg);
  2431. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2432. end;
  2433. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2434. var
  2435. tmpreg: tregister;
  2436. begin
  2437. tmpreg:=getintregister(list,size);
  2438. a_load_ref_reg(list,size,size,ref,tmpreg);
  2439. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2440. end;
  2441. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2442. begin
  2443. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2444. end;
  2445. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2446. begin
  2447. case loc.loc of
  2448. LOC_REGISTER,
  2449. LOC_CREGISTER:
  2450. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2451. LOC_REFERENCE,
  2452. LOC_CREFERENCE :
  2453. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2454. LOC_CONSTANT:
  2455. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2456. LOC_SUBSETREG,
  2457. LOC_CSUBSETREG:
  2458. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2459. LOC_SUBSETREF,
  2460. LOC_CSUBSETREF:
  2461. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2462. else
  2463. internalerror(200203231);
  2464. end;
  2465. end;
  2466. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2467. var
  2468. tmpreg: tregister;
  2469. begin
  2470. tmpreg:=getintregister(list, cmpsize);
  2471. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2472. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2473. end;
  2474. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2475. var
  2476. tmpreg: tregister;
  2477. begin
  2478. tmpreg:=getintregister(list, cmpsize);
  2479. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2480. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2481. end;
  2482. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2483. l : tasmlabel);
  2484. var
  2485. tmpreg: tregister;
  2486. begin
  2487. case loc.loc of
  2488. LOC_REGISTER,LOC_CREGISTER:
  2489. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2490. LOC_REFERENCE,LOC_CREFERENCE:
  2491. begin
  2492. tmpreg:=getintregister(list,size);
  2493. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2494. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2495. end;
  2496. LOC_SUBSETREG, LOC_CSUBSETREG:
  2497. begin
  2498. tmpreg:=getintregister(list, size);
  2499. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2500. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2501. end;
  2502. LOC_SUBSETREF, LOC_CSUBSETREF:
  2503. begin
  2504. tmpreg:=getintregister(list, size);
  2505. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2506. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2507. end;
  2508. else
  2509. internalerror(200109061);
  2510. end;
  2511. end;
  2512. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2513. begin
  2514. case loc.loc of
  2515. LOC_MMREGISTER,LOC_CMMREGISTER:
  2516. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2517. LOC_REFERENCE,LOC_CREFERENCE:
  2518. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2519. else
  2520. internalerror(200310121);
  2521. end;
  2522. end;
  2523. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2524. begin
  2525. case loc.loc of
  2526. LOC_MMREGISTER,LOC_CMMREGISTER:
  2527. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2528. LOC_REFERENCE,LOC_CREFERENCE:
  2529. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2530. else
  2531. internalerror(200310122);
  2532. end;
  2533. end;
  2534. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2535. var
  2536. href : treference;
  2537. begin
  2538. cgpara.check_simple_location;
  2539. case cgpara.location^.loc of
  2540. LOC_MMREGISTER,LOC_CMMREGISTER:
  2541. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2542. LOC_REFERENCE,LOC_CREFERENCE:
  2543. begin
  2544. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2545. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2546. end
  2547. else
  2548. internalerror(200310123);
  2549. end;
  2550. end;
  2551. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2552. var
  2553. hr : tregister;
  2554. hs : tmmshuffle;
  2555. begin
  2556. cgpara.check_simple_location;
  2557. hr:=getmmregister(list,cgpara.location^.size);
  2558. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2559. if realshuffle(shuffle) then
  2560. begin
  2561. hs:=shuffle^;
  2562. removeshuffles(hs);
  2563. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2564. end
  2565. else
  2566. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2567. end;
  2568. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2569. begin
  2570. case loc.loc of
  2571. LOC_MMREGISTER,LOC_CMMREGISTER:
  2572. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2573. LOC_REFERENCE,LOC_CREFERENCE:
  2574. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2575. else
  2576. internalerror(200310123);
  2577. end;
  2578. end;
  2579. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2580. var
  2581. hr : tregister;
  2582. hs : tmmshuffle;
  2583. begin
  2584. hr:=getmmregister(list,size);
  2585. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2586. if realshuffle(shuffle) then
  2587. begin
  2588. hs:=shuffle^;
  2589. removeshuffles(hs);
  2590. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2591. end
  2592. else
  2593. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2594. end;
  2595. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2596. var
  2597. hr : tregister;
  2598. hs : tmmshuffle;
  2599. begin
  2600. hr:=getmmregister(list,size);
  2601. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2602. if realshuffle(shuffle) then
  2603. begin
  2604. hs:=shuffle^;
  2605. removeshuffles(hs);
  2606. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2607. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2608. end
  2609. else
  2610. begin
  2611. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2612. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2613. end;
  2614. end;
  2615. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2616. begin
  2617. case loc.loc of
  2618. LOC_CMMREGISTER,LOC_MMREGISTER:
  2619. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2620. LOC_CREFERENCE,LOC_REFERENCE:
  2621. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2622. else
  2623. internalerror(200312232);
  2624. end;
  2625. end;
  2626. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2627. begin
  2628. g_concatcopy(list,source,dest,len);
  2629. end;
  2630. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2631. var
  2632. cgpara1,cgpara2,cgpara3 : TCGPara;
  2633. begin
  2634. cgpara1.init;
  2635. cgpara2.init;
  2636. cgpara3.init;
  2637. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2638. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2639. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2640. paramanager.allocparaloc(list,cgpara3);
  2641. a_paramaddr_ref(list,dest,cgpara3);
  2642. paramanager.allocparaloc(list,cgpara2);
  2643. a_paramaddr_ref(list,source,cgpara2);
  2644. paramanager.allocparaloc(list,cgpara1);
  2645. a_param_const(list,OS_INT,len,cgpara1);
  2646. paramanager.freeparaloc(list,cgpara3);
  2647. paramanager.freeparaloc(list,cgpara2);
  2648. paramanager.freeparaloc(list,cgpara1);
  2649. allocallcpuregisters(list);
  2650. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  2651. deallocallcpuregisters(list);
  2652. cgpara3.done;
  2653. cgpara2.done;
  2654. cgpara1.done;
  2655. end;
  2656. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2657. var
  2658. cgpara1,cgpara2 : TCGPara;
  2659. begin
  2660. cgpara1.init;
  2661. cgpara2.init;
  2662. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2663. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2664. paramanager.allocparaloc(list,cgpara2);
  2665. a_paramaddr_ref(list,dest,cgpara2);
  2666. paramanager.allocparaloc(list,cgpara1);
  2667. a_paramaddr_ref(list,source,cgpara1);
  2668. paramanager.freeparaloc(list,cgpara2);
  2669. paramanager.freeparaloc(list,cgpara1);
  2670. allocallcpuregisters(list);
  2671. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  2672. deallocallcpuregisters(list);
  2673. cgpara2.done;
  2674. cgpara1.done;
  2675. end;
  2676. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2677. var
  2678. href : treference;
  2679. incrfunc : string;
  2680. cgpara1,cgpara2 : TCGPara;
  2681. begin
  2682. cgpara1.init;
  2683. cgpara2.init;
  2684. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2685. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2686. if is_interfacecom(t) then
  2687. incrfunc:='FPC_INTF_INCR_REF'
  2688. else if is_ansistring(t) then
  2689. incrfunc:='FPC_ANSISTR_INCR_REF'
  2690. else if is_widestring(t) then
  2691. incrfunc:='FPC_WIDESTR_INCR_REF'
  2692. else if is_unicodestring(t) then
  2693. incrfunc:='FPC_UNICODESTR_INCR_REF'
  2694. else if is_dynamic_array(t) then
  2695. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2696. else
  2697. incrfunc:='';
  2698. { call the special incr function or the generic addref }
  2699. if incrfunc<>'' then
  2700. begin
  2701. paramanager.allocparaloc(list,cgpara1);
  2702. { widestrings aren't ref. counted on all platforms so we need the address
  2703. to create a real copy }
  2704. if is_widestring(t) then
  2705. a_paramaddr_ref(list,ref,cgpara1)
  2706. else
  2707. { these functions get the pointer by value }
  2708. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2709. paramanager.freeparaloc(list,cgpara1);
  2710. allocallcpuregisters(list);
  2711. a_call_name(list,incrfunc,false);
  2712. deallocallcpuregisters(list);
  2713. end
  2714. else
  2715. begin
  2716. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2717. paramanager.allocparaloc(list,cgpara2);
  2718. a_paramaddr_ref(list,href,cgpara2);
  2719. paramanager.allocparaloc(list,cgpara1);
  2720. a_paramaddr_ref(list,ref,cgpara1);
  2721. paramanager.freeparaloc(list,cgpara1);
  2722. paramanager.freeparaloc(list,cgpara2);
  2723. allocallcpuregisters(list);
  2724. a_call_name(list,'FPC_ADDREF',false);
  2725. deallocallcpuregisters(list);
  2726. end;
  2727. cgpara2.done;
  2728. cgpara1.done;
  2729. end;
  2730. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2731. var
  2732. href : treference;
  2733. decrfunc : string;
  2734. needrtti : boolean;
  2735. cgpara1,cgpara2 : TCGPara;
  2736. tempreg1,tempreg2 : TRegister;
  2737. begin
  2738. cgpara1.init;
  2739. cgpara2.init;
  2740. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2741. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2742. needrtti:=false;
  2743. if is_interfacecom(t) then
  2744. decrfunc:='FPC_INTF_DECR_REF'
  2745. else if is_ansistring(t) then
  2746. decrfunc:='FPC_ANSISTR_DECR_REF'
  2747. else if is_widestring(t) then
  2748. decrfunc:='FPC_WIDESTR_DECR_REF'
  2749. else if is_unicodestring(t) then
  2750. decrfunc:='FPC_UNICODESTR_DECR_REF'
  2751. else if is_dynamic_array(t) then
  2752. begin
  2753. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2754. needrtti:=true;
  2755. end
  2756. else
  2757. decrfunc:='';
  2758. { call the special decr function or the generic decref }
  2759. if decrfunc<>'' then
  2760. begin
  2761. if needrtti then
  2762. begin
  2763. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2764. tempreg2:=getaddressregister(list);
  2765. a_loadaddr_ref_reg(list,href,tempreg2);
  2766. end;
  2767. tempreg1:=getaddressregister(list);
  2768. a_loadaddr_ref_reg(list,ref,tempreg1);
  2769. if needrtti then
  2770. begin
  2771. paramanager.allocparaloc(list,cgpara2);
  2772. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2773. paramanager.freeparaloc(list,cgpara2);
  2774. end;
  2775. paramanager.allocparaloc(list,cgpara1);
  2776. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2777. paramanager.freeparaloc(list,cgpara1);
  2778. allocallcpuregisters(list);
  2779. a_call_name(list,decrfunc,false);
  2780. deallocallcpuregisters(list);
  2781. end
  2782. else
  2783. begin
  2784. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2785. paramanager.allocparaloc(list,cgpara2);
  2786. a_paramaddr_ref(list,href,cgpara2);
  2787. paramanager.allocparaloc(list,cgpara1);
  2788. a_paramaddr_ref(list,ref,cgpara1);
  2789. paramanager.freeparaloc(list,cgpara1);
  2790. paramanager.freeparaloc(list,cgpara2);
  2791. allocallcpuregisters(list);
  2792. a_call_name(list,'FPC_DECREF',false);
  2793. deallocallcpuregisters(list);
  2794. end;
  2795. cgpara2.done;
  2796. cgpara1.done;
  2797. end;
  2798. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2799. var
  2800. href : treference;
  2801. cgpara1,cgpara2 : TCGPara;
  2802. begin
  2803. cgpara1.init;
  2804. cgpara2.init;
  2805. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2806. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2807. if is_ansistring(t) or
  2808. is_widestring(t) or
  2809. is_unicodestring(t) or
  2810. is_interfacecom(t) or
  2811. is_dynamic_array(t) then
  2812. a_load_const_ref(list,OS_ADDR,0,ref)
  2813. else
  2814. begin
  2815. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2816. paramanager.allocparaloc(list,cgpara2);
  2817. a_paramaddr_ref(list,href,cgpara2);
  2818. paramanager.allocparaloc(list,cgpara1);
  2819. a_paramaddr_ref(list,ref,cgpara1);
  2820. paramanager.freeparaloc(list,cgpara1);
  2821. paramanager.freeparaloc(list,cgpara2);
  2822. allocallcpuregisters(list);
  2823. a_call_name(list,'FPC_INITIALIZE',false);
  2824. deallocallcpuregisters(list);
  2825. end;
  2826. cgpara1.done;
  2827. cgpara2.done;
  2828. end;
  2829. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2830. var
  2831. href : treference;
  2832. cgpara1,cgpara2 : TCGPara;
  2833. begin
  2834. cgpara1.init;
  2835. cgpara2.init;
  2836. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2837. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2838. if is_ansistring(t) or
  2839. is_widestring(t) or
  2840. is_unicodestring(t) or
  2841. is_interfacecom(t) then
  2842. begin
  2843. g_decrrefcount(list,t,ref);
  2844. a_load_const_ref(list,OS_ADDR,0,ref);
  2845. end
  2846. else
  2847. begin
  2848. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2849. paramanager.allocparaloc(list,cgpara2);
  2850. a_paramaddr_ref(list,href,cgpara2);
  2851. paramanager.allocparaloc(list,cgpara1);
  2852. a_paramaddr_ref(list,ref,cgpara1);
  2853. paramanager.freeparaloc(list,cgpara1);
  2854. paramanager.freeparaloc(list,cgpara2);
  2855. allocallcpuregisters(list);
  2856. a_call_name(list,'FPC_FINALIZE',false);
  2857. deallocallcpuregisters(list);
  2858. end;
  2859. cgpara1.done;
  2860. cgpara2.done;
  2861. end;
  2862. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2863. { generate range checking code for the value at location p. The type }
  2864. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2865. { is the original type used at that location. When both defs are equal }
  2866. { the check is also insert (needed for succ,pref,inc,dec) }
  2867. const
  2868. aintmax=high(aint);
  2869. var
  2870. neglabel : tasmlabel;
  2871. hreg : tregister;
  2872. lto,hto,
  2873. lfrom,hfrom : TConstExprInt;
  2874. fromsize, tosize: cardinal;
  2875. from_signed, to_signed: boolean;
  2876. begin
  2877. { range checking on and range checkable value? }
  2878. if not(cs_check_range in current_settings.localswitches) or
  2879. not(fromdef.typ in [orddef,enumdef]) or
  2880. { C-style booleans can't really fail range checks, }
  2881. { all values are always valid }
  2882. is_cbool(todef) then
  2883. exit;
  2884. {$ifndef cpu64bitalu}
  2885. { handle 64bit rangechecks separate for 32bit processors }
  2886. if is_64bit(fromdef) or is_64bit(todef) then
  2887. begin
  2888. cg64.g_rangecheck64(list,l,fromdef,todef);
  2889. exit;
  2890. end;
  2891. {$endif cpu64bitalu}
  2892. { only check when assigning to scalar, subranges are different, }
  2893. { when todef=fromdef then the check is always generated }
  2894. getrange(fromdef,lfrom,hfrom);
  2895. getrange(todef,lto,hto);
  2896. from_signed := is_signed(fromdef);
  2897. to_signed := is_signed(todef);
  2898. { check the rangedef of the array, not the array itself }
  2899. { (only change now, since getrange needs the arraydef) }
  2900. if (todef.typ = arraydef) then
  2901. todef := tarraydef(todef).rangedef;
  2902. { no range check if from and to are equal and are both longint/dword }
  2903. { (if we have a 32bit processor) or int64/qword, since such }
  2904. { operations can at most cause overflows (JM) }
  2905. { Note that these checks are mostly processor independent, they only }
  2906. { have to be changed once we introduce 64bit subrange types }
  2907. {$ifdef cpu64bitalu}
  2908. if (fromdef = todef) and
  2909. (fromdef.typ=orddef) and
  2910. (((((torddef(fromdef).ordtype = s64bit) and
  2911. (lfrom = low(int64)) and
  2912. (hfrom = high(int64))) or
  2913. ((torddef(fromdef).ordtype = u64bit) and
  2914. (lfrom = low(qword)) and
  2915. (hfrom = high(qword))) or
  2916. ((torddef(fromdef).ordtype = scurrency) and
  2917. (lfrom = low(int64)) and
  2918. (hfrom = high(int64)))))) then
  2919. exit;
  2920. {$else cpu64bitalu}
  2921. if (fromdef = todef) and
  2922. (fromdef.typ=orddef) and
  2923. (((((torddef(fromdef).ordtype = s32bit) and
  2924. (lfrom = int64(low(longint))) and
  2925. (hfrom = int64(high(longint)))) or
  2926. ((torddef(fromdef).ordtype = u32bit) and
  2927. (lfrom = low(cardinal)) and
  2928. (hfrom = high(cardinal)))))) then
  2929. exit;
  2930. {$endif cpu64bitalu}
  2931. { optimize some range checks away in safe cases }
  2932. fromsize := fromdef.size;
  2933. tosize := todef.size;
  2934. if ((from_signed = to_signed) or
  2935. (not from_signed)) and
  2936. (lto<=lfrom) and (hto>=hfrom) and
  2937. (fromsize <= tosize) then
  2938. begin
  2939. { if fromsize < tosize, and both have the same signed-ness or }
  2940. { fromdef is unsigned, then all bit patterns from fromdef are }
  2941. { valid for todef as well }
  2942. if (fromsize < tosize) then
  2943. exit;
  2944. if (fromsize = tosize) and
  2945. (from_signed = to_signed) then
  2946. { only optimize away if all bit patterns which fit in fromsize }
  2947. { are valid for the todef }
  2948. begin
  2949. {$ifopt Q+}
  2950. {$define overflowon}
  2951. {$Q-}
  2952. {$endif}
  2953. if to_signed then
  2954. begin
  2955. { calculation of the low/high ranges must not overflow 64 bit
  2956. otherwise we end up comparing with zero for 64 bit data types on
  2957. 64 bit processors }
  2958. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2959. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2960. exit
  2961. end
  2962. else
  2963. begin
  2964. { calculation of the low/high ranges must not overflow 64 bit
  2965. otherwise we end up having all zeros for 64 bit data types on
  2966. 64 bit processors }
  2967. if (lto = 0) and
  2968. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2969. exit
  2970. end;
  2971. {$ifdef overflowon}
  2972. {$Q+}
  2973. {$undef overflowon}
  2974. {$endif}
  2975. end
  2976. end;
  2977. { generate the rangecheck code for the def where we are going to }
  2978. { store the result }
  2979. { use the trick that }
  2980. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2981. { To be able to do that, we have to make sure however that either }
  2982. { fromdef and todef are both signed or unsigned, or that we leave }
  2983. { the parts < 0 and > maxlongint out }
  2984. if from_signed xor to_signed then
  2985. begin
  2986. if from_signed then
  2987. { from is signed, to is unsigned }
  2988. begin
  2989. { if high(from) < 0 -> always range error }
  2990. if (hfrom < 0) or
  2991. { if low(to) > maxlongint also range error }
  2992. (lto > aintmax) then
  2993. begin
  2994. a_call_name(list,'FPC_RANGEERROR',false);
  2995. exit
  2996. end;
  2997. { from is signed and to is unsigned -> when looking at to }
  2998. { as an signed value, it must be < maxaint (otherwise }
  2999. { it will become negative, which is invalid since "to" is unsigned) }
  3000. if hto > aintmax then
  3001. hto := aintmax;
  3002. end
  3003. else
  3004. { from is unsigned, to is signed }
  3005. begin
  3006. if (lfrom > aintmax) or
  3007. (hto < 0) then
  3008. begin
  3009. a_call_name(list,'FPC_RANGEERROR',false);
  3010. exit
  3011. end;
  3012. { from is unsigned and to is signed -> when looking at to }
  3013. { as an unsigned value, it must be >= 0 (since negative }
  3014. { values are the same as values > maxlongint) }
  3015. if lto < 0 then
  3016. lto := 0;
  3017. end;
  3018. end;
  3019. hreg:=getintregister(list,OS_INT);
  3020. a_load_loc_reg(list,OS_INT,l,hreg);
  3021. a_op_const_reg(list,OP_SUB,OS_INT,aint(int64(lto)),hreg);
  3022. current_asmdata.getjumplabel(neglabel);
  3023. {
  3024. if from_signed then
  3025. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3026. else
  3027. }
  3028. {$ifdef cpu64bitalu}
  3029. if qword(hto-lto)>qword(aintmax) then
  3030. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3031. else
  3032. {$endif cpu64bitalu}
  3033. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(int64(hto-lto)),hreg,neglabel);
  3034. a_call_name(list,'FPC_RANGEERROR',false);
  3035. a_label(list,neglabel);
  3036. end;
  3037. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3038. begin
  3039. g_overflowCheck(list,loc,def);
  3040. end;
  3041. {$ifdef cpuflags}
  3042. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3043. var
  3044. tmpreg : tregister;
  3045. begin
  3046. tmpreg:=getintregister(list,size);
  3047. g_flags2reg(list,size,f,tmpreg);
  3048. a_load_reg_ref(list,size,size,tmpreg,ref);
  3049. end;
  3050. {$endif cpuflags}
  3051. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3052. var
  3053. OKLabel : tasmlabel;
  3054. cgpara1 : TCGPara;
  3055. begin
  3056. if (cs_check_object in current_settings.localswitches) or
  3057. (cs_check_range in current_settings.localswitches) then
  3058. begin
  3059. current_asmdata.getjumplabel(oklabel);
  3060. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3061. cgpara1.init;
  3062. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3063. paramanager.allocparaloc(list,cgpara1);
  3064. a_param_const(list,OS_INT,210,cgpara1);
  3065. paramanager.freeparaloc(list,cgpara1);
  3066. a_call_name(list,'FPC_HANDLEERROR',false);
  3067. a_label(list,oklabel);
  3068. cgpara1.done;
  3069. end;
  3070. end;
  3071. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3072. var
  3073. hrefvmt : treference;
  3074. cgpara1,cgpara2 : TCGPara;
  3075. begin
  3076. cgpara1.init;
  3077. cgpara2.init;
  3078. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3079. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3080. if (cs_check_object in current_settings.localswitches) then
  3081. begin
  3082. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  3083. paramanager.allocparaloc(list,cgpara2);
  3084. a_paramaddr_ref(list,hrefvmt,cgpara2);
  3085. paramanager.allocparaloc(list,cgpara1);
  3086. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3087. paramanager.freeparaloc(list,cgpara1);
  3088. paramanager.freeparaloc(list,cgpara2);
  3089. allocallcpuregisters(list);
  3090. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  3091. deallocallcpuregisters(list);
  3092. end
  3093. else
  3094. if (cs_check_range in current_settings.localswitches) then
  3095. begin
  3096. paramanager.allocparaloc(list,cgpara1);
  3097. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3098. paramanager.freeparaloc(list,cgpara1);
  3099. allocallcpuregisters(list);
  3100. a_call_name(list,'FPC_CHECK_OBJECT',false);
  3101. deallocallcpuregisters(list);
  3102. end;
  3103. cgpara1.done;
  3104. cgpara2.done;
  3105. end;
  3106. {*****************************************************************************
  3107. Entry/Exit Code Functions
  3108. *****************************************************************************}
  3109. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  3110. var
  3111. sizereg,sourcereg,lenreg : tregister;
  3112. cgpara1,cgpara2,cgpara3 : TCGPara;
  3113. begin
  3114. { because some abis don't support dynamic stack allocation properly
  3115. open array value parameters are copied onto the heap
  3116. }
  3117. { calculate necessary memory }
  3118. { read/write operations on one register make the life of the register allocator hard }
  3119. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3120. begin
  3121. lenreg:=getintregister(list,OS_INT);
  3122. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3123. end
  3124. else
  3125. lenreg:=lenloc.register;
  3126. sizereg:=getintregister(list,OS_INT);
  3127. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3128. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3129. { load source }
  3130. sourcereg:=getaddressregister(list);
  3131. a_loadaddr_ref_reg(list,ref,sourcereg);
  3132. { do getmem call }
  3133. cgpara1.init;
  3134. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3135. paramanager.allocparaloc(list,cgpara1);
  3136. a_param_reg(list,OS_INT,sizereg,cgpara1);
  3137. paramanager.freeparaloc(list,cgpara1);
  3138. allocallcpuregisters(list);
  3139. a_call_name(list,'FPC_GETMEM',false);
  3140. deallocallcpuregisters(list);
  3141. cgpara1.done;
  3142. { return the new address }
  3143. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3144. { do move call }
  3145. cgpara1.init;
  3146. cgpara2.init;
  3147. cgpara3.init;
  3148. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3149. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3150. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3151. { load size }
  3152. paramanager.allocparaloc(list,cgpara3);
  3153. a_param_reg(list,OS_INT,sizereg,cgpara3);
  3154. { load destination }
  3155. paramanager.allocparaloc(list,cgpara2);
  3156. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  3157. { load source }
  3158. paramanager.allocparaloc(list,cgpara1);
  3159. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  3160. paramanager.freeparaloc(list,cgpara3);
  3161. paramanager.freeparaloc(list,cgpara2);
  3162. paramanager.freeparaloc(list,cgpara1);
  3163. allocallcpuregisters(list);
  3164. a_call_name(list,'FPC_MOVE',false);
  3165. deallocallcpuregisters(list);
  3166. cgpara3.done;
  3167. cgpara2.done;
  3168. cgpara1.done;
  3169. end;
  3170. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3171. var
  3172. cgpara1 : TCGPara;
  3173. begin
  3174. { do move call }
  3175. cgpara1.init;
  3176. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3177. { load source }
  3178. paramanager.allocparaloc(list,cgpara1);
  3179. a_param_loc(list,l,cgpara1);
  3180. paramanager.freeparaloc(list,cgpara1);
  3181. allocallcpuregisters(list);
  3182. a_call_name(list,'FPC_FREEMEM',false);
  3183. deallocallcpuregisters(list);
  3184. cgpara1.done;
  3185. end;
  3186. procedure tcg.g_save_registers(list:TAsmList);
  3187. var
  3188. href : treference;
  3189. size : longint;
  3190. r : integer;
  3191. begin
  3192. { calculate temp. size }
  3193. size:=0;
  3194. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3195. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3196. inc(size,sizeof(aint));
  3197. { mm registers }
  3198. if uses_registers(R_MMREGISTER) then
  3199. begin
  3200. { Make sure we reserve enough space to do the alignment based on the offset
  3201. later on. We can't use the size for this, because the alignment of the start
  3202. of the temp is smaller than needed for an OS_VECTOR }
  3203. inc(size,tcgsize2size[OS_VECTOR]);
  3204. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3205. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3206. inc(size,tcgsize2size[OS_VECTOR]);
  3207. end;
  3208. if size>0 then
  3209. begin
  3210. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  3211. include(current_procinfo.flags,pi_has_saved_regs);
  3212. { Copy registers to temp }
  3213. href:=current_procinfo.save_regs_ref;
  3214. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3215. begin
  3216. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3217. begin
  3218. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3219. inc(href.offset,sizeof(aint));
  3220. end;
  3221. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3222. end;
  3223. if uses_registers(R_MMREGISTER) then
  3224. begin
  3225. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3226. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3227. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3228. begin
  3229. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3230. begin
  3231. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3232. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3233. end;
  3234. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3235. end;
  3236. end;
  3237. end;
  3238. end;
  3239. procedure tcg.g_restore_registers(list:TAsmList);
  3240. var
  3241. href : treference;
  3242. r : integer;
  3243. hreg : tregister;
  3244. begin
  3245. if not(pi_has_saved_regs in current_procinfo.flags) then
  3246. exit;
  3247. { Copy registers from temp }
  3248. href:=current_procinfo.save_regs_ref;
  3249. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3250. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3251. begin
  3252. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3253. { Allocate register so the optimizer does not remove the load }
  3254. a_reg_alloc(list,hreg);
  3255. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3256. inc(href.offset,sizeof(aint));
  3257. end;
  3258. if uses_registers(R_MMREGISTER) then
  3259. begin
  3260. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3261. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3262. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3263. begin
  3264. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3265. begin
  3266. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3267. { Allocate register so the optimizer does not remove the load }
  3268. a_reg_alloc(list,hreg);
  3269. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3270. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3271. end;
  3272. end;
  3273. end;
  3274. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3275. end;
  3276. procedure tcg.g_profilecode(list : TAsmList);
  3277. begin
  3278. end;
  3279. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3280. begin
  3281. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3282. end;
  3283. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  3284. begin
  3285. a_load_const_ref(list, OS_INT, a, href);
  3286. end;
  3287. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3288. begin
  3289. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  3290. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3291. end;
  3292. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  3293. var
  3294. hsym : tsym;
  3295. href : treference;
  3296. paraloc : Pcgparalocation;
  3297. begin
  3298. { calculate the parameter info for the procdef }
  3299. if not procdef.has_paraloc_info then
  3300. begin
  3301. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  3302. procdef.has_paraloc_info:=true;
  3303. end;
  3304. hsym:=tsym(procdef.parast.Find('self'));
  3305. if not(assigned(hsym) and
  3306. (hsym.typ=paravarsym)) then
  3307. internalerror(200305251);
  3308. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3309. while paraloc<>nil do
  3310. with paraloc^ do
  3311. begin
  3312. case loc of
  3313. LOC_REGISTER:
  3314. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3315. LOC_REFERENCE:
  3316. begin
  3317. { offset in the wrapper needs to be adjusted for the stored
  3318. return address }
  3319. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  3320. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3321. end
  3322. else
  3323. internalerror(200309189);
  3324. end;
  3325. paraloc:=next;
  3326. end;
  3327. end;
  3328. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3329. begin
  3330. a_jmp_name(list,externalname);
  3331. end;
  3332. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3333. begin
  3334. a_call_name(list,s,false);
  3335. end;
  3336. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;
  3337. var
  3338. l: tasmsymbol;
  3339. ref: treference;
  3340. begin
  3341. result := NR_NO;
  3342. case target_info.system of
  3343. system_powerpc_darwin,
  3344. system_i386_darwin,
  3345. system_powerpc64_darwin,
  3346. system_arm_darwin:
  3347. begin
  3348. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  3349. if not(assigned(l)) then
  3350. begin
  3351. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_LOCAL,AT_DATA);
  3352. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3353. if not(weak) then
  3354. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.RefAsmSymbol(symname).Name))
  3355. else
  3356. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.WeakRefAsmSymbol(symname).Name));
  3357. {$ifdef cpu64bitaddr}
  3358. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3359. {$else cpu64bitaddr}
  3360. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3361. {$endif cpu64bitaddr}
  3362. end;
  3363. result := getaddressregister(list);
  3364. reference_reset_symbol(ref,l,0,sizeof(pint));
  3365. { a_load_ref_reg will turn this into a pic-load if needed }
  3366. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3367. end;
  3368. end;
  3369. end;
  3370. procedure tcg.g_maybe_got_init(list: TAsmList);
  3371. begin
  3372. end;
  3373. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  3374. begin
  3375. internalerror(200807231);
  3376. end;
  3377. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  3378. begin
  3379. internalerror(200807232);
  3380. end;
  3381. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  3382. begin
  3383. internalerror(200807233);
  3384. end;
  3385. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  3386. begin
  3387. internalerror(200807234);
  3388. end;
  3389. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  3390. begin
  3391. Result:=TRegister(0);
  3392. internalerror(200807238);
  3393. end;
  3394. {*****************************************************************************
  3395. TCG64
  3396. *****************************************************************************}
  3397. {$ifndef cpu64bitalu}
  3398. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3399. begin
  3400. a_load64_reg_reg(list,regsrc,regdst);
  3401. a_op64_const_reg(list,op,size,value,regdst);
  3402. end;
  3403. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3404. var
  3405. tmpreg64 : tregister64;
  3406. begin
  3407. { when src1=dst then we need to first create a temp to prevent
  3408. overwriting src1 with src2 }
  3409. if (regsrc1.reghi=regdst.reghi) or
  3410. (regsrc1.reglo=regdst.reghi) or
  3411. (regsrc1.reghi=regdst.reglo) or
  3412. (regsrc1.reglo=regdst.reglo) then
  3413. begin
  3414. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3415. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3416. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3417. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3418. a_load64_reg_reg(list,tmpreg64,regdst);
  3419. end
  3420. else
  3421. begin
  3422. a_load64_reg_reg(list,regsrc2,regdst);
  3423. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3424. end;
  3425. end;
  3426. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3427. var
  3428. tmpreg64 : tregister64;
  3429. begin
  3430. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3431. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3432. a_load64_subsetref_reg(list,sref,tmpreg64);
  3433. a_op64_const_reg(list,op,size,a,tmpreg64);
  3434. a_load64_reg_subsetref(list,tmpreg64,sref);
  3435. end;
  3436. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3437. var
  3438. tmpreg64 : tregister64;
  3439. begin
  3440. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3441. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3442. a_load64_subsetref_reg(list,sref,tmpreg64);
  3443. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3444. a_load64_reg_subsetref(list,tmpreg64,sref);
  3445. end;
  3446. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3447. var
  3448. tmpreg64 : tregister64;
  3449. begin
  3450. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3451. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3452. a_load64_subsetref_reg(list,sref,tmpreg64);
  3453. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3454. a_load64_reg_subsetref(list,tmpreg64,sref);
  3455. end;
  3456. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3457. var
  3458. tmpreg64 : tregister64;
  3459. begin
  3460. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3461. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3462. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3463. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3464. end;
  3465. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3466. begin
  3467. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3468. ovloc.loc:=LOC_VOID;
  3469. end;
  3470. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3471. begin
  3472. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3473. ovloc.loc:=LOC_VOID;
  3474. end;
  3475. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3476. begin
  3477. case l.loc of
  3478. LOC_REFERENCE, LOC_CREFERENCE:
  3479. a_load64_ref_subsetref(list,l.reference,sref);
  3480. LOC_REGISTER,LOC_CREGISTER:
  3481. a_load64_reg_subsetref(list,l.register64,sref);
  3482. LOC_CONSTANT :
  3483. a_load64_const_subsetref(list,l.value64,sref);
  3484. LOC_SUBSETREF,LOC_CSUBSETREF:
  3485. a_load64_subsetref_subsetref(list,l.sref,sref);
  3486. else
  3487. internalerror(2006082210);
  3488. end;
  3489. end;
  3490. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3491. begin
  3492. case l.loc of
  3493. LOC_REFERENCE, LOC_CREFERENCE:
  3494. a_load64_subsetref_ref(list,sref,l.reference);
  3495. LOC_REGISTER,LOC_CREGISTER:
  3496. a_load64_subsetref_reg(list,sref,l.register64);
  3497. LOC_SUBSETREF,LOC_CSUBSETREF:
  3498. a_load64_subsetref_subsetref(list,sref,l.sref);
  3499. else
  3500. internalerror(2006082211);
  3501. end;
  3502. end;
  3503. {$endif cpu64bitalu}
  3504. procedure destroy_codegen;
  3505. begin
  3506. cg.free;
  3507. cg:=nil;
  3508. {$ifndef cpu64bitalu}
  3509. cg64.free;
  3510. cg64:=nil;
  3511. {$endif cpu64bitalu}
  3512. end;
  3513. end.