cg386mat.pas 43 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl
  4. Generate i386 assembler for math nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cg386mat;
  19. interface
  20. uses
  21. tree;
  22. procedure secondmoddiv(var p : ptree);
  23. procedure secondshlshr(var p : ptree);
  24. procedure secondunaryminus(var p : ptree);
  25. procedure secondnot(var p : ptree);
  26. implementation
  27. uses
  28. globtype,systems,
  29. cobjects,verbose,globals,
  30. symconst,symtable,aasm,types,
  31. hcodegen,temp_gen,pass_2,
  32. cpubase,cpuasm,
  33. {$ifdef dummy}
  34. end { this overcomes the annoying highlighting problem in my TP IDE,
  35. the IDE assumes i386asm start a asm block (FK) }
  36. {$endif}
  37. cgai386,tgeni386;
  38. {*****************************************************************************
  39. SecondModDiv
  40. *****************************************************************************}
  41. procedure secondmoddiv(var p : ptree);
  42. var
  43. hreg1, hreg2 : tregister;
  44. shrdiv, andmod, pushed,popeax,popedx : boolean;
  45. power : longint;
  46. hl : pasmlabel;
  47. hloc : tlocation;
  48. pushedreg : tpushed;
  49. typename,opname : string[6];
  50. begin
  51. shrdiv := false;
  52. andmod := false;
  53. secondpass(p^.left);
  54. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  55. secondpass(p^.right);
  56. if pushed then
  57. restore(p^.left,is_64bitint(p^.left^.resulttype));
  58. set_location(p^.location,p^.left^.location);
  59. if is_64bitint(p^.resulttype) then
  60. begin
  61. { save p^.lcoation, because we change it now }
  62. set_location(hloc,p^.location);
  63. release_qword_loc(p^.location);
  64. release_qword_loc(p^.right^.location);
  65. p^.location.registerlow:=getexplicitregister32(R_EAX);
  66. p^.location.registerhigh:=getexplicitregister32(R_EDX);
  67. pushusedregisters(pushedreg,$ff
  68. and not($80 shr byte(p^.location.registerlow))
  69. and not($80 shr byte(p^.location.registerhigh)));
  70. { the left operand is in hloc, because the
  71. location of left is p^.location but p^.location
  72. is already destroyed
  73. }
  74. emit_pushq_loc(hloc);
  75. clear_location(hloc);
  76. emit_pushq_loc(p^.right^.location);
  77. if porddef(p^.resulttype)^.typ=u64bit then
  78. typename:='QWORD'
  79. else
  80. typename:='INT64';
  81. if p^.treetype=divn then
  82. opname:='DIV_'
  83. else
  84. opname:='MOD_';
  85. emitcall('FPC_'+opname+typename);
  86. emit_reg_reg(A_MOV,S_L,R_EAX,p^.location.registerlow);
  87. emit_reg_reg(A_MOV,S_L,R_EDX,p^.location.registerhigh);
  88. popusedregisters(pushedreg);
  89. p^.location.loc:=LOC_REGISTER;
  90. end
  91. else
  92. begin
  93. { put numerator in register }
  94. if p^.left^.location.loc<>LOC_REGISTER then
  95. begin
  96. if p^.left^.location.loc=LOC_CREGISTER then
  97. begin
  98. hreg1:=getregister32;
  99. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,hreg1);
  100. end
  101. else
  102. begin
  103. del_reference(p^.left^.location.reference);
  104. hreg1:=getregister32;
  105. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  106. hreg1);
  107. end;
  108. clear_location(p^.left^.location);
  109. p^.left^.location.loc:=LOC_REGISTER;
  110. p^.left^.location.register:=hreg1;
  111. end
  112. else hreg1:=p^.left^.location.register;
  113. if (p^.treetype=divn) and (p^.right^.treetype=ordconstn) and
  114. ispowerof2(p^.right^.value,power) then
  115. Begin
  116. shrdiv := true;
  117. {for signed numbers, the numerator must be adjusted before the
  118. shift instruction, but not wih unsigned numbers! Otherwise,
  119. "Cardinal($ffffffff) div 16" overflows! (JM)}
  120. If is_signed(p^.left^.resulttype) Then
  121. Begin
  122. {$ifdef newOptimizations}
  123. If (aktOptProcessor <> class386) and
  124. not(CS_LittleSize in aktglobalswitches) then
  125. { use a sequence without jumps, saw this in
  126. comp.compilers (JM) }
  127. begin
  128. { no jumps, but more operations }
  129. if (hreg1 = R_EAX) and
  130. (R_EDX in unused) then
  131. begin
  132. hreg2 := getexplicitregister32(R_EDX);
  133. emit_none(A_CDQ,S_NO);
  134. end
  135. else
  136. begin
  137. {$ifndef noAllocEdi}
  138. getexplicitregister32(R_EDI);
  139. {$endif noAllocEdi}
  140. hreg2 := R_EDI;
  141. emit_reg_reg(A_MOV,S_L,hreg1,R_EDI);
  142. { if the left value is signed, R_EDI := $ffffffff,
  143. otherwise 0 }
  144. emit_const_reg(A_SAR,S_L,31,R_EDI);
  145. { if signed, R_EDI := right value-1, otherwise 0 }
  146. end;
  147. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg2);
  148. { add to the left value }
  149. emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
  150. { release EDX if we used it }
  151. {$ifndef noAllocEdi}
  152. { also releas EDI }
  153. ungetregister32(hreg2);
  154. {$else noAllocEdi}
  155. if (hreg2 = R_EDX) then
  156. ungetregister32(hreg2);
  157. {$endif noAllocEdi}
  158. { do the shift }
  159. emit_const_reg(A_SAR,S_L,power,hreg1);
  160. end
  161. else
  162. {$endif newOptimizations}
  163. begin
  164. { a jump, but less operations }
  165. emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
  166. getlabel(hl);
  167. emitjmp(C_NS,hl);
  168. if power=1 then
  169. emit_reg(A_INC,S_L,hreg1)
  170. else
  171. emit_const_reg(A_ADD,S_L,p^.right^.value-1,hreg1);
  172. emitlab(hl);
  173. emit_const_reg(A_SAR,S_L,power,hreg1);
  174. end
  175. End
  176. Else
  177. emit_const_reg(A_SHR,S_L,power,hreg1);
  178. End
  179. else
  180. if (p^.treetype=modn) and (p^.right^.treetype=ordconstn) and
  181. ispowerof2(p^.right^.value,power) and Not(is_signed(p^.left^.resulttype)) Then
  182. {is there a similar trick for MOD'ing signed numbers? (JM)}
  183. Begin
  184. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg1);
  185. andmod := true;
  186. End
  187. else
  188. begin
  189. { bring denominator to EDI }
  190. { EDI is always free, it's }
  191. { only used for temporary }
  192. { purposes }
  193. {$ifndef noAllocEdi}
  194. getexplicitregister32(R_EDI);
  195. {$endif noAllocEdi}
  196. if (p^.right^.location.loc<>LOC_REGISTER) and
  197. (p^.right^.location.loc<>LOC_CREGISTER) then
  198. begin
  199. del_reference(p^.right^.location.reference);
  200. p^.left^.location.loc:=LOC_REGISTER;
  201. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),R_EDI);
  202. end
  203. else
  204. begin
  205. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,R_EDI);
  206. ungetregister32(p^.right^.location.register);
  207. end;
  208. popedx:=false;
  209. popeax:=false;
  210. if hreg1=R_EDX then
  211. begin
  212. if not(R_EAX in unused) then
  213. begin
  214. emit_reg(A_PUSH,S_L,R_EAX);
  215. popeax:=true;
  216. end;
  217. emit_reg_reg(A_MOV,S_L,R_EDX,R_EAX);
  218. end
  219. else
  220. begin
  221. if not(R_EDX in unused) then
  222. begin
  223. emit_reg(A_PUSH,S_L,R_EDX);
  224. popedx:=true;
  225. end;
  226. if hreg1<>R_EAX then
  227. begin
  228. if not(R_EAX in unused) then
  229. begin
  230. emit_reg(A_PUSH,S_L,R_EAX);
  231. popeax:=true;
  232. end;
  233. emit_reg_reg(A_MOV,S_L,hreg1,R_EAX);
  234. end;
  235. end;
  236. { sign extension depends on the left type }
  237. if porddef(p^.left^.resulttype)^.typ=u32bit then
  238. emit_reg_reg(A_XOR,S_L,R_EDX,R_EDX)
  239. else
  240. emit_none(A_CDQ,S_NO);
  241. { division depends on the right type }
  242. if porddef(p^.right^.resulttype)^.typ=u32bit then
  243. emit_reg(A_DIV,S_L,R_EDI)
  244. else
  245. emit_reg(A_IDIV,S_L,R_EDI);
  246. {$ifndef noAllocEdi}
  247. ungetregister32(R_EDI);
  248. {$endif noAllocEdi}
  249. if p^.treetype=divn then
  250. begin
  251. { if result register is busy then copy }
  252. if popeax then
  253. begin
  254. if hreg1=R_EAX then
  255. internalerror(112);
  256. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1)
  257. end
  258. else
  259. if hreg1<>R_EAX then
  260. Begin
  261. ungetregister32(hreg1);
  262. hreg1 := getexplicitregister32(R_EAX);
  263. { I don't think it's possible that now hreg1 <> R_EAX
  264. since popeax is false, but for all certainty I do
  265. support that situation (JM)}
  266. if hreg1 <> R_EAX then
  267. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1);
  268. end;
  269. end
  270. else
  271. {if we did the mod by an "and", the result is in hreg1 and
  272. EDX certainly hasn't been pushed (JM)}
  273. if not(andmod) Then
  274. if popedx then
  275. {the mod was done by an (i)div (so the result is now in
  276. edx), but edx was occupied prior to the division, so
  277. move the result into a safe place (JM)}
  278. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1)
  279. else
  280. Begin
  281. {Get rid of the unnecessary hreg1 if possible (same as with
  282. EAX in divn) (JM)}
  283. ungetregister32(hreg1);
  284. hreg1 := getexplicitregister32(R_EDX);
  285. if hreg1 <> R_EDX then
  286. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1);;
  287. End;
  288. if popeax then
  289. emit_reg(A_POP,S_L,R_EAX);
  290. if popedx then
  291. emit_reg(A_POP,S_L,R_EDX);
  292. end;
  293. If not(andmod or shrdiv) then
  294. {andmod and shrdiv only use hreg1 (which is already in usedinproc,
  295. since it was acquired with getregister), the others also use both
  296. EAX and EDX (JM)}
  297. Begin
  298. usedinproc:=usedinproc or ($80 shr byte(R_EAX));
  299. usedinproc:=usedinproc or ($80 shr byte(R_EDX));
  300. End;
  301. clear_location(p^.location);
  302. p^.location.loc:=LOC_REGISTER;
  303. p^.location.register:=hreg1;
  304. end;
  305. end;
  306. {*****************************************************************************
  307. SecondShlShr
  308. *****************************************************************************}
  309. procedure secondshlshr(var p : ptree);
  310. var
  311. hregister1,hregister2,hregister3,
  312. hregisterhigh,hregisterlow : tregister;
  313. pushed,popecx : boolean;
  314. op : tasmop;
  315. hr : preference;
  316. l1,l2,l3 : pasmlabel;
  317. begin
  318. popecx:=false;
  319. secondpass(p^.left);
  320. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  321. secondpass(p^.right);
  322. if pushed then
  323. restore(p^.left,is_64bitint(p^.left^.resulttype));
  324. if is_64bitint(p^.left^.resulttype) then
  325. begin
  326. { load left operator in a register }
  327. if p^.left^.location.loc<>LOC_REGISTER then
  328. begin
  329. if p^.left^.location.loc=LOC_CREGISTER then
  330. begin
  331. hregisterlow:=getregister32;
  332. hregisterhigh:=getregister32;
  333. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,
  334. hregisterlow);
  335. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,
  336. hregisterlow);
  337. end
  338. else
  339. begin
  340. del_reference(p^.left^.location.reference);
  341. hregisterlow:=getregister32;
  342. hregisterhigh:=getregister32;
  343. emit_mov_ref_reg64(p^.left^.location.reference,
  344. hregisterlow,
  345. hregisterhigh);
  346. end;
  347. end
  348. else
  349. begin
  350. hregisterlow:=p^.left^.location.registerlow;
  351. hregisterhigh:=p^.left^.location.registerhigh;
  352. end;
  353. { shifting by a constant directly coded: }
  354. if (p^.right^.treetype=ordconstn) then
  355. begin
  356. { shrd/shl works only for values <=31 !! }
  357. if p^.right^.value>31 then
  358. begin
  359. if p^.treetype=shln then
  360. begin
  361. emit_reg_reg(A_XOR,S_L,hregisterhigh,
  362. hregisterhigh);
  363. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  364. hregisterlow);
  365. end
  366. else
  367. begin
  368. emit_reg_reg(A_XOR,S_L,hregisterlow,
  369. hregisterlow);
  370. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  371. hregisterhigh);
  372. end;
  373. p^.location.registerhigh:=hregisterlow;
  374. p^.location.registerlow:=hregisterhigh;
  375. end
  376. else
  377. begin
  378. if p^.treetype=shln then
  379. begin
  380. emit_const_reg_reg(A_SHLD,S_L,p^.right^.value and 31,
  381. hregisterlow,hregisterhigh);
  382. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  383. hregisterlow);
  384. end
  385. else
  386. begin
  387. emit_const_reg_reg(A_SHRD,S_L,p^.right^.value and 31,
  388. hregisterhigh,hregisterlow);
  389. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  390. hregisterhigh);
  391. end;
  392. p^.location.registerlow:=hregisterlow;
  393. p^.location.registerhigh:=hregisterhigh;
  394. end;
  395. p^.location.loc:=LOC_REGISTER;
  396. end
  397. else
  398. begin
  399. { load right operators in a register }
  400. if p^.right^.location.loc<>LOC_REGISTER then
  401. begin
  402. if p^.right^.location.loc=LOC_CREGISTER then
  403. begin
  404. hregister2:=getexplicitregister32(R_ECX);
  405. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  406. hregister2);
  407. end
  408. else
  409. begin
  410. del_reference(p^.right^.location.reference);
  411. hregister2:=getexplicitregister32(R_ECX);
  412. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  413. hregister2);
  414. end;
  415. end
  416. else
  417. hregister2:=p^.right^.location.register;
  418. { left operator is already in a register }
  419. { hence are both in a register }
  420. { is it in the case ECX ? }
  421. if (hregisterlow=R_ECX) then
  422. begin
  423. { then only swap }
  424. emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
  425. hregister3:=hregisterlow;
  426. hregisterlow:=hregister2;
  427. hregister2:=hregister3;
  428. end
  429. else if (hregisterhigh=R_ECX) then
  430. begin
  431. { then only swap }
  432. emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
  433. hregister3:=hregisterhigh;
  434. hregisterhigh:=hregister2;
  435. hregister2:=hregister3;
  436. end
  437. { if second operator not in ECX ? }
  438. else if (hregister2<>R_ECX) then
  439. begin
  440. { ECX occupied then push it }
  441. if not (R_ECX in unused) then
  442. begin
  443. popecx:=true;
  444. emit_reg(A_PUSH,S_L,R_ECX);
  445. end;
  446. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  447. end;
  448. ungetregister32(hregister2);
  449. { the damned shift instructions work only til a count of 32 }
  450. { so we've to do some tricks here }
  451. if p^.treetype=shln then
  452. begin
  453. getlabel(l1);
  454. getlabel(l2);
  455. getlabel(l3);
  456. emit_const_reg(A_CMP,S_L,64,R_ECX);
  457. emitjmp(C_L,l1);
  458. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  459. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  460. emitjmp(C_None,l3);
  461. emitlab(l1);
  462. emit_const_reg(A_CMP,S_L,32,R_ECX);
  463. emitjmp(C_L,l2);
  464. emit_const_reg(A_SUB,S_L,32,R_ECX);
  465. emit_reg_reg(A_SHL,S_L,R_CL,
  466. hregisterlow);
  467. emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
  468. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  469. emitjmp(C_None,l3);
  470. emitlab(l2);
  471. emit_reg_reg_reg(A_SHLD,S_L,R_CL,
  472. hregisterlow,hregisterhigh);
  473. emit_reg_reg(A_SHL,S_L,R_CL,
  474. hregisterlow);
  475. emitlab(l3);
  476. end
  477. else
  478. begin
  479. getlabel(l1);
  480. getlabel(l2);
  481. getlabel(l3);
  482. emit_const_reg(A_CMP,S_L,64,R_ECX);
  483. emitjmp(C_L,l1);
  484. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  485. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  486. emitjmp(C_None,l3);
  487. emitlab(l1);
  488. emit_const_reg(A_CMP,S_L,32,R_ECX);
  489. emitjmp(C_L,l2);
  490. emit_const_reg(A_SUB,S_L,32,R_ECX);
  491. emit_reg_reg(A_SHR,S_L,R_CL,
  492. hregisterhigh);
  493. emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
  494. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  495. emitjmp(C_None,l3);
  496. emitlab(l2);
  497. emit_reg_reg_reg(A_SHRD,S_L,R_CL,
  498. hregisterhigh,hregisterlow);
  499. emit_reg_reg(A_SHR,S_L,R_CL,
  500. hregisterhigh);
  501. emitlab(l3);
  502. end;
  503. { maybe put ECX back }
  504. if popecx then
  505. emit_reg(A_POP,S_L,R_ECX);
  506. p^.location.registerlow:=hregisterlow;
  507. p^.location.registerhigh:=hregisterhigh;
  508. end;
  509. end
  510. else
  511. begin
  512. { load left operators in a register }
  513. if p^.left^.location.loc<>LOC_REGISTER then
  514. begin
  515. if p^.left^.location.loc=LOC_CREGISTER then
  516. begin
  517. hregister1:=getregister32;
  518. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,
  519. hregister1);
  520. end
  521. else
  522. begin
  523. del_reference(p^.left^.location.reference);
  524. hregister1:=getregister32;
  525. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  526. hregister1);
  527. end;
  528. end
  529. else
  530. hregister1:=p^.left^.location.register;
  531. { determine operator }
  532. if p^.treetype=shln then
  533. op:=A_SHL
  534. else
  535. op:=A_SHR;
  536. { shifting by a constant directly coded: }
  537. if (p^.right^.treetype=ordconstn) then
  538. begin
  539. { l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
  540. if p^.right^.value<=31 then
  541. }
  542. emit_const_reg(op,S_L,p^.right^.value and 31,
  543. hregister1);
  544. {
  545. else
  546. emit_reg_reg(A_XOR,S_L,hregister1,
  547. hregister1);
  548. }
  549. p^.location.loc:=LOC_REGISTER;
  550. p^.location.register:=hregister1;
  551. end
  552. else
  553. begin
  554. { load right operators in a register }
  555. if p^.right^.location.loc<>LOC_REGISTER then
  556. begin
  557. if p^.right^.location.loc=LOC_CREGISTER then
  558. begin
  559. hregister2:=getexplicitregister32(R_ECX);
  560. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  561. hregister2);
  562. end
  563. else
  564. begin
  565. del_reference(p^.right^.location.reference);
  566. hregister2:=getexplicitregister32(R_ECX);
  567. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  568. hregister2);
  569. end;
  570. end
  571. else
  572. hregister2:=p^.right^.location.register;
  573. { left operator is already in a register }
  574. { hence are both in a register }
  575. { is it in the case ECX ? }
  576. if (hregister1=R_ECX) then
  577. begin
  578. { then only swap }
  579. emit_reg_reg(A_XCHG,S_L,hregister1,hregister2);
  580. hregister3:=hregister1;
  581. hregister1:=hregister2;
  582. hregister2:=hregister3;
  583. end
  584. { if second operator not in ECX ? }
  585. else if (hregister2<>R_ECX) then
  586. begin
  587. { ECX occupied then push it }
  588. if not (R_ECX in unused) then
  589. begin
  590. popecx:=true;
  591. emit_reg(A_PUSH,S_L,R_ECX);
  592. end;
  593. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  594. end;
  595. ungetregister32(hregister2);
  596. { right operand is in ECX }
  597. emit_reg_reg(op,S_L,R_CL,hregister1);
  598. { maybe ECX back }
  599. if popecx then
  600. emit_reg(A_POP,S_L,R_ECX);
  601. p^.location.register:=hregister1;
  602. end;
  603. end;
  604. end;
  605. {*****************************************************************************
  606. SecondUnaryMinus
  607. *****************************************************************************}
  608. procedure secondunaryminus(var p : ptree);
  609. {$ifdef SUPPORT_MMX}
  610. procedure do_mmx_neg;
  611. var
  612. op : tasmop;
  613. begin
  614. p^.location.loc:=LOC_MMXREGISTER;
  615. if cs_mmx_saturation in aktlocalswitches then
  616. case mmx_type(p^.resulttype) of
  617. mmxs8bit:
  618. op:=A_PSUBSB;
  619. mmxu8bit:
  620. op:=A_PSUBUSB;
  621. mmxs16bit,mmxfixed16:
  622. op:=A_PSUBSW;
  623. mmxu16bit:
  624. op:=A_PSUBUSW;
  625. end
  626. else
  627. case mmx_type(p^.resulttype) of
  628. mmxs8bit,mmxu8bit:
  629. op:=A_PSUBB;
  630. mmxs16bit,mmxu16bit,mmxfixed16:
  631. op:=A_PSUBW;
  632. mmxs32bit,mmxu32bit:
  633. op:=A_PSUBD;
  634. end;
  635. emit_reg_reg(op,S_NO,p^.location.register,R_MM7);
  636. emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register);
  637. end;
  638. {$endif}
  639. var
  640. hr : preference;
  641. begin
  642. if is_64bitint(p^.left^.resulttype) then
  643. begin
  644. secondpass(p^.left);
  645. clear_location(p^.location);
  646. p^.location.loc:=LOC_REGISTER;
  647. case p^.left^.location.loc of
  648. LOC_REGISTER :
  649. begin
  650. p^.location.registerlow:=p^.left^.location.registerlow;
  651. p^.location.registerhigh:=p^.left^.location.registerhigh;
  652. end;
  653. LOC_CREGISTER :
  654. begin
  655. p^.location.registerlow:=getregister32;
  656. p^.location.registerhigh:=getregister32;
  657. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  658. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  659. end;
  660. LOC_REFERENCE,LOC_MEM :
  661. begin
  662. del_reference(p^.left^.location.reference);
  663. p^.location.registerlow:=getregister32;
  664. p^.location.registerhigh:=getregister32;
  665. emit_mov_ref_reg64(p^.left^.location.reference,
  666. p^.location.registerlow,
  667. p^.location.registerhigh);
  668. end;
  669. end;
  670. {
  671. emit_reg(A_NEG,S_L,p^.location.registerlow);
  672. emit_const_reg(A_ADC,S_L,0,p^.location.registerhigh);
  673. emit_reg(A_NEG,S_L,p^.location.registerhigh);
  674. }
  675. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  676. emit_reg(A_NEG,S_L,p^.location.registerlow);
  677. emit_const_reg(A_SBB,S_L,-1,p^.location.registerhigh);
  678. end
  679. else
  680. begin
  681. secondpass(p^.left);
  682. p^.location.loc:=LOC_REGISTER;
  683. case p^.left^.location.loc of
  684. LOC_REGISTER:
  685. begin
  686. p^.location.register:=p^.left^.location.register;
  687. emit_reg(A_NEG,S_L,p^.location.register);
  688. end;
  689. LOC_CREGISTER:
  690. begin
  691. p^.location.register:=getregister32;
  692. emit_reg_reg(A_MOV,S_L,p^.location.register,
  693. p^.location.register);
  694. emit_reg(A_NEG,S_L,p^.location.register);
  695. end;
  696. {$ifdef SUPPORT_MMX}
  697. LOC_MMXREGISTER:
  698. begin
  699. set_location(p^.location,p^.left^.location);
  700. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  701. do_mmx_neg;
  702. end;
  703. LOC_CMMXREGISTER:
  704. begin
  705. p^.location.register:=getregistermmx;
  706. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  707. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,
  708. p^.location.register);
  709. do_mmx_neg;
  710. end;
  711. {$endif SUPPORT_MMX}
  712. LOC_REFERENCE,LOC_MEM:
  713. begin
  714. del_reference(p^.left^.location.reference);
  715. if (p^.left^.resulttype^.deftype=floatdef) and
  716. (pfloatdef(p^.left^.resulttype)^.typ<>f32bit) then
  717. begin
  718. p^.location.loc:=LOC_FPU;
  719. floatload(pfloatdef(p^.left^.resulttype)^.typ,
  720. p^.left^.location.reference);
  721. emit_none(A_FCHS,S_NO);
  722. end
  723. {$ifdef SUPPORT_MMX}
  724. else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  725. begin
  726. p^.location.register:=getregistermmx;
  727. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  728. emit_ref_reg(A_MOVQ,S_NO,
  729. newreference(p^.left^.location.reference),
  730. p^.location.register);
  731. do_mmx_neg;
  732. end
  733. {$endif SUPPORT_MMX}
  734. else
  735. begin
  736. p^.location.register:=getregister32;
  737. emit_ref_reg(A_MOV,S_L,
  738. newreference(p^.left^.location.reference),
  739. p^.location.register);
  740. emit_reg(A_NEG,S_L,p^.location.register);
  741. end;
  742. end;
  743. LOC_FPU:
  744. begin
  745. p^.location.loc:=LOC_FPU;
  746. emit_none(A_FCHS,S_NO);
  747. end;
  748. LOC_CFPUREGISTER:
  749. begin
  750. emit_reg(A_FLD,S_NO,
  751. correct_fpuregister(p^.left^.location.register,fpuvaroffset));
  752. inc(fpuvaroffset);
  753. p^.location.loc:=LOC_FPU;
  754. emit_none(A_FCHS,S_NO);
  755. end;
  756. end;
  757. end;
  758. { Here was a problem... }
  759. { Operand to be negated always }
  760. { seems to be converted to signed }
  761. { 32-bit before doing neg!! }
  762. { So this is useless... }
  763. { that's not true: -2^31 gives an overflow error if it is negaded (FK) }
  764. { emitoverflowcheck(p);}
  765. end;
  766. {*****************************************************************************
  767. SecondNot
  768. *****************************************************************************}
  769. procedure secondnot(var p : ptree);
  770. const
  771. flagsinvers : array[F_E..F_BE] of tresflags =
  772. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
  773. F_A,F_AE,F_B,F_BE);
  774. var
  775. hl : pasmlabel;
  776. opsize : topsize;
  777. hr : preference;
  778. begin
  779. if is_boolean(p^.resulttype) then
  780. begin
  781. opsize:=def_opsize(p^.resulttype);
  782. case p^.left^.location.loc of
  783. LOC_JUMP :
  784. begin
  785. hl:=truelabel;
  786. truelabel:=falselabel;
  787. falselabel:=hl;
  788. secondpass(p^.left);
  789. maketojumpbool(p^.left);
  790. hl:=truelabel;
  791. truelabel:=falselabel;
  792. falselabel:=hl;
  793. end;
  794. LOC_FLAGS :
  795. begin
  796. secondpass(p^.left);
  797. p^.location.resflags:=flagsinvers[p^.left^.location.resflags];
  798. end;
  799. LOC_REGISTER :
  800. begin
  801. secondpass(p^.left);
  802. {p^.location.register:=p^.left^.location.register;
  803. emit_const_reg(A_XOR,opsize,1,p^.location.register);}
  804. p^.location.loc:=LOC_FLAGS;
  805. p^.location.resflags:=F_E;
  806. emit_reg_reg(A_TEST,opsize,
  807. p^.left^.location.register,p^.left^.location.register);
  808. ungetregister(p^.left^.location.register);
  809. end;
  810. LOC_CREGISTER :
  811. begin
  812. secondpass(p^.left);
  813. clear_location(p^.location);
  814. p^.location.loc:=LOC_REGISTER;
  815. p^.location.register:=def_getreg(p^.resulttype);
  816. emit_reg_reg(A_MOV,opsize,p^.left^.location.register,p^.location.register);
  817. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  818. ungetregister(p^.location.register);
  819. p^.location.loc:=LOC_FLAGS;
  820. p^.location.resflags:=F_E;
  821. end;
  822. LOC_REFERENCE,
  823. LOC_MEM :
  824. begin
  825. secondpass(p^.left);
  826. clear_location(p^.location);
  827. p^.location.loc:=LOC_REGISTER;
  828. del_reference(p^.left^.location.reference);
  829. { this was placed before del_ref => internaalerror(10) }
  830. p^.location.register:=def_getreg(p^.resulttype);
  831. emit_ref_reg(A_MOV,opsize,
  832. newreference(p^.left^.location.reference),p^.location.register);
  833. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  834. ungetregister(p^.location.register);
  835. p^.location.loc:=LOC_FLAGS;
  836. p^.location.resflags:=F_E;
  837. end;
  838. end;
  839. end
  840. {$ifdef SUPPORT_MMX}
  841. else
  842. if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  843. begin
  844. secondpass(p^.left);
  845. p^.location.loc:=LOC_MMXREGISTER;
  846. { prepare EDI }
  847. {$ifndef noAllocEdi}
  848. getexplicitregister32(R_EDI);
  849. {$endif noAllocEdi}
  850. emit_const_reg(A_MOV,S_L,$ffffffff,R_EDI);
  851. { load operand }
  852. case p^.left^.location.loc of
  853. LOC_MMXREGISTER:
  854. set_location(p^.location,p^.left^.location);
  855. LOC_CMMXREGISTER:
  856. begin
  857. p^.location.register:=getregistermmx;
  858. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,p^.location.register);
  859. end;
  860. LOC_REFERENCE,LOC_MEM:
  861. begin
  862. del_reference(p^.left^.location.reference);
  863. p^.location.register:=getregistermmx;
  864. emit_ref_reg(A_MOVQ,S_NO,
  865. newreference(p^.left^.location.reference),p^.location.register);
  866. end;
  867. end;
  868. { load mask }
  869. emit_reg_reg(A_MOVD,S_NO,R_EDI,R_MM7);
  870. {$ifndef noAllocEdi}
  871. ungetregister32(R_EDI);
  872. {$endif noAllocEdi}
  873. { lower 32 bit }
  874. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  875. { shift mask }
  876. emit_const_reg(A_PSLLQ,S_NO,32,R_MM7);
  877. { higher 32 bit }
  878. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  879. end
  880. {$endif SUPPORT_MMX}
  881. else if is_64bitint(p^.left^.resulttype) then
  882. begin
  883. secondpass(p^.left);
  884. clear_location(p^.location);
  885. p^.location.loc:=LOC_REGISTER;
  886. case p^.left^.location.loc of
  887. LOC_REGISTER :
  888. begin
  889. p^.location.registerlow:=p^.left^.location.registerlow;
  890. p^.location.registerhigh:=p^.left^.location.registerhigh;
  891. emit_reg(A_NOT,S_L,p^.location.registerlow);
  892. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  893. end;
  894. LOC_CREGISTER :
  895. begin
  896. p^.location.registerlow:=getregister32;
  897. p^.location.registerhigh:=getregister32;
  898. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  899. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  900. emit_reg(A_NOT,S_L,p^.location.registerlow);
  901. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  902. end;
  903. LOC_REFERENCE,LOC_MEM :
  904. begin
  905. del_reference(p^.left^.location.reference);
  906. p^.location.registerlow:=getregister32;
  907. p^.location.registerhigh:=getregister32;
  908. emit_mov_ref_reg64(p^.left^.location.reference,
  909. p^.location.registerlow,
  910. p^.location.registerhigh);
  911. emit_reg(A_NOT,S_L,p^.location.registerlow);
  912. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  913. end;
  914. end;
  915. end
  916. else
  917. begin
  918. secondpass(p^.left);
  919. clear_location(p^.location);
  920. p^.location.loc:=LOC_REGISTER;
  921. case p^.left^.location.loc of
  922. LOC_REGISTER :
  923. begin
  924. p^.location.register:=p^.left^.location.register;
  925. emit_reg(A_NOT,S_L,p^.location.register);
  926. end;
  927. LOC_CREGISTER :
  928. begin
  929. p^.location.register:=getregister32;
  930. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,p^.location.register);
  931. emit_reg(A_NOT,S_L,p^.location.register);
  932. end;
  933. LOC_REFERENCE,LOC_MEM :
  934. begin
  935. del_reference(p^.left^.location.reference);
  936. p^.location.register:=getregister32;
  937. emit_ref_reg(A_MOV,S_L,
  938. newreference(p^.left^.location.reference),p^.location.register);
  939. emit_reg(A_NOT,S_L,p^.location.register);
  940. end;
  941. end;
  942. end;
  943. end;
  944. end.
  945. {
  946. $Log$
  947. Revision 1.43 2000-02-18 21:25:48 florian
  948. * fixed a bug in int64/qword handling was a quite ugly one
  949. Revision 1.42 2000/02/09 13:22:47 peter
  950. * log truncated
  951. Revision 1.41 2000/01/27 15:46:00 florian
  952. * slighly improved code for -<qword> and -<int64>
  953. Revision 1.40 2000/01/09 12:35:01 jonas
  954. * changed edi allocation to use getexplicitregister32/ungetregister
  955. (adapted tgeni386 a bit for this) and enabled it by default
  956. * fixed very big and stupid bug of mine in cg386mat that broke the
  957. include() code (and make cycle :( ) if you compiled without
  958. -dnewoptimizations
  959. Revision 1.39 2000/01/09 01:44:20 jonas
  960. + (de)allocation info for EDI to fix reported bug on mailinglist.
  961. Also some (de)allocation info for ESI added. Between -dallocEDI
  962. because at this time of the night bugs could easily slip in ;)
  963. Revision 1.38 2000/01/07 01:14:21 peter
  964. * updated copyright to 2000
  965. Revision 1.37 2000/01/07 00:12:10 peter
  966. * fixed movd isntruction to be A_MOVD instead of A_MOV S_D
  967. Revision 1.36 1999/11/18 15:34:44 pierre
  968. * Notes/Hints for local syms changed to
  969. Set_varstate function
  970. Revision 1.35 1999/11/06 14:34:18 peter
  971. * truncated log to 20 revs
  972. Revision 1.34 1999/09/28 19:43:47 florian
  973. * the maybe_push fix of Pierre wasn't 100%, the tree parameter
  974. must contain a valid location (which is saved if necessary)
  975. Revision 1.33 1999/09/27 23:37:26 peter
  976. * fixed push/restore bug in div/mod
  977. Revision 1.32 1999/09/02 17:07:38 florian
  978. * problems with -Or fixed: tdef.isfpuregable was wrong!
  979. Revision 1.31 1999/08/19 13:08:50 pierre
  980. * emit_??? used
  981. Revision 1.30 1999/08/04 13:45:23 florian
  982. + floating point register variables !!
  983. * pairegalloc is now generated for register variables
  984. Revision 1.29 1999/08/04 00:22:51 florian
  985. * renamed i386asm and i386base to cpuasm and cpubase
  986. Revision 1.28 1999/08/03 22:02:45 peter
  987. * moved bitmask constants to sets
  988. * some other type/const renamings
  989. }