aoptcpu.pas 46 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. function InvertSkipInstruction(var p: tai): boolean;
  32. { uses the same constructor as TAopObj }
  33. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  34. procedure PeepHoleOptPass2;override;
  35. End;
  36. Implementation
  37. uses
  38. cutils,
  39. verbose,
  40. cpuinfo,
  41. aasmbase,aasmcpu,aasmdata,
  42. aoptutils,
  43. globals,globtype,
  44. cgutils;
  45. type
  46. TAsmOpSet = set of TAsmOp;
  47. function CanBeCond(p : tai) : boolean;
  48. begin
  49. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  50. end;
  51. function RefsEqual(const r1, r2: treference): boolean;
  52. begin
  53. refsequal :=
  54. (r1.offset = r2.offset) and
  55. (r1.base = r2.base) and
  56. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  57. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  58. (r1.relsymbol = r2.relsymbol) and
  59. (r1.addressmode = r2.addressmode);
  60. end;
  61. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  62. begin
  63. result:=oper1.typ=oper2.typ;
  64. if result then
  65. case oper1.typ of
  66. top_const:
  67. Result:=oper1.val = oper2.val;
  68. top_reg:
  69. Result:=oper1.reg = oper2.reg;
  70. top_ref:
  71. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  72. else Result:=false;
  73. end
  74. end;
  75. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  76. begin
  77. result := (oper.typ = top_reg) and (oper.reg = reg);
  78. end;
  79. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  80. begin
  81. result :=
  82. (instr.typ = ait_instruction) and
  83. (taicpu(instr).opcode = op);
  84. end;
  85. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  86. begin
  87. result :=
  88. (instr.typ = ait_instruction) and
  89. (taicpu(instr).opcode in ops);
  90. end;
  91. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  92. begin
  93. result :=
  94. (instr.typ = ait_instruction) and
  95. (taicpu(instr).opcode in ops) and
  96. (taicpu(instr).ops=opcount);
  97. end;
  98. {$ifdef DEBUG_AOPTCPU}
  99. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  100. begin
  101. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  102. end;
  103. {$else DEBUG_AOPTCPU}
  104. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  105. begin
  106. end;
  107. {$endif DEBUG_AOPTCPU}
  108. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  109. begin
  110. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  111. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  112. Result:=true
  113. else if (p1.typ = ait_instruction) and (taicpu(p1).opcode=A_MOVW) and
  114. ((TRegister(ord(taicpu(p1).oper[0]^.reg)+1)=reg) or (TRegister(ord(taicpu(p1).oper[1]^.reg)+1)=reg) or
  115. (taicpu(p1).oper[0]^.reg=reg) or (taicpu(p1).oper[1]^.reg=reg)) then
  116. Result:=true
  117. else
  118. Result:=inherited RegInInstruction(Reg, p1);
  119. end;
  120. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  121. var Next: tai; reg: TRegister): Boolean;
  122. begin
  123. Next:=Current;
  124. repeat
  125. Result:=GetNextInstruction(Next,Next);
  126. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  127. (is_calljmp(taicpu(Next).opcode));
  128. end;
  129. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  130. var
  131. p: taicpu;
  132. begin
  133. if not assigned(hp) or
  134. (hp.typ <> ait_instruction) then
  135. begin
  136. Result := false;
  137. exit;
  138. end;
  139. p := taicpu(hp);
  140. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[1]^.reg))) or
  141. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  142. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  143. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  144. end;
  145. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  146. var
  147. p: taicpu;
  148. i: longint;
  149. begin
  150. Result := false;
  151. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  152. exit;
  153. p:=taicpu(hp);
  154. i:=0;
  155. { we do not care about the stack pointer }
  156. if p.opcode in [A_POP] then
  157. exit;
  158. { first operand only written?
  159. then skip it }
  160. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  161. i:=1;
  162. while i<p.ops do
  163. begin
  164. case p.oper[i]^.typ of
  165. top_reg:
  166. Result := (p.oper[i]^.reg = reg) or
  167. { MOVW }
  168. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  169. top_ref:
  170. Result :=
  171. (p.oper[i]^.ref^.base = reg) or
  172. (p.oper[i]^.ref^.index = reg);
  173. end;
  174. { Bailout if we found something }
  175. if Result then
  176. exit;
  177. Inc(i);
  178. end;
  179. end;
  180. {
  181. Turns
  182. sbis ?
  183. jmp .Lx
  184. op
  185. .Lx:
  186. Into
  187. sbic ?
  188. op
  189. For all types of skip instructions
  190. }
  191. function TCpuAsmOptimizer.InvertSkipInstruction(var p: tai): boolean;
  192. function GetNextInstructionWithoutLabel(p: tai; var next: tai): boolean;
  193. begin
  194. repeat
  195. result:=GetNextInstruction(p,next);
  196. p:=next;
  197. until
  198. (not result) or
  199. (not assigned(next)) or
  200. (next.typ in [ait_instruction]);
  201. result:=assigned(next) and (next.typ in [ait_instruction]);
  202. end;
  203. var
  204. hp1, hp2, hp3: tai;
  205. s: string;
  206. begin
  207. result:=false;
  208. if GetNextInstruction(taicpu(p),hp1) and
  209. (hp1.typ=ait_instruction) and
  210. (taicpu(hp1).opcode in [A_RJMP,A_JMP]) and
  211. (taicpu(hp1).ops=1) and
  212. (taicpu(hp1).oper[0]^.typ=top_ref) and
  213. (taicpu(hp1).oper[0]^.ref^.offset=0) and
  214. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  215. GetNextInstructionWithoutLabel(hp1,hp2) and
  216. (hp2.typ=ait_instruction) and
  217. (not taicpu(hp2).is_jmp) and
  218. GetNextInstruction(hp2,hp3) and
  219. FindLabel(TAsmLabel(taicpu(hp1).oper[0]^.ref^.symbol),hp3) then
  220. begin
  221. DebugMsg('SkipJump2InvertedSkip', p);
  222. case taicpu(p).opcode of
  223. A_SBIS: taicpu(p).opcode:=A_SBIC;
  224. A_SBIC: taicpu(p).opcode:=A_SBIS;
  225. A_SBRS: taicpu(p).opcode:=A_SBRC;
  226. A_SBRC: taicpu(p).opcode:=A_SBRS;
  227. end;
  228. TAsmLabel(taicpu(hp1).oper[0]^.ref^.symbol).decrefs;
  229. asml.remove(hp1);
  230. hp1.free;
  231. end;
  232. end;
  233. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  234. var
  235. hp1,hp2,hp3,hp4,hp5: tai;
  236. alloc, dealloc: tai_regalloc;
  237. i: integer;
  238. l: TAsmLabel;
  239. TmpUsedRegs : TAllUsedRegs;
  240. begin
  241. result := false;
  242. case p.typ of
  243. ait_instruction:
  244. begin
  245. {
  246. change
  247. <op> reg,x,y
  248. cp reg,r1
  249. into
  250. <op>s reg,x,y
  251. }
  252. { this optimization can applied only to the currently enabled operations because
  253. the other operations do not update all flags and FPC does not track flag usage }
  254. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  255. A_INC,A_LSL,A_LSR,
  256. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  257. GetNextInstruction(p, hp1) and
  258. ((MatchInstruction(hp1, A_CP) and
  259. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  260. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  261. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  262. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  263. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  264. A_LSL,A_LSR,
  265. A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
  266. (MatchInstruction(hp1, A_CPI) and
  267. (taicpu(p).opcode = A_ANDI) and
  268. (taicpu(p).oper[1]^.typ=top_const) and
  269. (taicpu(hp1).oper[1]^.typ=top_const) and
  270. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  271. GetNextInstruction(hp1, hp2) and
  272. { be careful here, following instructions could use other flags
  273. however after a jump fpc never depends on the value of flags }
  274. { All above instructions set Z and N according to the following
  275. Z := result = 0;
  276. N := result[31];
  277. EQ = Z=1; NE = Z=0;
  278. MI = N=1; PL = N=0; }
  279. MatchInstruction(hp2, A_BRxx) and
  280. ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
  281. { sub/sbc set all flags }
  282. (taicpu(p).opcode in [A_SUB,A_SBI])){ and
  283. no flag allocation tracking implemented yet on avr
  284. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  285. begin
  286. { move flag allocation if possible }
  287. { no flag allocation tracking implemented yet on avr
  288. GetLastInstruction(hp1, hp2);
  289. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  290. if assigned(hp2) then
  291. begin
  292. asml.Remove(hp2);
  293. asml.insertbefore(hp2, p);
  294. end;
  295. }
  296. // If we compare to the same value we are masking then invert the comparison
  297. if (taicpu(hp1).opcode=A_CPI) or
  298. { sub/sbc with reverted? }
  299. ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
  300. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  301. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  302. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  303. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  304. DebugMsg('Peephole OpCp2Op performed', p);
  305. asml.remove(hp1);
  306. hp1.free;
  307. Result:=true;
  308. end
  309. else
  310. case taicpu(p).opcode of
  311. A_LDI:
  312. begin
  313. { turn
  314. ldi reg0, imm
  315. cp/mov reg1, reg0
  316. dealloc reg0
  317. into
  318. cpi/ldi reg1, imm
  319. }
  320. if MatchOpType(taicpu(p),top_reg,top_const) and
  321. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  322. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  323. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  324. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  325. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  326. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  327. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  328. begin
  329. CopyUsedRegs(TmpUsedRegs);
  330. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  331. begin
  332. case taicpu(hp1).opcode of
  333. A_CP:
  334. taicpu(hp1).opcode:=A_CPI;
  335. A_MOV:
  336. taicpu(hp1).opcode:=A_LDI;
  337. else
  338. internalerror(2016111901);
  339. end;
  340. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  341. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  342. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  343. if assigned(alloc) and assigned(dealloc) then
  344. begin
  345. asml.Remove(alloc);
  346. alloc.Free;
  347. asml.Remove(dealloc);
  348. dealloc.Free;
  349. end;
  350. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  351. RemoveCurrentP(p);
  352. end;
  353. ReleaseUsedRegs(TmpUsedRegs);
  354. end;
  355. end;
  356. A_STS:
  357. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  358. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  359. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  360. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  361. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  362. (taicpu(p).oper[0]^.ref^.offset>=32) and
  363. (taicpu(p).oper[0]^.ref^.offset<=95) then
  364. begin
  365. DebugMsg('Peephole Sts2Out performed', p);
  366. taicpu(p).opcode:=A_OUT;
  367. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  368. end;
  369. A_LDS:
  370. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  371. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  372. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  373. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  374. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  375. (taicpu(p).oper[1]^.ref^.offset>=32) and
  376. (taicpu(p).oper[1]^.ref^.offset<=95) then
  377. begin
  378. DebugMsg('Peephole Lds2In performed', p);
  379. taicpu(p).opcode:=A_IN;
  380. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  381. end;
  382. A_IN:
  383. if GetNextInstruction(p,hp1) then
  384. begin
  385. {
  386. in rX,Y
  387. ori rX,n
  388. out Y,rX
  389. into
  390. sbi rX,lg(n)
  391. }
  392. if (taicpu(p).oper[1]^.val<=31) and
  393. MatchInstruction(hp1,A_ORI) and
  394. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  395. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  396. GetNextInstruction(hp1,hp2) and
  397. MatchInstruction(hp2,A_OUT) and
  398. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  399. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  400. begin
  401. DebugMsg('Peephole InOriOut2Sbi performed', p);
  402. taicpu(p).opcode:=A_SBI;
  403. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  404. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  405. asml.Remove(hp1);
  406. hp1.Free;
  407. asml.Remove(hp2);
  408. hp2.Free;
  409. result:=true;
  410. end
  411. {
  412. in rX,Y
  413. andi rX,not(n)
  414. out Y,rX
  415. into
  416. cbi rX,lg(n)
  417. }
  418. else if (taicpu(p).oper[1]^.val<=31) and
  419. MatchInstruction(hp1,A_ANDI) and
  420. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  421. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  422. GetNextInstruction(hp1,hp2) and
  423. MatchInstruction(hp2,A_OUT) and
  424. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  425. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  426. begin
  427. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  428. taicpu(p).opcode:=A_CBI;
  429. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  430. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  431. asml.Remove(hp1);
  432. hp1.Free;
  433. asml.Remove(hp2);
  434. hp2.Free;
  435. result:=true;
  436. end
  437. {
  438. in rX,Y
  439. andi rX,n
  440. breq/brne L1
  441. into
  442. sbis/sbic Y,lg(n)
  443. jmp L1
  444. .Ltemp:
  445. }
  446. else if (taicpu(p).oper[1]^.val<=31) and
  447. MatchInstruction(hp1,A_ANDI) and
  448. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  449. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  450. GetNextInstruction(hp1,hp2) and
  451. MatchInstruction(hp2,A_BRxx) and
  452. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  453. begin
  454. if taicpu(hp2).condition=C_EQ then
  455. taicpu(p).opcode:=A_SBIS
  456. else
  457. taicpu(p).opcode:=A_SBIC;
  458. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  459. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  460. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  461. asml.Remove(hp1);
  462. hp1.Free;
  463. taicpu(hp2).condition:=C_None;
  464. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  465. taicpu(hp2).opcode:=A_JMP
  466. else
  467. taicpu(hp2).opcode:=A_RJMP;
  468. current_asmdata.getjumplabel(l);
  469. l.increfs;
  470. asml.InsertAfter(tai_label.create(l), hp2);
  471. result:=true;
  472. end;
  473. end;
  474. A_SBRS,
  475. A_SBRC:
  476. begin
  477. {
  478. Turn
  479. in rx, y
  480. sbr* rx, z
  481. Into
  482. sbi* y, z
  483. }
  484. if (taicpu(p).ops=2) and
  485. (taicpu(p).oper[0]^.typ=top_reg) and
  486. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  487. GetLastInstruction(p,hp1) and
  488. (hp1.typ=ait_instruction) and
  489. (taicpu(hp1).opcode=A_IN) and
  490. (taicpu(hp1).ops=2) and
  491. (taicpu(hp1).oper[1]^.typ=top_const) and
  492. (taicpu(hp1).oper[1]^.val in [0..31]) and
  493. MatchOperand(taicpu(hp1).oper[0]^,taicpu(p).oper[0]^.reg) and
  494. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, hp1, p)) then
  495. begin
  496. if taicpu(p).opcode=A_SBRS then
  497. taicpu(p).opcode:=A_SBIS
  498. else
  499. taicpu(p).opcode:=A_SBIC;
  500. taicpu(p).loadconst(0, taicpu(hp1).oper[1]^.val);
  501. DebugMsg('Peephole InSbrx2Sbix performed', p);
  502. asml.Remove(hp1);
  503. hp1.free;
  504. result:=true;
  505. end;
  506. if InvertSkipInstruction(p) then
  507. result:=true;
  508. end;
  509. A_ANDI:
  510. begin
  511. {
  512. Turn
  513. andi rx, #pow2
  514. brne l
  515. <op>
  516. l:
  517. Into
  518. sbrs rx, #(1 shl imm)
  519. <op>
  520. l:
  521. }
  522. if (taicpu(p).ops=2) and
  523. (taicpu(p).oper[1]^.typ=top_const) and
  524. ispowerof2(taicpu(p).oper[1]^.val,i) and
  525. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  526. GetNextInstruction(p,hp1) and
  527. (hp1.typ=ait_instruction) and
  528. (taicpu(hp1).opcode=A_BRxx) and
  529. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  530. (taicpu(hp1).ops>0) and
  531. (taicpu(hp1).oper[0]^.typ = top_ref) and
  532. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  533. GetNextInstruction(hp1,hp2) and
  534. (hp2.typ=ait_instruction) and
  535. GetNextInstruction(hp2,hp3) and
  536. (hp3.typ=ait_label) and
  537. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  538. begin
  539. DebugMsg('Peephole AndiBr2Sbr performed', p);
  540. taicpu(p).oper[1]^.val:=i;
  541. if taicpu(hp1).condition=C_NE then
  542. taicpu(p).opcode:=A_SBRS
  543. else
  544. taicpu(p).opcode:=A_SBRC;
  545. asml.Remove(hp1);
  546. hp1.free;
  547. result:=true;
  548. end
  549. {
  550. Remove
  551. andi rx, #y
  552. dealloc rx
  553. }
  554. else if (taicpu(p).ops=2) and
  555. (taicpu(p).oper[0]^.typ=top_reg) and
  556. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  557. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  558. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  559. begin
  560. DebugMsg('Redundant Andi removed', p);
  561. result:=RemoveCurrentP(p);
  562. end;
  563. end;
  564. A_ADD:
  565. begin
  566. if (taicpu(p).oper[1]^.reg=NR_R1) and
  567. GetNextInstruction(p, hp1) and
  568. MatchInstruction(hp1,A_ADC) then
  569. begin
  570. DebugMsg('Peephole AddAdc2Add performed', p);
  571. result:=RemoveCurrentP(p);
  572. end;
  573. end;
  574. A_SUB:
  575. begin
  576. if (taicpu(p).oper[1]^.reg=NR_R1) and
  577. GetNextInstruction(p, hp1) and
  578. MatchInstruction(hp1,A_SBC) then
  579. begin
  580. DebugMsg('Peephole SubSbc2Sub performed', p);
  581. taicpu(hp1).opcode:=A_SUB;
  582. result:=RemoveCurrentP(p);
  583. end;
  584. end;
  585. A_CLR:
  586. begin
  587. { turn the common
  588. clr rX
  589. mov/ld rX, rY
  590. into
  591. mov/ld rX, rY
  592. }
  593. if (taicpu(p).ops=1) and
  594. (taicpu(p).oper[0]^.typ=top_reg) and
  595. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  596. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  597. (hp1.typ=ait_instruction) and
  598. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  599. (taicpu(hp1).ops>0) and
  600. (taicpu(hp1).oper[0]^.typ=top_reg) and
  601. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  602. begin
  603. DebugMsg('Peephole ClrMov2Mov performed', p);
  604. result:=RemoveCurrentP(p);
  605. end
  606. { turn
  607. clr rX
  608. ...
  609. adc rY, rX
  610. into
  611. ...
  612. adc rY, r1
  613. }
  614. else if (taicpu(p).ops=1) and
  615. (taicpu(p).oper[0]^.typ=top_reg) and
  616. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  617. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  618. (hp1.typ=ait_instruction) and
  619. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  620. (taicpu(hp1).ops=2) and
  621. (taicpu(hp1).oper[1]^.typ=top_reg) and
  622. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  623. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  624. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  625. begin
  626. DebugMsg('Peephole ClrAdc2Adc performed', p);
  627. taicpu(hp1).oper[1]^.reg:=NR_R1;
  628. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  629. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  630. if assigned(alloc) and assigned(dealloc) then
  631. begin
  632. asml.Remove(alloc);
  633. alloc.Free;
  634. asml.Remove(dealloc);
  635. dealloc.Free;
  636. end;
  637. result:=RemoveCurrentP(p);
  638. end;
  639. end;
  640. A_PUSH:
  641. begin
  642. { turn
  643. push reg0
  644. push reg1
  645. pop reg3
  646. pop reg2
  647. into
  648. movw reg2,reg0
  649. or
  650. mov reg3,reg1
  651. mov reg2,reg0
  652. }
  653. if GetNextInstruction(p,hp1) and
  654. MatchInstruction(hp1,A_PUSH) and
  655. GetNextInstruction(hp1,hp2) and
  656. MatchInstruction(hp2,A_POP) and
  657. GetNextInstruction(hp2,hp3) and
  658. MatchInstruction(hp3,A_POP) then
  659. begin
  660. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  661. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  662. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  663. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  664. begin
  665. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  666. taicpu(hp3).ops:=2;
  667. taicpu(hp3).opcode:=A_MOVW;
  668. taicpu(hp3).loadreg(1, taicpu(p).oper[0]^.reg);
  669. RemoveCurrentP(p);
  670. RemoveCurrentP(p);
  671. result:=RemoveCurrentP(p);
  672. end
  673. else
  674. begin
  675. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  676. taicpu(p).ops:=2;
  677. taicpu(p).opcode:=A_MOV;
  678. taicpu(hp1).ops:=2;
  679. taicpu(hp1).opcode:=A_MOV;
  680. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  681. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  682. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  683. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  684. { life range of reg2 and reg3 is increased, fix register allocation entries }
  685. CopyUsedRegs(TmpUsedRegs);
  686. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  687. AllocRegBetween(taicpu(hp2).oper[0]^.reg,hp1,hp2,TmpUsedRegs);
  688. ReleaseUsedRegs(TmpUsedRegs);
  689. CopyUsedRegs(TmpUsedRegs);
  690. AllocRegBetween(taicpu(hp3).oper[0]^.reg,p,hp3,TmpUsedRegs);
  691. ReleaseUsedRegs(TmpUsedRegs);
  692. IncludeRegInUsedRegs(taicpu(hp3).oper[0]^.reg,UsedRegs);
  693. UpdateUsedRegs(tai(p.Next));
  694. asml.Remove(hp2);
  695. hp2.Free;
  696. asml.Remove(hp3);
  697. hp3.Free;
  698. result:=true;
  699. end
  700. end;
  701. end;
  702. A_CALL:
  703. if (cs_opt_level4 in current_settings.optimizerswitches) and
  704. GetNextInstruction(p,hp1) and
  705. MatchInstruction(hp1,A_RET) then
  706. begin
  707. DebugMsg('Peephole CallReg2Jmp performed', p);
  708. taicpu(p).opcode:=A_JMP;
  709. asml.Remove(hp1);
  710. hp1.Free;
  711. result:=true;
  712. end;
  713. A_RCALL:
  714. if (cs_opt_level4 in current_settings.optimizerswitches) and
  715. GetNextInstruction(p,hp1) and
  716. MatchInstruction(hp1,A_RET) then
  717. begin
  718. DebugMsg('Peephole RCallReg2RJmp performed', p);
  719. taicpu(p).opcode:=A_RJMP;
  720. asml.Remove(hp1);
  721. hp1.Free;
  722. result:=true;
  723. end;
  724. A_MOV:
  725. begin
  726. { change
  727. mov reg0, reg1
  728. dealloc reg0
  729. into
  730. dealloc reg0
  731. }
  732. if MatchOpType(taicpu(p),top_reg,top_reg) then
  733. begin
  734. CopyUsedRegs(TmpUsedRegs);
  735. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  736. if not(RegInUsedRegs(taicpu(p).oper[0]^.reg,TmpUsedRegs)) and
  737. { reg. allocation information before calls is not perfect, so don't do this before
  738. calls/icalls }
  739. GetNextInstruction(p,hp1) and
  740. not(MatchInstruction(hp1,[A_CALL,A_RCALL])) then
  741. begin
  742. DebugMsg('Peephole Mov2Nop performed', p);
  743. result:=RemoveCurrentP(p);
  744. ReleaseUsedRegs(TmpUsedRegs);
  745. exit;
  746. end;
  747. ReleaseUsedRegs(TmpUsedRegs);
  748. end;
  749. { turn
  750. mov reg0, reg1
  751. <op> reg2,reg0
  752. dealloc reg0
  753. into
  754. <op> reg2,reg1
  755. }
  756. if MatchOpType(taicpu(p),top_reg,top_reg) and
  757. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  758. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  759. (MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  760. A_OUT,A_IN]) or
  761. { the reference register of ST/STD cannot be replaced }
  762. (MatchInstruction(hp1,[A_STD,A_ST]) and (MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)))) and
  763. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  764. {(taicpu(hp1).ops=1) and
  765. (taicpu(hp1).oper[0]^.typ = top_reg) and
  766. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  767. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  768. begin
  769. DebugMsg('Peephole MovOp2Op performed', p);
  770. for i := 0 to taicpu(hp1).ops-1 do
  771. if taicpu(hp1).oper[i]^.typ=top_reg then
  772. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  773. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  774. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  775. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  776. if assigned(alloc) and assigned(dealloc) then
  777. begin
  778. asml.Remove(alloc);
  779. alloc.Free;
  780. asml.Remove(dealloc);
  781. dealloc.Free;
  782. end;
  783. { life range of reg1 is increased }
  784. AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,usedregs);
  785. { p will be removed, update used register as we continue
  786. with the next instruction after p }
  787. result:=RemoveCurrentP(p);
  788. end
  789. { remove
  790. mov reg0,reg0
  791. }
  792. else if (taicpu(p).ops=2) and
  793. (taicpu(p).oper[0]^.typ = top_reg) and
  794. (taicpu(p).oper[1]^.typ = top_reg) and
  795. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  796. begin
  797. DebugMsg('Peephole RedundantMov performed', p);
  798. result:=RemoveCurrentP(p);
  799. end
  800. {
  801. Turn
  802. mov rx,ry
  803. op rx,rz
  804. mov ry, rx
  805. Into
  806. op ry,rz
  807. }
  808. else if (taicpu(p).ops=2) and
  809. MatchOpType(taicpu(p),top_reg,top_reg) and
  810. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  811. (hp1.typ=ait_instruction) and
  812. (taicpu(hp1).ops >= 1) and
  813. (taicpu(hp1).oper[0]^.typ = top_reg) and
  814. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  815. MatchInstruction(hp2,A_MOV) and
  816. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  817. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  818. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  819. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  820. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  821. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  822. A_INC,A_DEC,
  823. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  824. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  825. begin
  826. DebugMsg('Peephole MovOpMov2Op performed', p);
  827. if (taicpu(hp1).ops=2) and
  828. (taicpu(hp1).oper[1]^.typ=top_reg) and
  829. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  830. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  831. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  832. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  833. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  834. if assigned(alloc) and assigned(dealloc) then
  835. begin
  836. asml.Remove(alloc);
  837. alloc.Free;
  838. asml.Remove(dealloc);
  839. dealloc.Free;
  840. end;
  841. asml.remove(hp2);
  842. hp2.free;
  843. result:=RemoveCurrentP(p);
  844. end
  845. {
  846. Turn
  847. mov rx,ry
  848. op rx,rw
  849. mov rw,rx
  850. Into
  851. op rw,ry
  852. }
  853. else if (taicpu(p).ops=2) and
  854. MatchOpType(taicpu(p),top_reg,top_reg) and
  855. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  856. (hp1.typ=ait_instruction) and
  857. (taicpu(hp1).ops = 2) and
  858. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  859. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  860. (hp2.typ=ait_instruction) and
  861. (taicpu(hp2).opcode=A_MOV) and
  862. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  863. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  864. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  865. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  866. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  867. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  868. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  869. begin
  870. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  871. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  872. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  873. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  874. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  875. if assigned(alloc) and assigned(dealloc) then
  876. begin
  877. asml.Remove(alloc);
  878. alloc.Free;
  879. asml.Remove(dealloc);
  880. dealloc.Free;
  881. end;
  882. result:=RemoveCurrentP(p);
  883. asml.remove(hp2);
  884. hp2.free;
  885. end
  886. { fold
  887. mov reg2,reg0
  888. mov reg3,reg1
  889. to
  890. movw reg2,reg0
  891. }
  892. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  893. (taicpu(p).ops=2) and
  894. (taicpu(p).oper[0]^.typ = top_reg) and
  895. (taicpu(p).oper[1]^.typ = top_reg) and
  896. getnextinstruction(p,hp1) and
  897. (hp1.typ = ait_instruction) and
  898. (taicpu(hp1).opcode = A_MOV) and
  899. (taicpu(hp1).ops=2) and
  900. (taicpu(hp1).oper[0]^.typ = top_reg) and
  901. (taicpu(hp1).oper[1]^.typ = top_reg) and
  902. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  903. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  904. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  905. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  906. begin
  907. DebugMsg('Peephole MovMov2Movw performed', p);
  908. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  909. if assigned(alloc) then
  910. begin
  911. asml.Remove(alloc);
  912. asml.InsertBefore(alloc,p);
  913. { proper book keeping of currently used registers }
  914. IncludeRegInUsedRegs(taicpu(hp1).oper[0]^.reg,UsedRegs);
  915. end;
  916. taicpu(p).opcode:=A_MOVW;
  917. asml.remove(hp1);
  918. hp1.free;
  919. result:=true;
  920. end
  921. {
  922. This removes the first mov from
  923. mov rX,...
  924. mov rX,...
  925. }
  926. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  927. while MatchInstruction(hp1,A_MOV) and
  928. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  929. { don't remove the first mov if the second is a mov rX,rX }
  930. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  931. begin
  932. DebugMsg('Peephole MovMov2Mov performed', p);
  933. result:=RemoveCurrentP(p);
  934. GetNextInstruction(hp1,hp1);
  935. if not assigned(hp1) then
  936. break;
  937. end;
  938. end;
  939. A_SBIC,
  940. A_SBIS:
  941. begin
  942. {
  943. Turn
  944. sbic/sbis X, y
  945. jmp .L1
  946. op
  947. .L1:
  948. into
  949. sbis/sbic X,y
  950. op
  951. .L1:
  952. }
  953. if InvertSkipInstruction(p) then
  954. result:=true
  955. {
  956. Turn
  957. sbiX X, y
  958. jmp .L1
  959. jmp .L2
  960. .L1:
  961. op
  962. .L2:
  963. into
  964. sbiX X,y
  965. .L1:
  966. op
  967. .L2:
  968. }
  969. else if GetNextInstruction(p, hp1) and
  970. (hp1.typ=ait_instruction) and
  971. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  972. (taicpu(hp1).ops>0) and
  973. (taicpu(hp1).oper[0]^.typ = top_ref) and
  974. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  975. GetNextInstruction(hp1, hp2) and
  976. (hp2.typ=ait_instruction) and
  977. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  978. (taicpu(hp2).ops>0) and
  979. (taicpu(hp2).oper[0]^.typ = top_ref) and
  980. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  981. GetNextInstruction(hp2, hp3) and
  982. (hp3.typ=ait_label) and
  983. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  984. GetNextInstruction(hp3, hp4) and
  985. (hp4.typ=ait_instruction) and
  986. GetNextInstruction(hp4, hp5) and
  987. (hp3.typ=ait_label) and
  988. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  989. begin
  990. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  991. tai_label(hp3).labsym.decrefs;
  992. tai_label(hp5).labsym.decrefs;
  993. AsmL.remove(hp1);
  994. taicpu(hp1).Free;
  995. AsmL.remove(hp2);
  996. taicpu(hp2).Free;
  997. result:=true;
  998. end;
  999. end;
  1000. end;
  1001. end;
  1002. end;
  1003. end;
  1004. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  1005. begin
  1006. end;
  1007. begin
  1008. casmoptimizer:=TCpuAsmOptimizer;
  1009. End.