cpubase.pas 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461
  1. {
  2. Copyright (c) 2006 by Florian Klaempfl
  3. Contains the base types for the AVR
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# Base unit for processor information. This unit contains
  18. enumerations of registers, opcodes, sizes, and other
  19. such things which are processor specific.
  20. }
  21. unit cpubase;
  22. {$i fpcdefs.inc}
  23. interface
  24. uses
  25. cutils,cclasses,
  26. globtype,globals,
  27. cpuinfo,
  28. aasmbase,
  29. cgbase
  30. ;
  31. {*****************************************************************************
  32. Assembler Opcodes
  33. *****************************************************************************}
  34. type
  35. TAsmOp=(A_None,
  36. A_ADD,A_ADC,A_ADIW,A_SUB,A_SUBI,A_SBC,A_SBCI,A_SBRC,A_SBRS,A_CLC,A_SEC,A_SBIW,A_AND,A_ANDI,
  37. A_OR,A_ORI,A_EOR,A_COM,A_NEG,A_SBR,A_CBR,A_INC,A_DEC,A_TST,A_CLR,
  38. A_SER,A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU,A_RJMP,A_IJMP,
  39. A_EIJMP,A_JMP,A_RCALL,A_ICALL,R_EICALL,A_CALL,A_RET,A_RETI,A_CPSE,
  40. A_CP,A_CPC,A_CPI,A_SBIC,A_SBIS,A_BRxx,A_MOV,A_MOVW,A_LDI,A_LDS,A_LD,A_LDD,
  41. A_STS,A_ST,A_STD,A_LPM,A_ELPM,A_SPM,A_IN,A_OUT,A_PUSH,A_POP,
  42. A_LSL,A_LSR,A_ROL,A_ROR,A_ASR,A_SWAP,A_BSET,A_BCLR,A_SBI,A_CBI,
  43. A_BST,A_BLD,A_Sxx,A_CLI,A_BRAK,A_NOP,A_SLEEP,A_WDR);
  44. { This should define the array of instructions as string }
  45. op2strtable=array[tasmop] of string[11];
  46. const
  47. { First value of opcode enumeration }
  48. firstop = low(tasmop);
  49. { Last value of opcode enumeration }
  50. lastop = high(tasmop);
  51. jmp_instructions = [A_BRxx,A_SBIC,A_SBIS,A_JMP,A_RCALL,A_ICALL,A_EIJMP,
  52. A_RJMP,A_CALL,A_RET,A_RETI,A_CPSE,A_IJMP];
  53. {*****************************************************************************
  54. Registers
  55. *****************************************************************************}
  56. type
  57. { Number of registers used for indexing in tables }
  58. tregisterindex=0..{$i ravrnor.inc}-1;
  59. const
  60. { Available Superregisters }
  61. {$i ravrsup.inc}
  62. { No Subregisters }
  63. R_SUBWHOLE = R_SUBNONE;
  64. { Available Registers }
  65. {$i ravrcon.inc}
  66. NR_XLO = NR_R26;
  67. NR_XHI = NR_R27;
  68. NR_YLO = NR_R28;
  69. NR_YHI = NR_R29;
  70. NR_ZLO = NR_R30;
  71. NR_ZHI = NR_R31;
  72. NIO_SREG = $3f;
  73. NIO_SP_LO = $3d;
  74. NIO_SP_HI = $3e;
  75. { Integer Super registers first and last }
  76. first_int_supreg = RS_R0;
  77. first_int_imreg = $20;
  78. { Float Super register first and last }
  79. first_fpu_supreg = RS_INVALID;
  80. first_fpu_imreg = RS_INVALID;
  81. { MM Super register first and last }
  82. first_mm_supreg = RS_INVALID;
  83. first_mm_imreg = RS_INVALID;
  84. regnumber_count_bsstart = 32;
  85. regnumber_table : array[tregisterindex] of tregister = (
  86. {$i ravrnum.inc}
  87. );
  88. regstabs_table : array[tregisterindex] of shortint = (
  89. {$i ravrsta.inc}
  90. );
  91. regdwarf_table : array[tregisterindex] of shortint = (
  92. {$i ravrdwa.inc}
  93. );
  94. { registers which may be destroyed by calls }
  95. VOLATILE_INTREGISTERS = [RS_R0,RS_R1,RS_R8..RS_R27,RS_R30,RS_R31];
  96. VOLATILE_FPUREGISTERS = [];
  97. type
  98. totherregisterset = set of tregisterindex;
  99. {*****************************************************************************
  100. Conditions
  101. *****************************************************************************}
  102. type
  103. TAsmCond=(C_None,
  104. C_CC,C_CS,C_EQ,C_GE,C_HC,C_HS,C_ID,C_IE,C_LO,C_LT,
  105. C_MI,C_NE,C_PL,C_SH,C_TC,C_TS,C_VC,C_VS
  106. );
  107. const
  108. cond2str : array[TAsmCond] of string[2]=('',
  109. 'cc','cs','eq','ge','hc','hs','id','ie','lo','lt',
  110. 'mi','ne','pl','sh','tc','ts','vc','vs'
  111. );
  112. uppercond2str : array[TAsmCond] of string[2]=('',
  113. 'CC','CS','EQ','GE','HC','HS','ID','IE','LO','LT',
  114. 'MI','NE','PL','SH','TC','TS','VC','VS'
  115. );
  116. {*****************************************************************************
  117. Flags
  118. *****************************************************************************}
  119. type
  120. TResFlags = (F_NotPossible,F_CC,F_CS,F_EQ,F_GE,F_LO,F_LT,
  121. F_NE,F_SH,F_VC,F_VS);
  122. {*****************************************************************************
  123. Operands
  124. *****************************************************************************}
  125. taddressmode = (AM_UNCHANGED,AM_POSTINCREMENT,AM_PREDRECEMENT);
  126. {*****************************************************************************
  127. Constants
  128. *****************************************************************************}
  129. const
  130. max_operands = 4;
  131. maxintregs = 15;
  132. maxfpuregs = 0;
  133. maxaddrregs = 0;
  134. {*****************************************************************************
  135. Operand Sizes
  136. *****************************************************************************}
  137. type
  138. topsize = (S_NO,
  139. S_B,S_W,S_L,S_BW,S_BL,S_WL,
  140. S_IS,S_IL,S_IQ,
  141. S_FS,S_FL,S_FX,S_D,S_Q,S_FV,S_FXX
  142. );
  143. {*****************************************************************************
  144. Constants
  145. *****************************************************************************}
  146. const
  147. firstsaveintreg = RS_R4;
  148. lastsaveintreg = RS_R10;
  149. firstsavefpureg = RS_INVALID;
  150. lastsavefpureg = RS_INVALID;
  151. firstsavemmreg = RS_INVALID;
  152. lastsavemmreg = RS_INVALID;
  153. maxvarregs = 7;
  154. varregs : Array [1..maxvarregs] of tsuperregister =
  155. (RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,RS_R10);
  156. maxfpuvarregs = 1;
  157. fpuvarregs : Array [1..maxfpuvarregs] of tsuperregister =
  158. (RS_INVALID);
  159. {*****************************************************************************
  160. Default generic sizes
  161. *****************************************************************************}
  162. { Defines the default address size for a processor, }
  163. OS_ADDR = OS_16;
  164. { the natural int size for a processor, }
  165. OS_INT = OS_16;
  166. OS_SINT = OS_S16;
  167. { the maximum float size for a processor, }
  168. OS_FLOAT = OS_F64;
  169. { the size of a vector register for a processor }
  170. OS_VECTOR = OS_M32;
  171. {*****************************************************************************
  172. Generic Register names
  173. *****************************************************************************}
  174. { Stack pointer register }
  175. NR_STACK_POINTER_REG = NR_R13;
  176. RS_STACK_POINTER_REG = RS_R13;
  177. { Frame pointer register }
  178. RS_FRAME_POINTER_REG = RS_R28;
  179. NR_FRAME_POINTER_REG = NR_R28;
  180. { Register for addressing absolute data in a position independant way,
  181. such as in PIC code. The exact meaning is ABI specific. For
  182. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  183. }
  184. NR_PIC_OFFSET_REG = NR_R9;
  185. { Results are returned in this register (32-bit values) }
  186. NR_FUNCTION_RETURN_REG = NR_R0;
  187. RS_FUNCTION_RETURN_REG = RS_R0;
  188. { Low part of 64bit return value }
  189. NR_FUNCTION_RETURN64_LOW_REG = NR_R0;
  190. RS_FUNCTION_RETURN64_LOW_REG = RS_R0;
  191. { High part of 64bit return value }
  192. NR_FUNCTION_RETURN64_HIGH_REG = NR_R1;
  193. RS_FUNCTION_RETURN64_HIGH_REG = RS_R1;
  194. { The value returned from a function is available in this register }
  195. NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
  196. RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
  197. { The lowh part of 64bit value returned from a function }
  198. NR_FUNCTION_RESULT64_LOW_REG = NR_FUNCTION_RETURN64_LOW_REG;
  199. RS_FUNCTION_RESULT64_LOW_REG = RS_FUNCTION_RETURN64_LOW_REG;
  200. { The high part of 64bit value returned from a function }
  201. NR_FUNCTION_RESULT64_HIGH_REG = NR_FUNCTION_RETURN64_HIGH_REG;
  202. RS_FUNCTION_RESULT64_HIGH_REG = RS_FUNCTION_RETURN64_HIGH_REG;
  203. NR_FPU_RESULT_REG = NR_NO;
  204. NR_MM_RESULT_REG = NR_NO;
  205. NR_RETURN_ADDRESS_REG = NR_FUNCTION_RETURN_REG;
  206. { Offset where the parent framepointer is pushed }
  207. PARENT_FRAMEPOINTER_OFFSET = 0;
  208. {*****************************************************************************
  209. GCC /ABI linking information
  210. *****************************************************************************}
  211. const
  212. { Registers which must be saved when calling a routine declared as
  213. cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
  214. saved should be the ones as defined in the target ABI and / or GCC.
  215. This value can be deduced from the CALLED_USED_REGISTERS array in the
  216. GCC source.
  217. }
  218. { on avr, gen_entry/gen_exit code saves/restores registers, so
  219. we don't need this array }
  220. saved_standard_registers : array[0..0] of tsuperregister =
  221. (RS_INVALID);
  222. { Required parameter alignment when calling a routine declared as
  223. stdcall and cdecl. The alignment value should be the one defined
  224. by GCC or the target ABI.
  225. The value of this constant is equal to the constant
  226. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  227. }
  228. std_param_align = 4;
  229. saved_mm_registers : array[0..0] of tsuperregister = (RS_INVALID);
  230. {*****************************************************************************
  231. Helpers
  232. *****************************************************************************}
  233. { Returns the tcgsize corresponding with the size of reg.}
  234. function reg_cgsize(const reg: tregister) : tcgsize;
  235. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  236. procedure inverse_flags(var f: TResFlags);
  237. function flags_to_cond(const f: TResFlags) : TAsmCond;
  238. function findreg_by_number(r:Tregister):tregisterindex;
  239. function std_regnum_search(const s:string):Tregister;
  240. function std_regname(r:Tregister):string;
  241. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  242. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  243. function dwarf_reg(r:tregister):byte;
  244. function GetHigh(const r : TRegister) : TRegister;
  245. { returns the next virtual register }
  246. function GetNextReg(const r : TRegister) : TRegister;
  247. { returns the last virtual register }
  248. function GetLastReg(const r : TRegister) : TRegister;
  249. function GetOffsetReg(const r : TRegister;ofs : shortint) : TRegister;
  250. implementation
  251. uses
  252. rgBase,verbose;
  253. const
  254. std_regname_table : array[tregisterindex] of string[7] = (
  255. {$i ravrstd.inc}
  256. );
  257. regnumber_index : array[tregisterindex] of tregisterindex = (
  258. {$i ravrrni.inc}
  259. );
  260. std_regname_index : array[tregisterindex] of tregisterindex = (
  261. {$i ravrsri.inc}
  262. );
  263. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  264. begin
  265. cgsize2subreg:=R_SUBWHOLE;
  266. end;
  267. function reg_cgsize(const reg: tregister): tcgsize;
  268. begin
  269. case getregtype(reg) of
  270. R_INTREGISTER :
  271. reg_cgsize:=OS_8;
  272. R_ADDRESSREGISTER :
  273. reg_cgsize:=OS_16;
  274. else
  275. internalerror(2011021905);
  276. end;
  277. end;
  278. procedure inverse_flags(var f: TResFlags);
  279. const
  280. inv_flags: array[TResFlags] of TResFlags =
  281. (F_NotPossible,F_CS,F_CC,F_NE,F_LT,F_SH,F_GE,
  282. F_NE,F_LO,F_VS,F_VC);
  283. begin
  284. f:=inv_flags[f];
  285. end;
  286. function flags_to_cond(const f: TResFlags) : TAsmCond;
  287. const
  288. flag_2_cond: array[F_CC..F_VS] of TAsmCond =
  289. (C_CC,C_CS,C_EQ,C_GE,C_LO,C_LT,
  290. C_NE,C_SH,C_VC,C_VS);
  291. begin
  292. if f=F_NotPossible then
  293. internalerror(2011022101);
  294. if f>high(flag_2_cond) then
  295. internalerror(200112301);
  296. result:=flag_2_cond[f];
  297. end;
  298. function findreg_by_number(r:Tregister):tregisterindex;
  299. begin
  300. result:=rgBase.findreg_by_number_table(r,regnumber_index);
  301. end;
  302. function std_regnum_search(const s:string):Tregister;
  303. begin
  304. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  305. end;
  306. function std_regname(r:Tregister):string;
  307. var
  308. p : tregisterindex;
  309. begin
  310. p:=findreg_by_number_table(r,regnumber_index);
  311. if p<>0 then
  312. result:=std_regname_table[p]
  313. else
  314. result:=generic_regname(r);
  315. end;
  316. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  317. const
  318. inverse: array[TAsmCond] of TAsmCond=(C_None,
  319. C_CS,C_CC,C_NE,C_LT,C_HS,C_HC,C_IE,C_ID,C_SH,C_GE,
  320. C_PL,C_EQ,C_MI,C_LO,C_TS,C_TC,C_VS,C_VC);
  321. begin
  322. result := inverse[c];
  323. end;
  324. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  325. begin
  326. result := c1 = c2;
  327. end;
  328. function rotl(d : dword;b : byte) : dword;
  329. begin
  330. result:=(d shr (32-b)) or (d shl b);
  331. end;
  332. function dwarf_reg(r:tregister):byte;
  333. var
  334. reg : shortint;
  335. begin
  336. reg:=regdwarf_table[findreg_by_number(r)];
  337. if reg=-1 then
  338. internalerror(200603251);
  339. result:=reg;
  340. end;
  341. function GetHigh(const r : TRegister) : TRegister;
  342. begin
  343. result:=TRegister(longint(r)+1)
  344. end;
  345. function GetNextReg(const r: TRegister): TRegister;
  346. begin
  347. result:=TRegister(longint(r)+1);
  348. end;
  349. function GetLastReg(const r: TRegister): TRegister;
  350. begin
  351. result:=TRegister(longint(r)-1);
  352. end;
  353. function GetOffsetReg(const r: TRegister;ofs : shortint): TRegister;
  354. begin
  355. result:=TRegister(longint(r)+ofs);
  356. end;
  357. end.