cpubase.inc 7.3 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl and Peter Vreman
  4. Contains the basic declarations for the i386 architecture
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. { This include file contains the basic declarations for the i386 architecture.
  19. }
  20. {*****************************************************************************
  21. Operand Sizes
  22. *****************************************************************************}
  23. type
  24. topsize = (S_NO,
  25. S_B,S_W,S_L,S_Q,S_BW,S_BL,S_WL,
  26. S_IS,S_IL,S_IQ,
  27. S_FS,S_FL,S_FX,S_FV,S_FXX,
  28. S_MD,
  29. S_NEAR,S_FAR,S_SHORT,
  30. S_T
  31. );
  32. {*****************************************************************************
  33. Registers
  34. *****************************************************************************}
  35. const
  36. {# Standard opcode string table (for each tasmop enumeration). The
  37. opcode strings should conform to the names as defined by the
  38. processor manufacturer.
  39. }
  40. std_op2str:op2strtable={$i i386int.inc}
  41. {*****************************************************************************
  42. Constants
  43. *****************************************************************************}
  44. c_countusableregsint = 4;
  45. {
  46. firstsaveintreg = RS_EAX;
  47. lastsaveintreg = RS_EDX;
  48. firstsavefpureg = RS_INVALID;
  49. lastsavefpureg = RS_INVALID;
  50. firstsavemmreg = RS_MM0;
  51. lastsavemmreg = RS_MM7;
  52. general_superregisters = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
  53. maxvarregs = 4;
  54. varregs : array[1..maxvarregs] of tsuperregister =
  55. (RS_EBX,RS_EDX,RS_ECX,RS_EAX);
  56. maxfpuvarregs = 8;
  57. maxmmvarregs = 8;
  58. }
  59. {*****************************************************************************
  60. GDB Information
  61. *****************************************************************************}
  62. {# Register indexes for stabs information, when some
  63. parameters or variables are stored in registers.
  64. Taken from i386.c (dbx_register_map) and i386.h
  65. (FIXED_REGISTERS) from GCC 3.x source code
  66. }
  67. reg_stab_table : array[tregisterindex] of shortint = (
  68. {$i r386stab.inc}
  69. );
  70. {*****************************************************************************
  71. Default generic sizes
  72. *****************************************************************************}
  73. {# Defines the default address size for a processor, }
  74. OS_ADDR = OS_32;
  75. {# the natural int size for a processor, }
  76. OS_INT = OS_32;
  77. {# the maximum float size for a processor, }
  78. OS_FLOAT = OS_F80;
  79. {# the size of a vector register for a processor }
  80. OS_VECTOR = OS_M64;
  81. {*****************************************************************************
  82. Generic Register names
  83. *****************************************************************************}
  84. {# Stack pointer register }
  85. NR_STACK_POINTER_REG = NR_ESP;
  86. RS_STACK_POINTER_REG = RS_ESP;
  87. {# Frame pointer register }
  88. RS_FRAME_POINTER_REG = RS_EBP;
  89. NR_FRAME_POINTER_REG = NR_EBP;
  90. { Return address for DWARF }
  91. NR_RETURN_ADDRESS_REG = NR_EIP;
  92. {# Register for addressing absolute data in a position independant way,
  93. such as in PIC code. The exact meaning is ABI specific. For
  94. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  95. }
  96. NR_PIC_OFFSET_REG = NR_EBX;
  97. { Results are returned in this register (32-bit values) }
  98. NR_FUNCTION_RETURN_REG = NR_EAX;
  99. RS_FUNCTION_RETURN_REG = RS_EAX;
  100. { Low part of 64bit return value }
  101. NR_FUNCTION_RETURN64_LOW_REG = NR_EAX;
  102. RS_FUNCTION_RETURN64_LOW_REG = RS_EAX;
  103. { High part of 64bit return value }
  104. NR_FUNCTION_RETURN64_HIGH_REG = NR_EDX;
  105. RS_FUNCTION_RETURN64_HIGH_REG = RS_EDX;
  106. { The value returned from a function is available in this register }
  107. NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
  108. RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
  109. { The lowh part of 64bit value returned from a function }
  110. NR_FUNCTION_RESULT64_LOW_REG = NR_FUNCTION_RETURN64_LOW_REG;
  111. RS_FUNCTION_RESULT64_LOW_REG = RS_FUNCTION_RETURN64_LOW_REG;
  112. { The high part of 64bit value returned from a function }
  113. NR_FUNCTION_RESULT64_HIGH_REG = NR_FUNCTION_RETURN64_HIGH_REG;
  114. RS_FUNCTION_RESULT64_HIGH_REG = RS_FUNCTION_RETURN64_HIGH_REG;
  115. { WARNING: don't change to R_ST0!! See comments above implementation of }
  116. { a_loadfpu* methods in rgcpu (JM) }
  117. NR_fpu_result_reg = NR_ST;
  118. NR_mm_result_reg = NR_MM0;
  119. { Offset where the parent framepointer is pushed }
  120. PARENT_FRAMEPOINTER_OFFSET = 8;
  121. {*****************************************************************************
  122. GCC /ABI linking information
  123. *****************************************************************************}
  124. const
  125. {# Registers which must be saved when calling a routine declared as
  126. cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
  127. saved should be the ones as defined in the target ABI and / or GCC.
  128. This value can be deduced from the CALLED_USED_REGISTERS array in the
  129. GCC source.
  130. }
  131. saved_standard_registers : array[0..2] of tsuperregister = (RS_EBX,RS_ESI,RS_EDI);
  132. {# Required parameter alignment when calling a routine declared as
  133. stdcall and cdecl. The alignment value should be the one defined
  134. by GCC or the target ABI.
  135. The value of this constant is equal to the constant
  136. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  137. }
  138. std_param_align = 4;
  139. {
  140. $Log$
  141. Revision 1.17 2005-01-20 16:38:45 peter
  142. * load jmp_buf_size from system unit
  143. Revision 1.16 2004/12/12 10:50:34 florian
  144. * fixed operand size calculation for sse operands
  145. + all nasm assembler targets to help page output added
  146. Revision 1.15 2004/10/31 21:45:03 peter
  147. * generic tlocation
  148. * move tlocation to cgutils
  149. Revision 1.14 2004/06/20 08:55:31 florian
  150. * logs truncated
  151. Revision 1.13 2004/06/16 20:07:10 florian
  152. * dwarf branch merged
  153. Revision 1.12.2.1 2004/04/20 16:35:58 peter
  154. * generate dwarf for stackframe entry
  155. Revision 1.12 2004/02/05 18:28:37 peter
  156. * x86_64 fixes for opsize
  157. Revision 1.11 2004/01/14 23:39:05 florian
  158. * another bunch of x86-64 fixes mainly calling convention and
  159. assembler reader related
  160. }