cpubase.pas 16 KB

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  1. {
  2. Copyright (c) 2006 by Florian Klaempfl
  3. Contains the base types for the AVR
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# Base unit for processor information. This unit contains
  18. enumerations of registers, opcodes, sizes, and other
  19. such things which are processor specific.
  20. }
  21. unit cpubase;
  22. {$i fpcdefs.inc}
  23. interface
  24. uses
  25. cutils,cclasses,
  26. globtype,globals,
  27. cpuinfo,
  28. aasmbase,
  29. cgbase
  30. ;
  31. {*****************************************************************************
  32. Assembler Opcodes
  33. *****************************************************************************}
  34. type
  35. TAsmOp={$i z80op.inc}
  36. { This should define the array of instructions as string }
  37. op2strtable=array[tasmop] of string[4];
  38. const
  39. { First value of opcode enumeration }
  40. firstop = low(tasmop);
  41. { Last value of opcode enumeration }
  42. lastop = high(tasmop);
  43. std_op2str:op2strtable={$i z80stdopnames.inc}
  44. { call/reg instructions are not considered as jmp instructions for the usage cases of
  45. this set }
  46. jmp_instructions = [A_JP,A_JR];
  47. call_jmp_instructions = [A_CALL]+jmp_instructions;
  48. {*****************************************************************************
  49. Registers
  50. *****************************************************************************}
  51. type
  52. { Number of registers used for indexing in tables }
  53. tregisterindex=0..{$i rz80nor.inc}-1;
  54. const
  55. { Available Superregisters }
  56. {$i rz80sup.inc}
  57. { No Subregisters }
  58. R_SUBWHOLE = R_SUBL;
  59. { Available Registers }
  60. {$i rz80con.inc}
  61. { Integer Super registers first and last }
  62. first_int_supreg = RS_A;
  63. first_int_imreg = $20;
  64. { Float Super register first and last }
  65. first_fpu_supreg = RS_INVALID;
  66. first_fpu_imreg = 0;
  67. { MM Super register first and last }
  68. first_mm_supreg = RS_INVALID;
  69. first_mm_imreg = 0;
  70. regnumber_count_bsstart = 32;
  71. regnumber_table : array[tregisterindex] of tregister = (
  72. {$i rz80num.inc}
  73. );
  74. regstabs_table : array[tregisterindex] of shortint = (
  75. {$i rz80sta.inc}
  76. );
  77. regdwarf_table : array[tregisterindex] of shortint = (
  78. {$i rz80dwa.inc}
  79. );
  80. { registers which may be destroyed by calls }
  81. VOLATILE_INTREGISTERS = [RS_A,RS_BC,RS_DE,RS_HL];
  82. VOLATILE_FPUREGISTERS = [];
  83. type
  84. totherregisterset = set of tregisterindex;
  85. {*****************************************************************************
  86. Conditions
  87. *****************************************************************************}
  88. type
  89. TAsmCond=(C_None,
  90. C_CC,C_CS,C_EQ,C_GE,C_HC,C_HS,C_ID,C_IE,C_LO,C_LT,
  91. C_MI,C_NE,C_PL,C_SH,C_TC,C_TS,C_VC,C_VS
  92. );
  93. const
  94. cond2str : array[TAsmCond] of string[2]=('',
  95. 'cc','cs','eq','ge','hc','hs','id','ie','lo','lt',
  96. 'mi','ne','pl','sh','tc','ts','vc','vs'
  97. );
  98. uppercond2str : array[TAsmCond] of string[2]=('',
  99. 'CC','CS','EQ','GE','HC','HS','ID','IE','LO','LT',
  100. 'MI','NE','PL','SH','TC','TS','VC','VS'
  101. );
  102. {*****************************************************************************
  103. Flags
  104. *****************************************************************************}
  105. type
  106. TResFlags = (F_NotPossible,F_CC,F_CS,F_EQ,F_GE,F_LO,F_LT,
  107. F_NE,F_SH,F_VC,F_VS);
  108. {*****************************************************************************
  109. Operands
  110. *****************************************************************************}
  111. taddressmode = (AM_UNCHANGED,AM_POSTINCREMENT,AM_PREDRECEMENT);
  112. {*****************************************************************************
  113. Constants
  114. *****************************************************************************}
  115. const
  116. max_operands = 4;
  117. maxintregs = 15;
  118. maxfpuregs = 0;
  119. maxaddrregs = 0;
  120. {*****************************************************************************
  121. Operand Sizes
  122. *****************************************************************************}
  123. type
  124. topsize = (S_NO,
  125. S_B,S_W,S_L,S_BW,S_BL,S_WL,
  126. S_IS,S_IL,S_IQ,
  127. S_FS,S_FL,S_FX,S_D,S_Q,S_FV,S_FXX
  128. );
  129. {*****************************************************************************
  130. Constants
  131. *****************************************************************************}
  132. const
  133. firstsaveintreg = RS_INVALID;
  134. lastsaveintreg = RS_INVALID;
  135. firstsavefpureg = RS_INVALID;
  136. lastsavefpureg = RS_INVALID;
  137. firstsavemmreg = RS_INVALID;
  138. lastsavemmreg = RS_INVALID;
  139. {*****************************************************************************
  140. Default generic sizes
  141. *****************************************************************************}
  142. { Defines the default address size for a processor, }
  143. OS_ADDR = OS_16;
  144. { the natural int size for a processor,
  145. has to match osuinttype/ossinttype as initialized in psystem,
  146. initially, this was OS_16/OS_S16 on avr, but experience has
  147. proven that it is better to make it 8 Bit thus having the same
  148. size as a register.
  149. }
  150. OS_INT = OS_8;
  151. OS_SINT = OS_S8;
  152. { the maximum float size for a processor, }
  153. OS_FLOAT = OS_F64;
  154. { the size of a vector register for a processor }
  155. OS_VECTOR = OS_M32;
  156. {*****************************************************************************
  157. Generic Register names
  158. *****************************************************************************}
  159. { Stack pointer register }
  160. NR_STACK_POINTER_REG = NR_SP;
  161. RS_STACK_POINTER_REG = RS_SP;
  162. { Frame pointer register }
  163. RS_FRAME_POINTER_REG = RS_IX;
  164. NR_FRAME_POINTER_REG = NR_IX;
  165. { Register for addressing absolute data in a position independant way,
  166. such as in PIC code. The exact meaning is ABI specific. For
  167. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  168. }
  169. NR_PIC_OFFSET_REG = NR_INVALID;
  170. { Results are returned in this register (32-bit values) }
  171. NR_FUNCTION_RETURN_REG = NR_HL;
  172. RS_FUNCTION_RETURN_REG = RS_HL;
  173. { Low part of 64bit return value }
  174. NR_FUNCTION_RETURN64_LOW_REG = NR_HL;
  175. RS_FUNCTION_RETURN64_LOW_REG = RS_HL;
  176. { High part of 64bit return value }
  177. NR_FUNCTION_RETURN64_HIGH_REG = NR_BC;
  178. RS_FUNCTION_RETURN64_HIGH_REG = RS_BC;
  179. { The value returned from a function is available in this register }
  180. NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
  181. RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
  182. { The lowh part of 64bit value returned from a function }
  183. NR_FUNCTION_RESULT64_LOW_REG = NR_FUNCTION_RETURN64_LOW_REG;
  184. RS_FUNCTION_RESULT64_LOW_REG = RS_FUNCTION_RETURN64_LOW_REG;
  185. { The high part of 64bit value returned from a function }
  186. NR_FUNCTION_RESULT64_HIGH_REG = NR_FUNCTION_RETURN64_HIGH_REG;
  187. RS_FUNCTION_RESULT64_HIGH_REG = RS_FUNCTION_RETURN64_HIGH_REG;
  188. NR_FPU_RESULT_REG = NR_NO;
  189. NR_MM_RESULT_REG = NR_NO;
  190. NR_RETURN_ADDRESS_REG = NR_FUNCTION_RETURN_REG;
  191. { Offset where the parent framepointer is pushed }
  192. PARENT_FRAMEPOINTER_OFFSET = 0;
  193. NR_DEFAULTFLAGS = NR_F;
  194. RS_DEFAULTFLAGS = RS_F;
  195. {*****************************************************************************
  196. GCC /ABI linking information
  197. *****************************************************************************}
  198. const
  199. { Registers which must be saved when calling a routine declared as
  200. cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
  201. saved should be the ones as defined in the target ABI and / or GCC.
  202. This value can be deduced from the CALLED_USED_REGISTERS array in the
  203. GCC source.
  204. }
  205. { on avr, gen_entry/gen_exit code saves/restores registers, so
  206. we don't need this array }
  207. saved_standard_registers : array[0..0] of tsuperregister =
  208. (RS_INVALID);
  209. { Required parameter alignment when calling a routine declared as
  210. stdcall and cdecl. The alignment value should be the one defined
  211. by GCC or the target ABI.
  212. The value of this constant is equal to the constant
  213. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  214. }
  215. std_param_align = 4;
  216. saved_address_registers : array[0..0] of tsuperregister = (RS_INVALID);
  217. saved_mm_registers : array[0..0] of tsuperregister = (RS_INVALID);
  218. {*****************************************************************************
  219. Helpers
  220. *****************************************************************************}
  221. { Returns the tcgsize corresponding with the size of reg.}
  222. function reg_cgsize(const reg: tregister) : tcgsize;
  223. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  224. procedure inverse_flags(var f: TResFlags);
  225. function flags_to_cond(const f: TResFlags) : TAsmCond;
  226. function findreg_by_number(r:Tregister):tregisterindex;
  227. function std_regnum_search(const s:string):Tregister;
  228. function std_regname(r:Tregister):string;
  229. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  230. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  231. { Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
  232. function condition_in(const Subset, c: TAsmCond): Boolean;
  233. function dwarf_reg(r:tregister):byte;
  234. function dwarf_reg_no_error(r:tregister):shortint;
  235. function eh_return_data_regno(nr: longint): longint;
  236. function GetHigh(const r : TRegister) : TRegister;
  237. { returns the next virtual register }
  238. function GetNextReg(const r : TRegister) : TRegister;
  239. { returns the last virtual register }
  240. function GetLastReg(const r : TRegister) : TRegister;
  241. { returns the register with the offset of ofs of a continuous set of register starting with r }
  242. function GetOffsetReg(const r : TRegister;ofs : shortint) : TRegister;
  243. { returns the register with the offset of ofs of a continuous set of register starting with r and being continued with rhi }
  244. function GetOffsetReg64(const r,rhi: TRegister;ofs : shortint): TRegister;
  245. function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
  246. implementation
  247. uses
  248. rgBase,verbose;
  249. const
  250. std_regname_table : TRegNameTable = (
  251. {$i rz80std.inc}
  252. );
  253. regnumber_index : array[tregisterindex] of tregisterindex = (
  254. {$i rz80rni.inc}
  255. );
  256. std_regname_index : array[tregisterindex] of tregisterindex = (
  257. {$i rz80sri.inc}
  258. );
  259. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  260. begin
  261. case s of
  262. OS_8,OS_S8:
  263. cgsize2subreg:=R_SUBL;
  264. OS_16,OS_S16:
  265. cgsize2subreg:=R_SUBW;
  266. OS_32,OS_S32:
  267. cgsize2subreg:=R_SUBD;
  268. OS_64,OS_S64:
  269. cgsize2subreg:=R_SUBQ;
  270. OS_NO:
  271. { error message should have been thrown already before, so avoid only
  272. an internal error }
  273. cgsize2subreg:=R_SUBNONE;
  274. else
  275. internalerror(200301231);
  276. end;
  277. end;
  278. function reg_cgsize(const reg: tregister): tcgsize;
  279. begin
  280. case getregtype(reg) of
  281. R_INTREGISTER :
  282. reg_cgsize:=OS_8;
  283. R_ADDRESSREGISTER :
  284. reg_cgsize:=OS_16;
  285. else
  286. internalerror(2011021905);
  287. end;
  288. end;
  289. procedure inverse_flags(var f: TResFlags);
  290. const
  291. inv_flags: array[TResFlags] of TResFlags =
  292. (F_NotPossible,F_CS,F_CC,F_NE,F_LT,F_SH,F_GE,
  293. F_NE,F_LO,F_VS,F_VC);
  294. begin
  295. f:=inv_flags[f];
  296. end;
  297. function flags_to_cond(const f: TResFlags) : TAsmCond;
  298. const
  299. flag_2_cond: array[F_CC..F_VS] of TAsmCond =
  300. (C_CC,C_CS,C_EQ,C_GE,C_LO,C_LT,
  301. C_NE,C_SH,C_VC,C_VS);
  302. begin
  303. if f=F_NotPossible then
  304. internalerror(2011022101);
  305. if f>high(flag_2_cond) then
  306. internalerror(200112301);
  307. result:=flag_2_cond[f];
  308. end;
  309. function findreg_by_number(r:Tregister):tregisterindex;
  310. begin
  311. result:=rgBase.findreg_by_number_table(r,regnumber_index);
  312. end;
  313. function std_regnum_search(const s:string):Tregister;
  314. begin
  315. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  316. end;
  317. function std_regname(r:Tregister):string;
  318. var
  319. p : tregisterindex;
  320. begin
  321. p:=findreg_by_number_table(r,regnumber_index);
  322. if p<>0 then
  323. result:=std_regname_table[p]
  324. else
  325. result:=generic_regname(r);
  326. end;
  327. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  328. const
  329. inverse: array[TAsmCond] of TAsmCond=(C_None,
  330. C_CS,C_CC,C_NE,C_LT,C_HS,C_HC,C_IE,C_ID,C_SH,C_GE,
  331. C_PL,C_EQ,C_MI,C_LO,C_TS,C_TC,C_VS,C_VC);
  332. begin
  333. result := inverse[c];
  334. end;
  335. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  336. begin
  337. result := c1 = c2;
  338. end;
  339. { Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
  340. function condition_in(const Subset, c: TAsmCond): Boolean;
  341. begin
  342. Result := {(c.cond = C_None) or} conditions_equal(Subset, c);
  343. { TODO: Can a PowerPC programmer please update this procedure to
  344. actually detect subsets? Thanks. [Kit] }
  345. end;
  346. function rotl(d : dword;b : byte) : dword;
  347. begin
  348. result:=(d shr (32-b)) or (d shl b);
  349. end;
  350. function dwarf_reg(r:tregister):byte;
  351. var
  352. reg : shortint;
  353. begin
  354. reg:=regdwarf_table[findreg_by_number(r)];
  355. if reg=-1 then
  356. internalerror(200603251);
  357. result:=reg;
  358. end;
  359. function dwarf_reg_no_error(r:tregister):shortint;
  360. begin
  361. result:=regdwarf_table[findreg_by_number(r)];
  362. end;
  363. function eh_return_data_regno(nr: longint): longint;
  364. begin
  365. result:=-1;
  366. end;
  367. function GetHigh(const r : TRegister) : TRegister;
  368. begin
  369. result:=TRegister(longint(r)+1)
  370. end;
  371. function GetNextReg(const r: TRegister): TRegister;
  372. begin
  373. result:=TRegister(longint(r)+1);
  374. end;
  375. function GetLastReg(const r: TRegister): TRegister;
  376. begin
  377. result:=TRegister(longint(r)-1);
  378. end;
  379. function GetOffsetReg(const r: TRegister;ofs : shortint): TRegister;
  380. begin
  381. result:=TRegister(longint(r)+ofs);
  382. end;
  383. function GetOffsetReg64(const r,rhi: TRegister;ofs : shortint): TRegister;
  384. begin
  385. if ofs>3 then
  386. result:=TRegister(longint(rhi)+ofs-4)
  387. else
  388. result:=TRegister(longint(r)+ofs);
  389. end;
  390. function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
  391. begin
  392. is_calljmp:= o in call_jmp_instructions;
  393. end;
  394. end.