cgobj.pas 141 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times : longint;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_extend_backwards(b: boolean);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. This must be overriden for each CPU target.
  102. @param(size size of the operand in the register)
  103. @param(r register source of the operand)
  104. @param(cgpara where the parameter will be stored)
  105. }
  106. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  107. {# Pass a parameter, which is a constant, to a routine.
  108. A generic version is provided. This routine should
  109. be overriden for optimization purposes if the cpu
  110. permits directly sending this type of parameter.
  111. @param(size size of the operand in constant)
  112. @param(a value of constant to send)
  113. @param(cgpara where the parameter will be stored)
  114. }
  115. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  116. {# Pass the value of a parameter, which is located in memory, to a routine.
  117. A generic version is provided. This routine should
  118. be overriden for optimization purposes if the cpu
  119. permits directly sending this type of parameter.
  120. @param(size size of the operand in constant)
  121. @param(r Memory reference of value to send)
  122. @param(cgpara where the parameter will be stored)
  123. }
  124. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  125. {# Pass the value of a parameter, which can be located either in a register or memory location,
  126. to a routine.
  127. A generic version is provided.
  128. @param(l location of the operand to send)
  129. @param(nr parameter number (starting from one) of routine (from left to right))
  130. @param(cgpara where the parameter will be stored)
  131. }
  132. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  133. {# Pass the address of a reference to a routine. This routine
  134. will calculate the address of the reference, and pass this
  135. calculated address as a parameter.
  136. A generic version is provided. This routine should
  137. be overriden for optimization purposes if the cpu
  138. permits directly sending this type of parameter.
  139. @param(r reference to get address from)
  140. @param(nr parameter number (starting from one) of routine (from left to right))
  141. }
  142. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  143. { Remarks:
  144. * If a method specifies a size you have only to take care
  145. of that number of bits, i.e. load_const_reg with OP_8 must
  146. only load the lower 8 bit of the specified register
  147. the rest of the register can be undefined
  148. if necessary the compiler will call a method
  149. to zero or sign extend the register
  150. * The a_load_XX_XX with OP_64 needn't to be
  151. implemented for 32 bit
  152. processors, the code generator takes care of that
  153. * the addr size is for work with the natural pointer
  154. size
  155. * the procedures without fpu/mm are only for integer usage
  156. * normally the first location is the source and the
  157. second the destination
  158. }
  159. {# Emits instruction to call the method specified by symbol name.
  160. This routine must be overriden for each new target cpu.
  161. There is no a_call_ref because loading the reference will use
  162. a temp register on most cpu's resulting in conflicts with the
  163. registers used for the parameters (PFV)
  164. }
  165. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  166. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  167. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  168. { same as a_call_name, might be overriden on certain architectures to emit
  169. static calls without usage of a got trampoline }
  170. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  171. { move instructions }
  172. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  173. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  174. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  175. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  176. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  177. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  178. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  179. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  180. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  181. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  182. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  183. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  184. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  185. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  186. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  187. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  188. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  189. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  190. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  191. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  192. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  193. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  194. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  195. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  196. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  197. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  198. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  199. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  200. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  201. { fpu move instructions }
  202. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  203. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  204. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  205. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  206. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  207. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  208. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  209. { vector register move instructions }
  210. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  211. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  212. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  213. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  214. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  215. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  216. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  217. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  218. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  219. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  220. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  221. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  222. { basic arithmetic operations }
  223. { note: for operators which require only one argument (not, neg), use }
  224. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  225. { that in this case the *second* operand is used as both source and }
  226. { destination (JM) }
  227. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  228. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  229. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  230. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  231. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  232. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  233. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  234. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  235. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  236. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  237. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  238. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  239. { trinary operations for processors that support them, 'emulated' }
  240. { on others. None with "ref" arguments since I don't think there }
  241. { are any processors that support it (JM) }
  242. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  243. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  244. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  245. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  246. { comparison operations }
  247. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  248. l : tasmlabel);virtual; abstract;
  249. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  250. l : tasmlabel); virtual;
  251. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  252. l : tasmlabel);
  253. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  254. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  255. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  256. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  257. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  258. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  259. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  260. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  261. l : tasmlabel);
  262. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  263. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  264. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  265. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  266. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  267. }
  268. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  269. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  270. {
  271. This routine tries to optimize the op_const_reg/ref opcode, and should be
  272. called at the start of a_op_const_reg/ref. It returns the actual opcode
  273. to emit, and the constant value to emit. This function can opcode OP_NONE to
  274. remove the opcode and OP_MOVE to replace it with a simple load
  275. @param(op The opcode to emit, returns the opcode which must be emitted)
  276. @param(a The constant which should be emitted, returns the constant which must
  277. be emitted)
  278. }
  279. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  280. {#
  281. This routine is used in exception management nodes. It should
  282. save the exception reason currently in the FUNCTION_RETURN_REG. The
  283. save should be done either to a temp (pointed to by href).
  284. or on the stack (pushing the value on the stack).
  285. The size of the value to save is OS_S32. The default version
  286. saves the exception reason to a temp. memory area.
  287. }
  288. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  289. {#
  290. This routine is used in exception management nodes. It should
  291. save the exception reason constant. The
  292. save should be done either to a temp (pointed to by href).
  293. or on the stack (pushing the value on the stack).
  294. The size of the value to save is OS_S32. The default version
  295. saves the exception reason to a temp. memory area.
  296. }
  297. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  298. {#
  299. This routine is used in exception management nodes. It should
  300. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  301. should either be in the temp. area (pointed to by href , href should
  302. *NOT* be freed) or on the stack (the value should be popped).
  303. The size of the value to save is OS_S32. The default version
  304. saves the exception reason to a temp. memory area.
  305. }
  306. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  307. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  308. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  309. {# This should emit the opcode to copy len bytes from the source
  310. to destination.
  311. It must be overriden for each new target processor.
  312. @param(source Source reference of copy)
  313. @param(dest Destination reference of copy)
  314. }
  315. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  316. {# This should emit the opcode to copy len bytes from the an unaligned source
  317. to destination.
  318. It must be overriden for each new target processor.
  319. @param(source Source reference of copy)
  320. @param(dest Destination reference of copy)
  321. }
  322. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  323. {# This should emit the opcode to a shortrstring from the source
  324. to destination.
  325. @param(source Source reference of copy)
  326. @param(dest Destination reference of copy)
  327. }
  328. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  329. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  330. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  331. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  332. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  333. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  334. {# Generates range checking code. It is to note
  335. that this routine does not need to be overriden,
  336. as it takes care of everything.
  337. @param(p Node which contains the value to check)
  338. @param(todef Type definition of node to range check)
  339. }
  340. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  341. {# Generates overflow checking code for a node }
  342. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  343. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  344. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  345. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  346. {# Emits instructions when compilation is done in profile
  347. mode (this is set as a command line option). The default
  348. behavior does nothing, should be overriden as required.
  349. }
  350. procedure g_profilecode(list : TAsmList);virtual;
  351. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  352. @param(size Number of bytes to allocate)
  353. }
  354. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  355. {# Emits instruction for allocating the locals in entry
  356. code of a routine. This is one of the first
  357. routine called in @var(genentrycode).
  358. @param(localsize Number of bytes to allocate as locals)
  359. }
  360. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  361. {# Emits instructions for returning from a subroutine.
  362. Should also restore the framepointer and stack.
  363. @param(parasize Number of bytes of parameters to deallocate from stack)
  364. }
  365. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  366. {# This routine is called when generating the code for the entry point
  367. of a routine. It should save all registers which are not used in this
  368. routine, and which should be declared as saved in the std_saved_registers
  369. set.
  370. This routine is mainly used when linking to code which is generated
  371. by ABI-compliant compilers (like GCC), to make sure that the reserved
  372. registers of that ABI are not clobbered.
  373. @param(usedinproc Registers which are used in the code of this routine)
  374. }
  375. procedure g_save_standard_registers(list:TAsmList);virtual;
  376. {# This routine is called when generating the code for the exit point
  377. of a routine. It should restore all registers which were previously
  378. saved in @var(g_save_standard_registers).
  379. @param(usedinproc Registers which are used in the code of this routine)
  380. }
  381. procedure g_restore_standard_registers(list:TAsmList);virtual;
  382. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  383. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  384. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  385. protected
  386. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  387. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  388. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  389. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  390. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  391. end;
  392. {$ifndef cpu64bit}
  393. {# @abstract(Abstract code generator for 64 Bit operations)
  394. This class implements an abstract code generator class
  395. for 64 Bit operations.
  396. }
  397. tcg64 = class
  398. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  399. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  400. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  401. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  402. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  403. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  404. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  405. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  406. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  407. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  408. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  409. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  410. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  411. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  412. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  413. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  414. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  415. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  416. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  417. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  418. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  419. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  420. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  421. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  422. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  423. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  424. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  425. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  426. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  427. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  428. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  429. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  430. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  431. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  432. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  433. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  434. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  435. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  436. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  437. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  438. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  439. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  440. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  441. {
  442. This routine tries to optimize the const_reg opcode, and should be
  443. called at the start of a_op64_const_reg. It returns the actual opcode
  444. to emit, and the constant value to emit. If this routine returns
  445. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  446. @param(op The opcode to emit, returns the opcode which must be emitted)
  447. @param(a The constant which should be emitted, returns the constant which must
  448. be emitted)
  449. @param(reg The register to emit the opcode with, returns the register with
  450. which the opcode will be emitted)
  451. }
  452. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  453. { override to catch 64bit rangechecks }
  454. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  455. end;
  456. {$endif cpu64bit}
  457. var
  458. {# Main code generator class }
  459. cg : tcg;
  460. {$ifndef cpu64bit}
  461. {# Code generator class for all operations working with 64-Bit operands }
  462. cg64 : tcg64;
  463. {$endif cpu64bit}
  464. implementation
  465. uses
  466. globals,options,systems,
  467. verbose,defutil,paramgr,symsym,
  468. tgobj,cutils,procinfo,
  469. ncgrtti;
  470. {*****************************************************************************
  471. basic functionallity
  472. ******************************************************************************}
  473. constructor tcg.create;
  474. begin
  475. end;
  476. {*****************************************************************************
  477. register allocation
  478. ******************************************************************************}
  479. procedure tcg.init_register_allocators;
  480. begin
  481. fillchar(rg,sizeof(rg),0);
  482. add_reg_instruction_hook:=@add_reg_instruction;
  483. end;
  484. procedure tcg.done_register_allocators;
  485. begin
  486. { Safety }
  487. fillchar(rg,sizeof(rg),0);
  488. add_reg_instruction_hook:=nil;
  489. end;
  490. {$ifdef flowgraph}
  491. procedure Tcg.init_flowgraph;
  492. begin
  493. aktflownode:=0;
  494. end;
  495. procedure Tcg.done_flowgraph;
  496. begin
  497. end;
  498. {$endif}
  499. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  500. begin
  501. if not assigned(rg[R_INTREGISTER]) then
  502. internalerror(200312122);
  503. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  504. end;
  505. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  506. begin
  507. if not assigned(rg[R_FPUREGISTER]) then
  508. internalerror(200312123);
  509. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  510. end;
  511. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  512. begin
  513. if not assigned(rg[R_MMREGISTER]) then
  514. internalerror(2003121214);
  515. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  516. end;
  517. function tcg.getaddressregister(list:TAsmList):Tregister;
  518. begin
  519. if assigned(rg[R_ADDRESSREGISTER]) then
  520. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  521. else
  522. begin
  523. if not assigned(rg[R_INTREGISTER]) then
  524. internalerror(200312121);
  525. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  526. end;
  527. end;
  528. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  529. var
  530. subreg:Tsubregister;
  531. begin
  532. subreg:=cgsize2subreg(size);
  533. result:=reg;
  534. setsubreg(result,subreg);
  535. { notify RA }
  536. if result<>reg then
  537. list.concat(tai_regalloc.resize(result));
  538. end;
  539. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  540. begin
  541. if not assigned(rg[getregtype(r)]) then
  542. internalerror(200312125);
  543. rg[getregtype(r)].getcpuregister(list,r);
  544. end;
  545. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  546. begin
  547. if not assigned(rg[getregtype(r)]) then
  548. internalerror(200312126);
  549. rg[getregtype(r)].ungetcpuregister(list,r);
  550. end;
  551. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  552. begin
  553. if assigned(rg[rt]) then
  554. rg[rt].alloccpuregisters(list,r)
  555. else
  556. internalerror(200310092);
  557. end;
  558. procedure tcg.allocallcpuregisters(list:TAsmList);
  559. begin
  560. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  561. {$ifndef i386}
  562. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  563. {$ifdef cpumm}
  564. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  565. {$endif cpumm}
  566. {$endif i386}
  567. end;
  568. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  569. begin
  570. if assigned(rg[rt]) then
  571. rg[rt].dealloccpuregisters(list,r)
  572. else
  573. internalerror(200310093);
  574. end;
  575. procedure tcg.deallocallcpuregisters(list:TAsmList);
  576. begin
  577. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  578. {$ifndef i386}
  579. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  580. {$ifdef cpumm}
  581. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  582. {$endif cpumm}
  583. {$endif i386}
  584. end;
  585. function tcg.uses_registers(rt:Tregistertype):boolean;
  586. begin
  587. if assigned(rg[rt]) then
  588. result:=rg[rt].uses_registers
  589. else
  590. result:=false;
  591. end;
  592. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  593. var
  594. rt : tregistertype;
  595. begin
  596. rt:=getregtype(r);
  597. { Only add it when a register allocator is configured.
  598. No IE can be generated, because the VMT is written
  599. without a valid rg[] }
  600. if assigned(rg[rt]) then
  601. rg[rt].add_reg_instruction(instr,r);
  602. end;
  603. procedure tcg.add_move_instruction(instr:Taicpu);
  604. var
  605. rt : tregistertype;
  606. begin
  607. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  608. if assigned(rg[rt]) then
  609. rg[rt].add_move_instruction(instr)
  610. else
  611. internalerror(200310095);
  612. end;
  613. procedure tcg.set_regalloc_extend_backwards(b: boolean);
  614. var
  615. rt : tregistertype;
  616. begin
  617. for rt:=low(rg) to high(rg) do
  618. begin
  619. if assigned(rg[rt]) then
  620. rg[rt].extend_live_range_backwards := b;;
  621. end;
  622. end;
  623. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  624. var
  625. rt : tregistertype;
  626. begin
  627. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  628. begin
  629. if assigned(rg[rt]) then
  630. rg[rt].do_register_allocation(list,headertai);
  631. end;
  632. { running the other register allocator passes could require addition int/addr. registers
  633. when spilling so run int/addr register allocation at the end }
  634. if assigned(rg[R_INTREGISTER]) then
  635. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  636. if assigned(rg[R_ADDRESSREGISTER]) then
  637. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  638. end;
  639. procedure tcg.translate_register(var reg : tregister);
  640. begin
  641. rg[getregtype(reg)].translate_register(reg);
  642. end;
  643. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  644. begin
  645. list.concat(tai_regalloc.alloc(r,nil));
  646. end;
  647. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  648. begin
  649. list.concat(tai_regalloc.dealloc(r,nil));
  650. end;
  651. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  652. var
  653. instr : tai;
  654. begin
  655. instr:=tai_regalloc.sync(r);
  656. list.concat(instr);
  657. add_reg_instruction(instr,r);
  658. end;
  659. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  660. begin
  661. list.concat(tai_label.create(l));
  662. end;
  663. {*****************************************************************************
  664. for better code generation these methods should be overridden
  665. ******************************************************************************}
  666. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  667. var
  668. ref : treference;
  669. begin
  670. cgpara.check_simple_location;
  671. case cgpara.location^.loc of
  672. LOC_REGISTER,LOC_CREGISTER:
  673. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  674. LOC_REFERENCE,LOC_CREFERENCE:
  675. begin
  676. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  677. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  678. end
  679. else
  680. internalerror(2002071004);
  681. end;
  682. end;
  683. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  684. var
  685. ref : treference;
  686. begin
  687. cgpara.check_simple_location;
  688. case cgpara.location^.loc of
  689. LOC_REGISTER,LOC_CREGISTER:
  690. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  691. LOC_REFERENCE,LOC_CREFERENCE:
  692. begin
  693. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  694. a_load_const_ref(list,cgpara.location^.size,a,ref);
  695. end
  696. else
  697. internalerror(2002071004);
  698. end;
  699. end;
  700. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  701. var
  702. ref : treference;
  703. begin
  704. cgpara.check_simple_location;
  705. case cgpara.location^.loc of
  706. LOC_REGISTER,LOC_CREGISTER:
  707. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  708. LOC_REFERENCE,LOC_CREFERENCE:
  709. begin
  710. reference_reset(ref);
  711. ref.base:=cgpara.location^.reference.index;
  712. ref.offset:=cgpara.location^.reference.offset;
  713. if (size <> OS_NO) and
  714. (tcgsize2size[size] < sizeof(aint)) then
  715. begin
  716. if (cgpara.size = OS_NO) or
  717. assigned(cgpara.location^.next) then
  718. internalerror(2006052401);
  719. a_load_ref_ref(list,size,cgpara.size,r,ref);
  720. end
  721. else
  722. { use concatcopy, because the parameter can be larger than }
  723. { what the OS_* constants can handle }
  724. g_concatcopy(list,r,ref,cgpara.intsize);
  725. end
  726. else
  727. internalerror(2002071004);
  728. end;
  729. end;
  730. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  731. begin
  732. case l.loc of
  733. LOC_REGISTER,
  734. LOC_CREGISTER :
  735. a_param_reg(list,l.size,l.register,cgpara);
  736. LOC_CONSTANT :
  737. a_param_const(list,l.size,l.value,cgpara);
  738. LOC_CREFERENCE,
  739. LOC_REFERENCE :
  740. a_param_ref(list,l.size,l.reference,cgpara);
  741. else
  742. internalerror(2002032211);
  743. end;
  744. end;
  745. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  746. var
  747. hr : tregister;
  748. begin
  749. cgpara.check_simple_location;
  750. hr:=getaddressregister(list);
  751. a_loadaddr_ref_reg(list,r,hr);
  752. a_param_reg(list,OS_ADDR,hr,cgpara);
  753. end;
  754. {****************************************************************************
  755. some generic implementations
  756. ****************************************************************************}
  757. {$ifopt r+}
  758. {$define rangeon}
  759. {$endif}
  760. {$ifopt q+}
  761. {$define overflowon}
  762. {$endif}
  763. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  764. var
  765. bitmask: aword;
  766. tmpreg: tregister;
  767. stopbit: byte;
  768. begin
  769. tmpreg:=getintregister(list,sreg.subsetregsize);
  770. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  771. stopbit := sreg.startbit + sreg.bitlen;
  772. // on x86(64), 1 shl 32(64) = 1 instead of 0
  773. // use aword to prevent overflow with 1 shl 31
  774. if (stopbit - sreg.startbit <> AIntBits) then
  775. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  776. else
  777. bitmask := high(aword);
  778. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  779. tmpreg := makeregsize(list,tmpreg,subsetsize);
  780. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  781. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  782. end;
  783. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  784. begin
  785. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  786. end;
  787. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  788. var
  789. bitmask: aword;
  790. tmpreg: tregister;
  791. stopbit: byte;
  792. begin
  793. stopbit := sreg.startbit + sreg.bitlen;
  794. // on x86(64), 1 shl 32(64) = 1 instead of 0
  795. if (stopbit <> AIntBits) then
  796. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  797. else
  798. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  799. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  800. begin
  801. tmpreg:=getintregister(list,sreg.subsetregsize);
  802. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  803. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  804. if (slopt <> SL_REGNOSRCMASK) then
  805. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  806. end;
  807. if (slopt <> SL_SETMAX) then
  808. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  809. case slopt of
  810. SL_SETZERO : ;
  811. SL_SETMAX :
  812. if (sreg.bitlen <> AIntBits) then
  813. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  814. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  815. sreg.subsetreg)
  816. else
  817. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  818. else
  819. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  820. end;
  821. end;
  822. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  823. var
  824. tmpreg: tregister;
  825. bitmask: aword;
  826. stopbit: byte;
  827. begin
  828. if (fromsreg.bitlen >= tosreg.bitlen) then
  829. begin
  830. tmpreg := getintregister(list,tosreg.subsetregsize);
  831. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  832. if (fromsreg.startbit <= tosreg.startbit) then
  833. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  834. else
  835. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  836. stopbit := tosreg.startbit + tosreg.bitlen;
  837. // on x86(64), 1 shl 32(64) = 1 instead of 0
  838. if (stopbit <> AIntBits) then
  839. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  840. else
  841. bitmask := (aword(1) shl tosreg.startbit) - 1;
  842. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  843. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  844. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  845. end
  846. else
  847. begin
  848. tmpreg := getintregister(list,tosubsetsize);
  849. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  850. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  851. end;
  852. end;
  853. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  854. var
  855. tmpreg: tregister;
  856. begin
  857. tmpreg := getintregister(list,tosize);
  858. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  859. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  860. end;
  861. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  862. var
  863. tmpreg: tregister;
  864. begin
  865. tmpreg := getintregister(list,subsetsize);
  866. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  867. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  868. end;
  869. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  870. var
  871. bitmask: aword;
  872. stopbit: byte;
  873. begin
  874. stopbit := sreg.startbit + sreg.bitlen;
  875. // on x86(64), 1 shl 32(64) = 1 instead of 0
  876. if (stopbit <> AIntBits) then
  877. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  878. else
  879. bitmask := (aword(1) shl sreg.startbit) - 1;
  880. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  881. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  882. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  883. end;
  884. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  885. begin
  886. case loc.loc of
  887. LOC_REFERENCE,LOC_CREFERENCE:
  888. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  889. LOC_REGISTER,LOC_CREGISTER:
  890. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  891. LOC_CONSTANT:
  892. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  893. LOC_SUBSETREG,LOC_CSUBSETREG:
  894. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  895. LOC_SUBSETREF,LOC_CSUBSETREF:
  896. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  897. else
  898. internalerror(200608053);
  899. end;
  900. end;
  901. (*
  902. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  903. in memory. They are like a regular reference, but contain an extra bit
  904. offset (either constant -startbit- or variable -bitindexreg, always OS_INT)
  905. and a bit length (always constant).
  906. Bit packed values are stored differently in memory depending on whether we
  907. are on a big or a little endian system (compatible with at least GPC). The
  908. size of the basic working unit is always the smallest power-of-2 byte size
  909. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  910. bytes, 17..32 bits -> 4 bytes etc).
  911. On a big endian, 5-bit: values are stored like this:
  912. 11111222 22333334 44445555 56666677 77788888
  913. The leftmost bit of each 5-bit value corresponds to the most significant
  914. bit.
  915. On little endian, it goes like this:
  916. 22211111 43333322 55554444 77666665 88888777
  917. In this case, per byte the left-most bit is more significant than those on
  918. the right, but the bits in the next byte are all more significant than
  919. those in the previous byte (e.g., the 222 in the first byte are the low
  920. three bits of that value, while the 22 in the second byte are the upper
  921. three bits.
  922. Big endian, 9 bit values:
  923. 11111111 12222222 22333333 33344444 ...
  924. Little endian, 9 bit values:
  925. 11111111 22222221 33333322 44444333 ...
  926. This is memory representation and the 16 bit values are byteswapped.
  927. Similarly as in the previous case, the 2222222 string contains the lower
  928. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  929. registers (two 16 bit registers in the current implementation, although a
  930. single 32 bit register would be possible too, in particular if 32 bit
  931. alignment can be guaranteed), this becomes:
  932. 22222221 11111111 44444333 33333322 ...
  933. (l)ow u l l u l u
  934. The startbit/bitindex in a subsetreference always refers to
  935. a) on big endian: the most significant bit of the value
  936. (bits counted from left to right, both memory an registers)
  937. b) on little endian: the least significant bit when the value
  938. is loaded in a register (bit counted from right to left)
  939. Although a) results in more complex code for big endian systems, it's
  940. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  941. Apple's universal interfaces which depend on these layout differences).
  942. Note: when changing the loadsize calculated in get_subsetref_load_info,
  943. make sure the appropriate alignment is guaranteed, at least in case of
  944. {$defined cpurequiresproperalignment}.
  945. *)
  946. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  947. var
  948. intloadsize: aint;
  949. begin
  950. intloadsize := packedbitsloadsize(sref.bitlen);
  951. {$ifdef cpurequiresproperalignment}
  952. { may need to be split into several smaller loads/stores }
  953. if intloadsize <> sref.ref.alignment then
  954. internalerror(2006082011);
  955. {$endif cpurequiresproperalignment}
  956. if (intloadsize = 0) then
  957. internalerror(2006081310);
  958. if (intloadsize > sizeof(aint)) then
  959. intloadsize := sizeof(aint);
  960. loadsize := int_cgsize(intloadsize);
  961. if (loadsize = OS_NO) then
  962. internalerror(2006081311);
  963. if (sref.bitlen > sizeof(aint)*8) then
  964. internalerror(2006081312);
  965. extra_load :=
  966. (intloadsize <> 1) and
  967. ((sref.bitindexreg <> NR_NO) or
  968. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  969. end;
  970. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  971. var
  972. restbits: byte;
  973. begin
  974. if (target_info.endian = endian_big) then
  975. begin
  976. { valuereg contains the upper bits, extra_value_reg the lower }
  977. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  978. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  979. { mask other bits }
  980. if (sref.bitlen <> AIntBits) then
  981. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  982. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  983. end
  984. else
  985. begin
  986. { valuereg contains the lower bits, extra_value_reg the upper }
  987. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  988. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  989. { mask other bits }
  990. if (sref.bitlen <> AIntBits) then
  991. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  992. end;
  993. { merge }
  994. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  995. end;
  996. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  997. var
  998. tmpreg: tregister;
  999. begin
  1000. tmpreg := getintregister(list,OS_INT);
  1001. if (target_info.endian = endian_big) then
  1002. begin
  1003. { since this is a dynamic index, it's possible that the value }
  1004. { is entirely in valuereg. }
  1005. { get the data in valuereg in the right place }
  1006. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1007. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1008. if (loadbitsize <> AIntBits) then
  1009. { mask left over bits }
  1010. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1011. tmpreg := getintregister(list,OS_INT);
  1012. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1013. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1014. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1015. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1016. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1017. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1018. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1019. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1020. { => extra_value_reg is now 0 }
  1021. { merge }
  1022. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1023. { no need to mask, necessary masking happened earlier on }
  1024. end
  1025. else
  1026. begin
  1027. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1028. { Y-x = -(Y-x) }
  1029. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1030. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1031. { tmpreg is in the range 1..<cpu_bitsize> -> will zero extra_value_reg }
  1032. { if all bits are in valuereg }
  1033. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1034. {$ifdef x86}
  1035. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1036. if (loadbitsize = AIntBits) then
  1037. begin
  1038. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1039. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
  1040. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1041. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1042. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1043. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1044. end;
  1045. {$endif x86}
  1046. { merge }
  1047. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1048. { mask other bits }
  1049. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1050. end;
  1051. end;
  1052. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1053. var
  1054. tmpref: treference;
  1055. valuereg,extra_value_reg: tregister;
  1056. tosreg: tsubsetregister;
  1057. loadsize: tcgsize;
  1058. loadbitsize: byte;
  1059. extra_load: boolean;
  1060. begin
  1061. get_subsetref_load_info(sref,loadsize,extra_load);
  1062. loadbitsize := tcgsize2size[loadsize]*8;
  1063. { load the (first part) of the bit sequence }
  1064. valuereg := cg.getintregister(list,OS_INT);
  1065. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1066. if not extra_load then
  1067. begin
  1068. { everything is guaranteed to be in a single register of loadsize }
  1069. if (sref.bitindexreg = NR_NO) then
  1070. begin
  1071. { use subsetreg routine, it may have been overridden with an optimized version }
  1072. tosreg.subsetreg := valuereg;
  1073. tosreg.subsetregsize := OS_INT;
  1074. { subsetregs always count bits from right to left }
  1075. if (target_info.endian = endian_big) then
  1076. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1077. else
  1078. tosreg.startbit := sref.startbit;
  1079. tosreg.bitlen := sref.bitlen;
  1080. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1081. exit;
  1082. end
  1083. else
  1084. begin
  1085. if (sref.startbit <> 0) then
  1086. internalerror(2006081510);
  1087. if (target_info.endian = endian_big) then
  1088. begin
  1089. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1090. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1091. end
  1092. else
  1093. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1094. { mask other bits }
  1095. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1096. end
  1097. end
  1098. else
  1099. begin
  1100. { load next value as well }
  1101. extra_value_reg := getintregister(list,OS_INT);
  1102. tmpref := sref.ref;
  1103. inc(tmpref.offset,loadbitsize div 8);
  1104. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1105. if (sref.bitindexreg = NR_NO) then
  1106. { can be overridden to optimize }
  1107. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1108. else
  1109. begin
  1110. if (sref.startbit <> 0) then
  1111. internalerror(2006080610);
  1112. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg);
  1113. end;
  1114. end;
  1115. { store in destination }
  1116. { (types with a negative lower bound are always a base type (8, 16, 32, 64 bits) }
  1117. if ((sref.bitlen mod 8) = 0) then
  1118. begin
  1119. { since we know all necessary bits are already masked, avoid unnecessary }
  1120. { zero-extensions }
  1121. valuereg := makeregsize(list,valuereg,tosize);
  1122. a_load_reg_reg(list,tcgsize2unsigned[tosize],tosize,valuereg,destreg)
  1123. end
  1124. else
  1125. begin
  1126. { avoid unnecessary sign extension and zeroing }
  1127. valuereg := makeregsize(list,valuereg,OS_INT);
  1128. destreg := makeregsize(list,destreg,OS_INT);
  1129. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1130. destreg := makeregsize(list,destreg,tosize);
  1131. end
  1132. end;
  1133. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1134. begin
  1135. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1136. end;
  1137. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1138. var
  1139. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1140. tosreg, fromsreg: tsubsetregister;
  1141. tmpref: treference;
  1142. loadsize: tcgsize;
  1143. loadbitsize: byte;
  1144. extra_load: boolean;
  1145. begin
  1146. { the register must be able to contain the requested value }
  1147. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1148. internalerror(2006081613);
  1149. get_subsetref_load_info(sref,loadsize,extra_load);
  1150. loadbitsize := tcgsize2size[loadsize]*8;
  1151. { load the (first part) of the bit sequence }
  1152. valuereg := cg.getintregister(list,OS_INT);
  1153. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1154. { constant offset of bit sequence? }
  1155. if not extra_load then
  1156. begin
  1157. if (sref.bitindexreg = NR_NO) then
  1158. begin
  1159. { use subsetreg routine, it may have been overridden with an optimized version }
  1160. tosreg.subsetreg := valuereg;
  1161. tosreg.subsetregsize := OS_INT;
  1162. { subsetregs always count bits from right to left }
  1163. if (target_info.endian = endian_big) then
  1164. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1165. else
  1166. tosreg.startbit := sref.startbit;
  1167. tosreg.bitlen := sref.bitlen;
  1168. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1169. end
  1170. else
  1171. begin
  1172. if (sref.startbit <> 0) then
  1173. internalerror(2006081710);
  1174. { should be handled by normal code and will give wrong result }
  1175. { on x86 for the '1 shl bitlen' below }
  1176. if (sref.bitlen = AIntBits) then
  1177. internalerror(2006081711);
  1178. { calculated correct shiftcount for big endian }
  1179. tmpindexreg := getintregister(list,OS_INT);
  1180. a_load_reg_reg(list,OS_INT,OS_INT,sref.bitindexreg,tmpindexreg);
  1181. if (target_info.endian = endian_big) then
  1182. begin
  1183. a_op_const_reg(list,OP_SUB,OS_INT,loadbitsize-sref.bitlen,tmpindexreg);
  1184. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1185. end;
  1186. { zero the bits we have to insert }
  1187. if (slopt <> SL_SETMAX) then
  1188. begin
  1189. maskreg := getintregister(list,OS_INT);
  1190. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1191. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1192. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1193. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1194. end;
  1195. { insert the value }
  1196. if (slopt <> SL_SETZERO) then
  1197. begin
  1198. tmpreg := getintregister(list,OS_INT);
  1199. if (slopt <> SL_SETMAX) then
  1200. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1201. else if (sref.bitlen <> AIntBits) then
  1202. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1203. else
  1204. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1205. if (slopt <> SL_REGNOSRCMASK) then
  1206. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1207. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg);
  1208. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1209. end;
  1210. end;
  1211. { store back to memory }
  1212. valuereg := makeregsize(list,valuereg,loadsize);
  1213. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1214. exit;
  1215. end
  1216. else
  1217. begin
  1218. { load next value }
  1219. extra_value_reg := getintregister(list,OS_INT);
  1220. tmpref := sref.ref;
  1221. inc(tmpref.offset,loadbitsize div 8);
  1222. { should maybe be taken out too, can be done more efficiently }
  1223. { on e.g. i386 with shld/shrd }
  1224. if (sref.bitindexreg = NR_NO) then
  1225. begin
  1226. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1227. fromsreg.subsetreg := fromreg;
  1228. fromsreg.subsetregsize := fromsize;
  1229. tosreg.subsetreg := valuereg;
  1230. tosreg.subsetregsize := OS_INT;
  1231. { transfer first part }
  1232. fromsreg.bitlen := loadbitsize-sref.startbit;
  1233. tosreg.bitlen := fromsreg.bitlen;
  1234. if (target_info.endian = endian_big) then
  1235. begin
  1236. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1237. { upper bits of the value ... }
  1238. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1239. { ... to bit 0 }
  1240. tosreg.startbit := 0
  1241. end
  1242. else
  1243. begin
  1244. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1245. { lower bits of the value ... }
  1246. fromsreg.startbit := 0;
  1247. { ... to startbit }
  1248. tosreg.startbit := sref.startbit;
  1249. end;
  1250. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1251. valuereg := makeregsize(list,valuereg,loadsize);
  1252. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1253. { transfer second part }
  1254. if (target_info.endian = endian_big) then
  1255. begin
  1256. { extra_value_reg must contain the lower bits of the value at bits }
  1257. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1258. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1259. { - bitlen - startbit }
  1260. fromsreg.startbit := 0;
  1261. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1262. end
  1263. else
  1264. begin
  1265. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1266. fromsreg.startbit := fromsreg.bitlen;
  1267. tosreg.startbit := 0;
  1268. end;
  1269. tosreg.subsetreg := extra_value_reg;
  1270. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1271. tosreg.bitlen := fromsreg.bitlen;
  1272. a_load_subsetreg_subsetreg(list,fromsize,subsetsize,fromsreg,tosreg);
  1273. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1274. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1275. exit;
  1276. end
  1277. else
  1278. begin
  1279. if (sref.startbit <> 0) then
  1280. internalerror(2006081812);
  1281. { should be handled by normal code and will give wrong result }
  1282. { on x86 for the '1 shl bitlen' below }
  1283. if (sref.bitlen = AIntBits) then
  1284. internalerror(2006081713);
  1285. { generate mask to zero the bits we have to insert }
  1286. if (slopt <> SL_SETMAX) then
  1287. begin
  1288. maskreg := getintregister(list,OS_INT);
  1289. if (target_info.endian = endian_big) then
  1290. begin
  1291. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1292. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1293. end
  1294. else
  1295. begin
  1296. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1297. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1298. end;
  1299. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1300. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1301. end;
  1302. { insert the value }
  1303. if (slopt <> SL_SETZERO) then
  1304. begin
  1305. tmpreg := getintregister(list,OS_INT);
  1306. if (slopt <> SL_SETMAX) then
  1307. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1308. else if (sref.bitlen <> AIntBits) then
  1309. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1310. else
  1311. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1312. if (target_info.endian = endian_big) then
  1313. begin
  1314. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1315. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) and
  1316. (loadbitsize <> AIntBits) then
  1317. { mask left over bits }
  1318. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1319. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1320. end
  1321. else
  1322. begin
  1323. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) and
  1324. (loadbitsize <> AIntBits) then
  1325. { mask left over bits }
  1326. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1327. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1328. end;
  1329. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1330. end;
  1331. valuereg := makeregsize(list,valuereg,loadsize);
  1332. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1333. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1334. tmpindexreg := getintregister(list,OS_INT);
  1335. { load current array value }
  1336. if (slopt <> SL_SETZERO) then
  1337. begin
  1338. tmpreg := getintregister(list,OS_INT);
  1339. if (slopt <> SL_SETMAX) then
  1340. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1341. else if (sref.bitlen <> AIntBits) then
  1342. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1343. else
  1344. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1345. end;
  1346. { generate mask to zero the bits we have to insert }
  1347. if (slopt <> SL_SETMAX) then
  1348. begin
  1349. maskreg := getintregister(list,OS_INT);
  1350. if (target_info.endian = endian_big) then
  1351. begin
  1352. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1353. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1354. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1355. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1356. end
  1357. else
  1358. begin
  1359. { Y-x = -(Y-x) }
  1360. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1361. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1362. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1363. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1364. {$ifdef x86}
  1365. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1366. if (loadbitsize = AIntBits) then
  1367. begin
  1368. valuereg := getintregister(list,OS_INT);
  1369. { if (tmpindexreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
  1370. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
  1371. { if (tmpindexreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
  1372. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1373. { if (tmpindexreg = cpu_bit_size) then tmpreg := maskreg := 0 }
  1374. if (slopt <> SL_SETZERO) then
  1375. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1376. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1377. end;
  1378. {$endif x86}
  1379. end;
  1380. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1381. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1382. end;
  1383. if (slopt <> SL_SETZERO) then
  1384. begin
  1385. if (target_info.endian = endian_big) then
  1386. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1387. else
  1388. begin
  1389. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1390. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1391. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1392. end;
  1393. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1394. end;
  1395. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1396. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1397. end;
  1398. end;
  1399. end;
  1400. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1401. var
  1402. tmpreg: tregister;
  1403. begin
  1404. tmpreg := getintregister(list,tosubsetsize);
  1405. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1406. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1407. end;
  1408. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1409. var
  1410. tmpreg: tregister;
  1411. begin
  1412. tmpreg := getintregister(list,tosize);
  1413. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1414. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1415. end;
  1416. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1417. var
  1418. tmpreg: tregister;
  1419. begin
  1420. tmpreg := getintregister(list,subsetsize);
  1421. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1422. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1423. end;
  1424. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1425. var
  1426. tmpreg: tregister;
  1427. slopt: tsubsetloadopt;
  1428. begin
  1429. slopt := SL_REGNOSRCMASK;
  1430. if (
  1431. { broken x86 "x shl regbitsize = x" }
  1432. ((sref.bitlen <> AIntBits) and
  1433. (aword(a) = (aword(1) shl sref.bitlen) -1)) or
  1434. ((sref.bitlen = AIntBits) and
  1435. (a = -1))
  1436. ) then
  1437. slopt := SL_SETMAX
  1438. else if (a = 0) then
  1439. slopt := SL_SETZERO;
  1440. tmpreg := getintregister(list,subsetsize);
  1441. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1442. a_load_const_reg(list,subsetsize,a,tmpreg);
  1443. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1444. end;
  1445. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1446. begin
  1447. case loc.loc of
  1448. LOC_REFERENCE,LOC_CREFERENCE:
  1449. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1450. LOC_REGISTER,LOC_CREGISTER:
  1451. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1452. LOC_SUBSETREG,LOC_CSUBSETREG:
  1453. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1454. LOC_SUBSETREF,LOC_CSUBSETREF:
  1455. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1456. else
  1457. internalerror(200608054);
  1458. end;
  1459. end;
  1460. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1461. var
  1462. tmpreg: tregister;
  1463. begin
  1464. tmpreg := getintregister(list,tosubsetsize);
  1465. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1466. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1467. end;
  1468. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1469. var
  1470. tmpreg: tregister;
  1471. begin
  1472. tmpreg := getintregister(list,tosubsetsize);
  1473. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1474. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1475. end;
  1476. {$ifdef rangeon}
  1477. {$r+}
  1478. {$undef rangeon}
  1479. {$endif}
  1480. {$ifdef overflowon}
  1481. {$q+}
  1482. {$undef overflowon}
  1483. {$endif}
  1484. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1485. var
  1486. tmpreg: tregister;
  1487. begin
  1488. { verify if we have the same reference }
  1489. if references_equal(sref,dref) then
  1490. exit;
  1491. tmpreg:=getintregister(list,tosize);
  1492. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1493. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1494. end;
  1495. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1496. var
  1497. tmpreg: tregister;
  1498. begin
  1499. tmpreg:=getintregister(list,size);
  1500. a_load_const_reg(list,size,a,tmpreg);
  1501. a_load_reg_ref(list,size,size,tmpreg,ref);
  1502. end;
  1503. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1504. begin
  1505. case loc.loc of
  1506. LOC_REFERENCE,LOC_CREFERENCE:
  1507. a_load_const_ref(list,loc.size,a,loc.reference);
  1508. LOC_REGISTER,LOC_CREGISTER:
  1509. a_load_const_reg(list,loc.size,a,loc.register);
  1510. LOC_SUBSETREG,LOC_CSUBSETREG:
  1511. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1512. LOC_SUBSETREF,LOC_CSUBSETREF:
  1513. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1514. else
  1515. internalerror(200203272);
  1516. end;
  1517. end;
  1518. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1519. begin
  1520. case loc.loc of
  1521. LOC_REFERENCE,LOC_CREFERENCE:
  1522. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1523. LOC_REGISTER,LOC_CREGISTER:
  1524. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1525. LOC_SUBSETREG,LOC_CSUBSETREG:
  1526. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1527. LOC_SUBSETREF,LOC_CSUBSETREF:
  1528. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1529. else
  1530. internalerror(200203271);
  1531. end;
  1532. end;
  1533. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  1534. begin
  1535. case loc.loc of
  1536. LOC_REFERENCE,LOC_CREFERENCE:
  1537. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1538. LOC_REGISTER,LOC_CREGISTER:
  1539. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  1540. LOC_CONSTANT:
  1541. a_load_const_reg(list,tosize,loc.value,reg);
  1542. LOC_SUBSETREG,LOC_CSUBSETREG:
  1543. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  1544. LOC_SUBSETREF,LOC_CSUBSETREF:
  1545. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  1546. else
  1547. internalerror(200109092);
  1548. end;
  1549. end;
  1550. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  1551. begin
  1552. case loc.loc of
  1553. LOC_REFERENCE,LOC_CREFERENCE:
  1554. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  1555. LOC_REGISTER,LOC_CREGISTER:
  1556. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  1557. LOC_CONSTANT:
  1558. a_load_const_ref(list,tosize,loc.value,ref);
  1559. LOC_SUBSETREG,LOC_CSUBSETREG:
  1560. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  1561. LOC_SUBSETREF,LOC_CSUBSETREF:
  1562. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  1563. else
  1564. internalerror(200109302);
  1565. end;
  1566. end;
  1567. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  1568. begin
  1569. case loc.loc of
  1570. LOC_REFERENCE,LOC_CREFERENCE:
  1571. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  1572. LOC_REGISTER,LOC_CREGISTER:
  1573. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  1574. LOC_CONSTANT:
  1575. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  1576. LOC_SUBSETREG,LOC_CSUBSETREG:
  1577. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  1578. LOC_SUBSETREF,LOC_CSUBSETREF:
  1579. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  1580. else
  1581. internalerror(2006052310);
  1582. end;
  1583. end;
  1584. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  1585. begin
  1586. case loc.loc of
  1587. LOC_REFERENCE,LOC_CREFERENCE:
  1588. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  1589. LOC_REGISTER,LOC_CREGISTER:
  1590. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  1591. LOC_SUBSETREG,LOC_CSUBSETREG:
  1592. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  1593. LOC_SUBSETREF,LOC_CSUBSETREF:
  1594. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  1595. else
  1596. internalerror(2006051510);
  1597. end;
  1598. end;
  1599. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  1600. var
  1601. powerval : longint;
  1602. begin
  1603. case op of
  1604. OP_OR :
  1605. begin
  1606. { or with zero returns same result }
  1607. if a = 0 then
  1608. op:=OP_NONE
  1609. else
  1610. { or with max returns max }
  1611. if a = -1 then
  1612. op:=OP_MOVE;
  1613. end;
  1614. OP_AND :
  1615. begin
  1616. { and with max returns same result }
  1617. if (a = -1) then
  1618. op:=OP_NONE
  1619. else
  1620. { and with 0 returns 0 }
  1621. if a=0 then
  1622. op:=OP_MOVE;
  1623. end;
  1624. OP_DIV :
  1625. begin
  1626. { division by 1 returns result }
  1627. if a = 1 then
  1628. op:=OP_NONE
  1629. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1630. begin
  1631. a := powerval;
  1632. op:= OP_SHR;
  1633. end;
  1634. end;
  1635. OP_IDIV:
  1636. begin
  1637. if a = 1 then
  1638. op:=OP_NONE;
  1639. end;
  1640. OP_MUL,OP_IMUL:
  1641. begin
  1642. if a = 1 then
  1643. op:=OP_NONE
  1644. else
  1645. if a=0 then
  1646. op:=OP_MOVE
  1647. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1648. begin
  1649. a := powerval;
  1650. op:= OP_SHL;
  1651. end;
  1652. end;
  1653. OP_ADD,OP_SUB:
  1654. begin
  1655. if a = 0 then
  1656. op:=OP_NONE;
  1657. end;
  1658. OP_SAR,OP_SHL,OP_SHR:
  1659. begin
  1660. if a = 0 then
  1661. op:=OP_NONE;
  1662. end;
  1663. end;
  1664. end;
  1665. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  1666. begin
  1667. case loc.loc of
  1668. LOC_REFERENCE, LOC_CREFERENCE:
  1669. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1670. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1671. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  1672. else
  1673. internalerror(200203301);
  1674. end;
  1675. end;
  1676. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  1677. begin
  1678. case loc.loc of
  1679. LOC_REFERENCE, LOC_CREFERENCE:
  1680. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1681. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1682. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1683. else
  1684. internalerror(48991);
  1685. end;
  1686. end;
  1687. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  1688. var
  1689. ref : treference;
  1690. begin
  1691. case cgpara.location^.loc of
  1692. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1693. begin
  1694. cgpara.check_simple_location;
  1695. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  1696. end;
  1697. LOC_REFERENCE,LOC_CREFERENCE:
  1698. begin
  1699. cgpara.check_simple_location;
  1700. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1701. a_loadfpu_reg_ref(list,size,size,r,ref);
  1702. end;
  1703. LOC_REGISTER,LOC_CREGISTER:
  1704. begin
  1705. { paramfpu_ref does the check_simpe_location check here if necessary }
  1706. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  1707. a_loadfpu_reg_ref(list,size,size,r,ref);
  1708. a_paramfpu_ref(list,size,ref,cgpara);
  1709. tg.Ungettemp(list,ref);
  1710. end;
  1711. else
  1712. internalerror(2002071004);
  1713. end;
  1714. end;
  1715. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  1716. var
  1717. href : treference;
  1718. begin
  1719. cgpara.check_simple_location;
  1720. case cgpara.location^.loc of
  1721. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1722. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  1723. LOC_REFERENCE,LOC_CREFERENCE:
  1724. begin
  1725. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1726. { concatcopy should choose the best way to copy the data }
  1727. g_concatcopy(list,ref,href,tcgsize2size[size]);
  1728. end;
  1729. else
  1730. internalerror(200402201);
  1731. end;
  1732. end;
  1733. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  1734. var
  1735. tmpreg : tregister;
  1736. begin
  1737. tmpreg:=getintregister(list,size);
  1738. a_load_ref_reg(list,size,size,ref,tmpreg);
  1739. a_op_const_reg(list,op,size,a,tmpreg);
  1740. a_load_reg_ref(list,size,size,tmpreg,ref);
  1741. end;
  1742. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  1743. var
  1744. tmpreg: tregister;
  1745. begin
  1746. tmpreg := cg.getintregister(list, size);
  1747. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  1748. a_op_const_reg(list,op,size,a,tmpreg);
  1749. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  1750. end;
  1751. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  1752. var
  1753. tmpreg: tregister;
  1754. begin
  1755. tmpreg := cg.getintregister(list, size);
  1756. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  1757. a_op_const_reg(list,op,size,a,tmpreg);
  1758. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  1759. end;
  1760. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  1761. begin
  1762. case loc.loc of
  1763. LOC_REGISTER, LOC_CREGISTER:
  1764. a_op_const_reg(list,op,loc.size,a,loc.register);
  1765. LOC_REFERENCE, LOC_CREFERENCE:
  1766. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1767. LOC_SUBSETREG, LOC_CSUBSETREG:
  1768. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  1769. LOC_SUBSETREF, LOC_CSUBSETREF:
  1770. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  1771. else
  1772. internalerror(200109061);
  1773. end;
  1774. end;
  1775. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1776. var
  1777. tmpreg : tregister;
  1778. begin
  1779. tmpreg:=getintregister(list,size);
  1780. a_load_ref_reg(list,size,size,ref,tmpreg);
  1781. a_op_reg_reg(list,op,size,reg,tmpreg);
  1782. a_load_reg_ref(list,size,size,tmpreg,ref);
  1783. end;
  1784. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1785. var
  1786. tmpreg: tregister;
  1787. begin
  1788. case op of
  1789. OP_NOT,OP_NEG:
  1790. { handle it as "load ref,reg; op reg" }
  1791. begin
  1792. a_load_ref_reg(list,size,size,ref,reg);
  1793. a_op_reg_reg(list,op,size,reg,reg);
  1794. end;
  1795. else
  1796. begin
  1797. tmpreg:=getintregister(list,size);
  1798. a_load_ref_reg(list,size,size,ref,tmpreg);
  1799. a_op_reg_reg(list,op,size,tmpreg,reg);
  1800. end;
  1801. end;
  1802. end;
  1803. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  1804. var
  1805. tmpreg: tregister;
  1806. begin
  1807. tmpreg := cg.getintregister(list, opsize);
  1808. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  1809. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1810. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  1811. end;
  1812. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  1813. var
  1814. tmpreg: tregister;
  1815. begin
  1816. tmpreg := cg.getintregister(list, opsize);
  1817. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  1818. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1819. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  1820. end;
  1821. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  1822. begin
  1823. case loc.loc of
  1824. LOC_REGISTER, LOC_CREGISTER:
  1825. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1826. LOC_REFERENCE, LOC_CREFERENCE:
  1827. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1828. LOC_SUBSETREG, LOC_CSUBSETREG:
  1829. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  1830. LOC_SUBSETREF, LOC_CSUBSETREF:
  1831. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  1832. else
  1833. internalerror(200109061);
  1834. end;
  1835. end;
  1836. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1837. var
  1838. tmpreg: tregister;
  1839. begin
  1840. case loc.loc of
  1841. LOC_REGISTER,LOC_CREGISTER:
  1842. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1843. LOC_REFERENCE,LOC_CREFERENCE:
  1844. begin
  1845. tmpreg:=getintregister(list,loc.size);
  1846. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1847. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1848. end;
  1849. LOC_SUBSETREG, LOC_CSUBSETREG:
  1850. begin
  1851. tmpreg:=getintregister(list,loc.size);
  1852. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1853. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  1854. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1855. end;
  1856. LOC_SUBSETREF, LOC_CSUBSETREF:
  1857. begin
  1858. tmpreg:=getintregister(list,loc.size);
  1859. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  1860. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  1861. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  1862. end;
  1863. else
  1864. internalerror(200109061);
  1865. end;
  1866. end;
  1867. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  1868. a:aint;src,dst:Tregister);
  1869. begin
  1870. a_load_reg_reg(list,size,size,src,dst);
  1871. a_op_const_reg(list,op,size,a,dst);
  1872. end;
  1873. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  1874. size: tcgsize; src1, src2, dst: tregister);
  1875. var
  1876. tmpreg: tregister;
  1877. begin
  1878. if (dst<>src1) then
  1879. begin
  1880. a_load_reg_reg(list,size,size,src2,dst);
  1881. a_op_reg_reg(list,op,size,src1,dst);
  1882. end
  1883. else
  1884. begin
  1885. tmpreg:=getintregister(list,size);
  1886. a_load_reg_reg(list,size,size,src2,tmpreg);
  1887. a_op_reg_reg(list,op,size,src1,tmpreg);
  1888. a_load_reg_reg(list,size,size,tmpreg,dst);
  1889. end;
  1890. end;
  1891. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1892. begin
  1893. a_op_const_reg_reg(list,op,size,a,src,dst);
  1894. ovloc.loc:=LOC_VOID;
  1895. end;
  1896. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1897. begin
  1898. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  1899. ovloc.loc:=LOC_VOID;
  1900. end;
  1901. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  1902. l : tasmlabel);
  1903. var
  1904. tmpreg: tregister;
  1905. begin
  1906. tmpreg:=getintregister(list,size);
  1907. a_load_ref_reg(list,size,size,ref,tmpreg);
  1908. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1909. end;
  1910. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  1911. l : tasmlabel);
  1912. var
  1913. tmpreg : tregister;
  1914. begin
  1915. case loc.loc of
  1916. LOC_REGISTER,LOC_CREGISTER:
  1917. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1918. LOC_REFERENCE,LOC_CREFERENCE:
  1919. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1920. LOC_SUBSETREG, LOC_CSUBSETREG:
  1921. begin
  1922. tmpreg:=getintregister(list,size);
  1923. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  1924. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1925. end;
  1926. LOC_SUBSETREF, LOC_CSUBSETREF:
  1927. begin
  1928. tmpreg:=getintregister(list,size);
  1929. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  1930. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1931. end;
  1932. else
  1933. internalerror(200109061);
  1934. end;
  1935. end;
  1936. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1937. var
  1938. tmpreg: tregister;
  1939. begin
  1940. tmpreg:=getintregister(list,size);
  1941. a_load_ref_reg(list,size,size,ref,tmpreg);
  1942. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1943. end;
  1944. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1945. var
  1946. tmpreg: tregister;
  1947. begin
  1948. tmpreg:=getintregister(list,size);
  1949. a_load_ref_reg(list,size,size,ref,tmpreg);
  1950. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1951. end;
  1952. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  1953. begin
  1954. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  1955. end;
  1956. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1957. begin
  1958. case loc.loc of
  1959. LOC_REGISTER,
  1960. LOC_CREGISTER:
  1961. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1962. LOC_REFERENCE,
  1963. LOC_CREFERENCE :
  1964. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1965. LOC_CONSTANT:
  1966. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1967. LOC_SUBSETREG,
  1968. LOC_CSUBSETREG:
  1969. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  1970. LOC_SUBSETREF,
  1971. LOC_CSUBSETREF:
  1972. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  1973. else
  1974. internalerror(200203231);
  1975. end;
  1976. end;
  1977. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  1978. var
  1979. tmpreg: tregister;
  1980. begin
  1981. tmpreg:=getintregister(list, cmpsize);
  1982. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  1983. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  1984. end;
  1985. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  1986. var
  1987. tmpreg: tregister;
  1988. begin
  1989. tmpreg:=getintregister(list, cmpsize);
  1990. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  1991. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  1992. end;
  1993. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1994. l : tasmlabel);
  1995. var
  1996. tmpreg: tregister;
  1997. begin
  1998. case loc.loc of
  1999. LOC_REGISTER,LOC_CREGISTER:
  2000. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2001. LOC_REFERENCE,LOC_CREFERENCE:
  2002. begin
  2003. tmpreg:=getintregister(list,size);
  2004. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2005. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2006. end;
  2007. LOC_SUBSETREG, LOC_CSUBSETREG:
  2008. begin
  2009. tmpreg:=getintregister(list, size);
  2010. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2011. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2012. end;
  2013. LOC_SUBSETREF, LOC_CSUBSETREF:
  2014. begin
  2015. tmpreg:=getintregister(list, size);
  2016. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2017. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2018. end;
  2019. else
  2020. internalerror(200109061);
  2021. end;
  2022. end;
  2023. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2024. begin
  2025. case loc.loc of
  2026. LOC_MMREGISTER,LOC_CMMREGISTER:
  2027. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2028. LOC_REFERENCE,LOC_CREFERENCE:
  2029. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2030. else
  2031. internalerror(200310121);
  2032. end;
  2033. end;
  2034. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2035. begin
  2036. case loc.loc of
  2037. LOC_MMREGISTER,LOC_CMMREGISTER:
  2038. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2039. LOC_REFERENCE,LOC_CREFERENCE:
  2040. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2041. else
  2042. internalerror(200310122);
  2043. end;
  2044. end;
  2045. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2046. var
  2047. href : treference;
  2048. begin
  2049. cgpara.check_simple_location;
  2050. case cgpara.location^.loc of
  2051. LOC_MMREGISTER,LOC_CMMREGISTER:
  2052. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2053. LOC_REFERENCE,LOC_CREFERENCE:
  2054. begin
  2055. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2056. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2057. end
  2058. else
  2059. internalerror(200310123);
  2060. end;
  2061. end;
  2062. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2063. var
  2064. hr : tregister;
  2065. hs : tmmshuffle;
  2066. begin
  2067. cgpara.check_simple_location;
  2068. hr:=getmmregister(list,cgpara.location^.size);
  2069. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2070. if realshuffle(shuffle) then
  2071. begin
  2072. hs:=shuffle^;
  2073. removeshuffles(hs);
  2074. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2075. end
  2076. else
  2077. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2078. end;
  2079. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2080. begin
  2081. case loc.loc of
  2082. LOC_MMREGISTER,LOC_CMMREGISTER:
  2083. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2084. LOC_REFERENCE,LOC_CREFERENCE:
  2085. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2086. else
  2087. internalerror(200310123);
  2088. end;
  2089. end;
  2090. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2091. var
  2092. hr : tregister;
  2093. hs : tmmshuffle;
  2094. begin
  2095. hr:=getmmregister(list,size);
  2096. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2097. if realshuffle(shuffle) then
  2098. begin
  2099. hs:=shuffle^;
  2100. removeshuffles(hs);
  2101. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2102. end
  2103. else
  2104. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2105. end;
  2106. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2107. var
  2108. hr : tregister;
  2109. hs : tmmshuffle;
  2110. begin
  2111. hr:=getmmregister(list,size);
  2112. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2113. if realshuffle(shuffle) then
  2114. begin
  2115. hs:=shuffle^;
  2116. removeshuffles(hs);
  2117. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2118. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2119. end
  2120. else
  2121. begin
  2122. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2123. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2124. end;
  2125. end;
  2126. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2127. begin
  2128. case loc.loc of
  2129. LOC_CMMREGISTER,LOC_MMREGISTER:
  2130. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2131. LOC_CREFERENCE,LOC_REFERENCE:
  2132. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2133. else
  2134. internalerror(200312232);
  2135. end;
  2136. end;
  2137. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2138. begin
  2139. g_concatcopy(list,source,dest,len);
  2140. end;
  2141. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2142. var
  2143. cgpara1,cgpara2,cgpara3 : TCGPara;
  2144. begin
  2145. cgpara1.init;
  2146. cgpara2.init;
  2147. cgpara3.init;
  2148. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2149. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2150. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2151. paramanager.allocparaloc(list,cgpara3);
  2152. a_paramaddr_ref(list,dest,cgpara3);
  2153. paramanager.allocparaloc(list,cgpara2);
  2154. a_paramaddr_ref(list,source,cgpara2);
  2155. paramanager.allocparaloc(list,cgpara1);
  2156. a_param_const(list,OS_INT,len,cgpara1);
  2157. paramanager.freeparaloc(list,cgpara3);
  2158. paramanager.freeparaloc(list,cgpara2);
  2159. paramanager.freeparaloc(list,cgpara1);
  2160. allocallcpuregisters(list);
  2161. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  2162. deallocallcpuregisters(list);
  2163. cgpara3.done;
  2164. cgpara2.done;
  2165. cgpara1.done;
  2166. end;
  2167. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2168. var
  2169. cgpara1,cgpara2 : TCGPara;
  2170. begin
  2171. cgpara1.init;
  2172. cgpara2.init;
  2173. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2174. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2175. paramanager.allocparaloc(list,cgpara2);
  2176. a_paramaddr_ref(list,dest,cgpara2);
  2177. paramanager.allocparaloc(list,cgpara1);
  2178. a_paramaddr_ref(list,source,cgpara1);
  2179. paramanager.freeparaloc(list,cgpara2);
  2180. paramanager.freeparaloc(list,cgpara1);
  2181. allocallcpuregisters(list);
  2182. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE');
  2183. deallocallcpuregisters(list);
  2184. cgpara2.done;
  2185. cgpara1.done;
  2186. end;
  2187. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2188. var
  2189. href : treference;
  2190. incrfunc : string;
  2191. cgpara1,cgpara2 : TCGPara;
  2192. begin
  2193. cgpara1.init;
  2194. cgpara2.init;
  2195. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2196. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2197. if is_interfacecom(t) then
  2198. incrfunc:='FPC_INTF_INCR_REF'
  2199. else if is_ansistring(t) then
  2200. incrfunc:='FPC_ANSISTR_INCR_REF'
  2201. else if is_widestring(t) then
  2202. incrfunc:='FPC_WIDESTR_INCR_REF'
  2203. else if is_dynamic_array(t) then
  2204. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2205. else
  2206. incrfunc:='';
  2207. { call the special incr function or the generic addref }
  2208. if incrfunc<>'' then
  2209. begin
  2210. paramanager.allocparaloc(list,cgpara1);
  2211. { widestrings aren't ref. counted on all platforms so we need the address
  2212. to create a real copy }
  2213. if is_widestring(t) then
  2214. a_paramaddr_ref(list,ref,cgpara1)
  2215. else
  2216. { these functions get the pointer by value }
  2217. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2218. paramanager.freeparaloc(list,cgpara1);
  2219. allocallcpuregisters(list);
  2220. a_call_name(list,incrfunc);
  2221. deallocallcpuregisters(list);
  2222. end
  2223. else
  2224. begin
  2225. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2226. paramanager.allocparaloc(list,cgpara2);
  2227. a_paramaddr_ref(list,href,cgpara2);
  2228. paramanager.allocparaloc(list,cgpara1);
  2229. a_paramaddr_ref(list,ref,cgpara1);
  2230. paramanager.freeparaloc(list,cgpara1);
  2231. paramanager.freeparaloc(list,cgpara2);
  2232. allocallcpuregisters(list);
  2233. a_call_name(list,'FPC_ADDREF');
  2234. deallocallcpuregisters(list);
  2235. end;
  2236. cgpara2.done;
  2237. cgpara1.done;
  2238. end;
  2239. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2240. var
  2241. href : treference;
  2242. decrfunc : string;
  2243. needrtti : boolean;
  2244. cgpara1,cgpara2 : TCGPara;
  2245. tempreg1,tempreg2 : TRegister;
  2246. begin
  2247. cgpara1.init;
  2248. cgpara2.init;
  2249. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2250. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2251. needrtti:=false;
  2252. if is_interfacecom(t) then
  2253. decrfunc:='FPC_INTF_DECR_REF'
  2254. else if is_ansistring(t) then
  2255. decrfunc:='FPC_ANSISTR_DECR_REF'
  2256. else if is_widestring(t) then
  2257. decrfunc:='FPC_WIDESTR_DECR_REF'
  2258. else if is_dynamic_array(t) then
  2259. begin
  2260. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2261. needrtti:=true;
  2262. end
  2263. else
  2264. decrfunc:='';
  2265. { call the special decr function or the generic decref }
  2266. if decrfunc<>'' then
  2267. begin
  2268. if needrtti then
  2269. begin
  2270. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2271. tempreg2:=getaddressregister(list);
  2272. a_loadaddr_ref_reg(list,href,tempreg2);
  2273. end;
  2274. tempreg1:=getaddressregister(list);
  2275. a_loadaddr_ref_reg(list,ref,tempreg1);
  2276. if needrtti then
  2277. begin
  2278. paramanager.allocparaloc(list,cgpara2);
  2279. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2280. paramanager.freeparaloc(list,cgpara2);
  2281. end;
  2282. paramanager.allocparaloc(list,cgpara1);
  2283. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2284. paramanager.freeparaloc(list,cgpara1);
  2285. allocallcpuregisters(list);
  2286. a_call_name(list,decrfunc);
  2287. deallocallcpuregisters(list);
  2288. end
  2289. else
  2290. begin
  2291. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2292. paramanager.allocparaloc(list,cgpara2);
  2293. a_paramaddr_ref(list,href,cgpara2);
  2294. paramanager.allocparaloc(list,cgpara1);
  2295. a_paramaddr_ref(list,ref,cgpara1);
  2296. paramanager.freeparaloc(list,cgpara1);
  2297. paramanager.freeparaloc(list,cgpara2);
  2298. allocallcpuregisters(list);
  2299. a_call_name(list,'FPC_DECREF');
  2300. deallocallcpuregisters(list);
  2301. end;
  2302. cgpara2.done;
  2303. cgpara1.done;
  2304. end;
  2305. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2306. var
  2307. href : treference;
  2308. cgpara1,cgpara2 : TCGPara;
  2309. begin
  2310. cgpara1.init;
  2311. cgpara2.init;
  2312. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2313. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2314. if is_ansistring(t) or
  2315. is_widestring(t) or
  2316. is_interfacecom(t) or
  2317. is_dynamic_array(t) then
  2318. a_load_const_ref(list,OS_ADDR,0,ref)
  2319. else
  2320. begin
  2321. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2322. paramanager.allocparaloc(list,cgpara2);
  2323. a_paramaddr_ref(list,href,cgpara2);
  2324. paramanager.allocparaloc(list,cgpara1);
  2325. a_paramaddr_ref(list,ref,cgpara1);
  2326. paramanager.freeparaloc(list,cgpara1);
  2327. paramanager.freeparaloc(list,cgpara2);
  2328. allocallcpuregisters(list);
  2329. a_call_name(list,'FPC_INITIALIZE');
  2330. deallocallcpuregisters(list);
  2331. end;
  2332. cgpara1.done;
  2333. cgpara2.done;
  2334. end;
  2335. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2336. var
  2337. href : treference;
  2338. cgpara1,cgpara2 : TCGPara;
  2339. begin
  2340. cgpara1.init;
  2341. cgpara2.init;
  2342. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2343. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2344. if is_ansistring(t) or
  2345. is_widestring(t) or
  2346. is_interfacecom(t) then
  2347. begin
  2348. g_decrrefcount(list,t,ref);
  2349. a_load_const_ref(list,OS_ADDR,0,ref);
  2350. end
  2351. else
  2352. begin
  2353. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2354. paramanager.allocparaloc(list,cgpara2);
  2355. a_paramaddr_ref(list,href,cgpara2);
  2356. paramanager.allocparaloc(list,cgpara1);
  2357. a_paramaddr_ref(list,ref,cgpara1);
  2358. paramanager.freeparaloc(list,cgpara1);
  2359. paramanager.freeparaloc(list,cgpara2);
  2360. allocallcpuregisters(list);
  2361. a_call_name(list,'FPC_FINALIZE');
  2362. deallocallcpuregisters(list);
  2363. end;
  2364. cgpara1.done;
  2365. cgpara2.done;
  2366. end;
  2367. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2368. { generate range checking code for the value at location p. The type }
  2369. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2370. { is the original type used at that location. When both defs are equal }
  2371. { the check is also insert (needed for succ,pref,inc,dec) }
  2372. const
  2373. aintmax=high(aint);
  2374. var
  2375. neglabel : tasmlabel;
  2376. hreg : tregister;
  2377. lto,hto,
  2378. lfrom,hfrom : TConstExprInt;
  2379. fromsize, tosize: cardinal;
  2380. from_signed, to_signed: boolean;
  2381. begin
  2382. { range checking on and range checkable value? }
  2383. if not(cs_check_range in current_settings.localswitches) or
  2384. not(fromdef.typ in [orddef,enumdef]) then
  2385. exit;
  2386. {$ifndef cpu64bit}
  2387. { handle 64bit rangechecks separate for 32bit processors }
  2388. if is_64bit(fromdef) or is_64bit(todef) then
  2389. begin
  2390. cg64.g_rangecheck64(list,l,fromdef,todef);
  2391. exit;
  2392. end;
  2393. {$endif cpu64bit}
  2394. { only check when assigning to scalar, subranges are different, }
  2395. { when todef=fromdef then the check is always generated }
  2396. getrange(fromdef,lfrom,hfrom);
  2397. getrange(todef,lto,hto);
  2398. from_signed := is_signed(fromdef);
  2399. to_signed := is_signed(todef);
  2400. { check the rangedef of the array, not the array itself }
  2401. { (only change now, since getrange needs the arraydef) }
  2402. if (todef.typ = arraydef) then
  2403. todef := tarraydef(todef).rangedef;
  2404. { no range check if from and to are equal and are both longint/dword }
  2405. { no range check if from and to are equal and are both longint/dword }
  2406. { (if we have a 32bit processor) or int64/qword, since such }
  2407. { operations can at most cause overflows (JM) }
  2408. { Note that these checks are mostly processor independent, they only }
  2409. { have to be changed once we introduce 64bit subrange types }
  2410. {$ifdef cpu64bit}
  2411. if (fromdef = todef) and
  2412. (fromdef.typ=orddef) and
  2413. (((((torddef(fromdef).ordtype = s64bit) and
  2414. (lfrom = low(int64)) and
  2415. (hfrom = high(int64))) or
  2416. ((torddef(fromdef).ordtype = u64bit) and
  2417. (lfrom = low(qword)) and
  2418. (hfrom = high(qword))) or
  2419. ((torddef(fromdef).ordtype = scurrency) and
  2420. (lfrom = low(int64)) and
  2421. (hfrom = high(int64)))))) then
  2422. exit;
  2423. {$else cpu64bit}
  2424. if (fromdef = todef) and
  2425. (fromdef.typ=orddef) and
  2426. (((((torddef(fromdef).ordtype = s32bit) and
  2427. (lfrom = low(longint)) and
  2428. (hfrom = high(longint))) or
  2429. ((torddef(fromdef).ordtype = u32bit) and
  2430. (lfrom = low(cardinal)) and
  2431. (hfrom = high(cardinal)))))) then
  2432. exit;
  2433. {$endif cpu64bit}
  2434. { optimize some range checks away in safe cases }
  2435. fromsize := fromdef.size;
  2436. tosize := todef.size;
  2437. if ((from_signed = to_signed) or
  2438. (not from_signed)) and
  2439. (lto<=lfrom) and (hto>=hfrom) and
  2440. (fromsize <= tosize) then
  2441. begin
  2442. { if fromsize < tosize, and both have the same signed-ness or }
  2443. { fromdef is unsigned, then all bit patterns from fromdef are }
  2444. { valid for todef as well }
  2445. if (fromsize < tosize) then
  2446. exit;
  2447. if (fromsize = tosize) and
  2448. (from_signed = to_signed) then
  2449. { only optimize away if all bit patterns which fit in fromsize }
  2450. { are valid for the todef }
  2451. begin
  2452. {$ifopt Q+}
  2453. {$define overflowon}
  2454. {$Q-}
  2455. {$endif}
  2456. if to_signed then
  2457. begin
  2458. { calculation of the low/high ranges must not overflow 64 bit
  2459. otherwise we end up comparing with zero for 64 bit data types on
  2460. 64 bit processors }
  2461. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2462. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2463. exit
  2464. end
  2465. else
  2466. begin
  2467. { calculation of the low/high ranges must not overflow 64 bit
  2468. otherwise we end up having all zeros for 64 bit data types on
  2469. 64 bit processors }
  2470. if (lto = 0) and
  2471. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2472. exit
  2473. end;
  2474. {$ifdef overflowon}
  2475. {$Q+}
  2476. {$undef overflowon}
  2477. {$endif}
  2478. end
  2479. end;
  2480. { generate the rangecheck code for the def where we are going to }
  2481. { store the result }
  2482. { use the trick that }
  2483. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2484. { To be able to do that, we have to make sure however that either }
  2485. { fromdef and todef are both signed or unsigned, or that we leave }
  2486. { the parts < 0 and > maxlongint out }
  2487. if from_signed xor to_signed then
  2488. begin
  2489. if from_signed then
  2490. { from is signed, to is unsigned }
  2491. begin
  2492. { if high(from) < 0 -> always range error }
  2493. if (hfrom < 0) or
  2494. { if low(to) > maxlongint also range error }
  2495. (lto > aintmax) then
  2496. begin
  2497. a_call_name(list,'FPC_RANGEERROR');
  2498. exit
  2499. end;
  2500. { from is signed and to is unsigned -> when looking at to }
  2501. { as an signed value, it must be < maxaint (otherwise }
  2502. { it will become negative, which is invalid since "to" is unsigned) }
  2503. if hto > aintmax then
  2504. hto := aintmax;
  2505. end
  2506. else
  2507. { from is unsigned, to is signed }
  2508. begin
  2509. if (lfrom > aintmax) or
  2510. (hto < 0) then
  2511. begin
  2512. a_call_name(list,'FPC_RANGEERROR');
  2513. exit
  2514. end;
  2515. { from is unsigned and to is signed -> when looking at to }
  2516. { as an unsigned value, it must be >= 0 (since negative }
  2517. { values are the same as values > maxlongint) }
  2518. if lto < 0 then
  2519. lto := 0;
  2520. end;
  2521. end;
  2522. hreg:=getintregister(list,OS_INT);
  2523. a_load_loc_reg(list,OS_INT,l,hreg);
  2524. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  2525. current_asmdata.getjumplabel(neglabel);
  2526. {
  2527. if from_signed then
  2528. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  2529. else
  2530. }
  2531. {$ifdef cpu64bit}
  2532. if qword(hto-lto)>qword(aintmax) then
  2533. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  2534. else
  2535. {$endif cpu64bit}
  2536. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  2537. a_call_name(list,'FPC_RANGEERROR');
  2538. a_label(list,neglabel);
  2539. end;
  2540. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  2541. begin
  2542. g_overflowCheck(list,loc,def);
  2543. end;
  2544. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  2545. var
  2546. tmpreg : tregister;
  2547. begin
  2548. tmpreg:=getintregister(list,size);
  2549. g_flags2reg(list,size,f,tmpreg);
  2550. a_load_reg_ref(list,size,size,tmpreg,ref);
  2551. end;
  2552. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  2553. var
  2554. OKLabel : tasmlabel;
  2555. cgpara1 : TCGPara;
  2556. begin
  2557. if (cs_check_object in current_settings.localswitches) or
  2558. (cs_check_range in current_settings.localswitches) then
  2559. begin
  2560. current_asmdata.getjumplabel(oklabel);
  2561. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  2562. cgpara1.init;
  2563. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2564. paramanager.allocparaloc(list,cgpara1);
  2565. a_param_const(list,OS_INT,210,cgpara1);
  2566. paramanager.freeparaloc(list,cgpara1);
  2567. a_call_name(list,'FPC_HANDLEERROR');
  2568. a_label(list,oklabel);
  2569. cgpara1.done;
  2570. end;
  2571. end;
  2572. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  2573. var
  2574. hrefvmt : treference;
  2575. cgpara1,cgpara2 : TCGPara;
  2576. begin
  2577. cgpara1.init;
  2578. cgpara2.init;
  2579. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2580. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2581. if (cs_check_object in current_settings.localswitches) then
  2582. begin
  2583. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  2584. paramanager.allocparaloc(list,cgpara2);
  2585. a_paramaddr_ref(list,hrefvmt,cgpara2);
  2586. paramanager.allocparaloc(list,cgpara1);
  2587. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2588. paramanager.freeparaloc(list,cgpara1);
  2589. paramanager.freeparaloc(list,cgpara2);
  2590. allocallcpuregisters(list);
  2591. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  2592. deallocallcpuregisters(list);
  2593. end
  2594. else
  2595. if (cs_check_range in current_settings.localswitches) then
  2596. begin
  2597. paramanager.allocparaloc(list,cgpara1);
  2598. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2599. paramanager.freeparaloc(list,cgpara1);
  2600. allocallcpuregisters(list);
  2601. a_call_name(list,'FPC_CHECK_OBJECT');
  2602. deallocallcpuregisters(list);
  2603. end;
  2604. cgpara1.done;
  2605. cgpara2.done;
  2606. end;
  2607. {*****************************************************************************
  2608. Entry/Exit Code Functions
  2609. *****************************************************************************}
  2610. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  2611. var
  2612. sizereg,sourcereg,lenreg : tregister;
  2613. cgpara1,cgpara2,cgpara3 : TCGPara;
  2614. begin
  2615. { because some abis don't support dynamic stack allocation properly
  2616. open array value parameters are copied onto the heap
  2617. }
  2618. { calculate necessary memory }
  2619. { read/write operations on one register make the life of the register allocator hard }
  2620. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  2621. begin
  2622. lenreg:=getintregister(list,OS_INT);
  2623. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  2624. end
  2625. else
  2626. lenreg:=lenloc.register;
  2627. sizereg:=getintregister(list,OS_INT);
  2628. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  2629. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  2630. { load source }
  2631. sourcereg:=getaddressregister(list);
  2632. a_loadaddr_ref_reg(list,ref,sourcereg);
  2633. { do getmem call }
  2634. cgpara1.init;
  2635. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2636. paramanager.allocparaloc(list,cgpara1);
  2637. a_param_reg(list,OS_INT,sizereg,cgpara1);
  2638. paramanager.freeparaloc(list,cgpara1);
  2639. allocallcpuregisters(list);
  2640. a_call_name(list,'FPC_GETMEM');
  2641. deallocallcpuregisters(list);
  2642. cgpara1.done;
  2643. { return the new address }
  2644. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  2645. { do move call }
  2646. cgpara1.init;
  2647. cgpara2.init;
  2648. cgpara3.init;
  2649. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2650. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2651. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2652. { load size }
  2653. paramanager.allocparaloc(list,cgpara3);
  2654. a_param_reg(list,OS_INT,sizereg,cgpara3);
  2655. { load destination }
  2656. paramanager.allocparaloc(list,cgpara2);
  2657. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  2658. { load source }
  2659. paramanager.allocparaloc(list,cgpara1);
  2660. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  2661. paramanager.freeparaloc(list,cgpara3);
  2662. paramanager.freeparaloc(list,cgpara2);
  2663. paramanager.freeparaloc(list,cgpara1);
  2664. allocallcpuregisters(list);
  2665. a_call_name(list,'FPC_MOVE');
  2666. deallocallcpuregisters(list);
  2667. cgpara3.done;
  2668. cgpara2.done;
  2669. cgpara1.done;
  2670. end;
  2671. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  2672. var
  2673. cgpara1 : TCGPara;
  2674. begin
  2675. { do move call }
  2676. cgpara1.init;
  2677. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2678. { load source }
  2679. paramanager.allocparaloc(list,cgpara1);
  2680. a_param_loc(list,l,cgpara1);
  2681. paramanager.freeparaloc(list,cgpara1);
  2682. allocallcpuregisters(list);
  2683. a_call_name(list,'FPC_FREEMEM');
  2684. deallocallcpuregisters(list);
  2685. cgpara1.done;
  2686. end;
  2687. procedure tcg.g_save_standard_registers(list:TAsmList);
  2688. var
  2689. href : treference;
  2690. size : longint;
  2691. r : integer;
  2692. begin
  2693. { Get temp }
  2694. size:=0;
  2695. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2696. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2697. inc(size,sizeof(aint));
  2698. if size>0 then
  2699. begin
  2700. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  2701. { Copy registers to temp }
  2702. href:=current_procinfo.save_regs_ref;
  2703. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2704. begin
  2705. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2706. begin
  2707. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  2708. inc(href.offset,sizeof(aint));
  2709. end;
  2710. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  2711. end;
  2712. end;
  2713. end;
  2714. procedure tcg.g_restore_standard_registers(list:TAsmList);
  2715. var
  2716. href : treference;
  2717. r : integer;
  2718. hreg : tregister;
  2719. begin
  2720. { Copy registers from temp }
  2721. href:=current_procinfo.save_regs_ref;
  2722. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2723. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2724. begin
  2725. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  2726. { Allocate register so the optimizer does not remove the load }
  2727. a_reg_alloc(list,hreg);
  2728. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  2729. inc(href.offset,sizeof(aint));
  2730. end;
  2731. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  2732. end;
  2733. procedure tcg.g_profilecode(list : TAsmList);
  2734. begin
  2735. end;
  2736. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  2737. begin
  2738. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  2739. end;
  2740. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  2741. begin
  2742. a_load_const_ref(list, OS_INT, a, href);
  2743. end;
  2744. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  2745. begin
  2746. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  2747. end;
  2748. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  2749. var
  2750. hsym : tsym;
  2751. href : treference;
  2752. paraloc : tcgparalocation;
  2753. begin
  2754. { calculate the parameter info for the procdef }
  2755. if not procdef.has_paraloc_info then
  2756. begin
  2757. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  2758. procdef.has_paraloc_info:=true;
  2759. end;
  2760. hsym:=tsym(procdef.parast.Find('self'));
  2761. if not(assigned(hsym) and
  2762. (hsym.typ=paravarsym)) then
  2763. internalerror(200305251);
  2764. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  2765. case paraloc.loc of
  2766. LOC_REGISTER:
  2767. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  2768. LOC_REFERENCE:
  2769. begin
  2770. { offset in the wrapper needs to be adjusted for the stored
  2771. return address }
  2772. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  2773. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  2774. end
  2775. else
  2776. internalerror(200309189);
  2777. end;
  2778. end;
  2779. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  2780. begin
  2781. a_call_name(list,s);
  2782. end;
  2783. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  2784. var
  2785. l: tasmsymbol;
  2786. ref: treference;
  2787. begin
  2788. result := NR_NO;
  2789. case target_info.system of
  2790. system_powerpc_darwin,
  2791. system_i386_darwin:
  2792. begin
  2793. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  2794. if not(assigned(l)) then
  2795. begin
  2796. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_COMMON,AT_DATA);
  2797. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  2798. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  2799. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  2800. end;
  2801. result := cg.getaddressregister(list);
  2802. reference_reset_symbol(ref,l,0);
  2803. { ref.base:=current_procinfo.got;
  2804. ref.relsymbol:=current_procinfo.CurrGOTLabel;}
  2805. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  2806. end;
  2807. end;
  2808. end;
  2809. {*****************************************************************************
  2810. TCG64
  2811. *****************************************************************************}
  2812. {$ifndef cpu64bit}
  2813. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  2814. begin
  2815. a_load64_reg_reg(list,regsrc,regdst);
  2816. a_op64_const_reg(list,op,size,value,regdst);
  2817. end;
  2818. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  2819. var
  2820. tmpreg64 : tregister64;
  2821. begin
  2822. { when src1=dst then we need to first create a temp to prevent
  2823. overwriting src1 with src2 }
  2824. if (regsrc1.reghi=regdst.reghi) or
  2825. (regsrc1.reglo=regdst.reghi) or
  2826. (regsrc1.reghi=regdst.reglo) or
  2827. (regsrc1.reglo=regdst.reglo) then
  2828. begin
  2829. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2830. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2831. a_load64_reg_reg(list,regsrc2,tmpreg64);
  2832. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  2833. a_load64_reg_reg(list,tmpreg64,regdst);
  2834. end
  2835. else
  2836. begin
  2837. a_load64_reg_reg(list,regsrc2,regdst);
  2838. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  2839. end;
  2840. end;
  2841. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  2842. var
  2843. tmpreg64 : tregister64;
  2844. begin
  2845. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2846. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2847. a_load64_subsetref_reg(list,sref,tmpreg64);
  2848. a_op64_const_reg(list,op,size,a,tmpreg64);
  2849. a_load64_reg_subsetref(list,tmpreg64,sref);
  2850. end;
  2851. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  2852. var
  2853. tmpreg64 : tregister64;
  2854. begin
  2855. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2856. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2857. a_load64_subsetref_reg(list,sref,tmpreg64);
  2858. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  2859. a_load64_reg_subsetref(list,tmpreg64,sref);
  2860. end;
  2861. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  2862. var
  2863. tmpreg64 : tregister64;
  2864. begin
  2865. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2866. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2867. a_load64_subsetref_reg(list,sref,tmpreg64);
  2868. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  2869. a_load64_reg_subsetref(list,tmpreg64,sref);
  2870. end;
  2871. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  2872. var
  2873. tmpreg64 : tregister64;
  2874. begin
  2875. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2876. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2877. a_load64_subsetref_reg(list,ssref,tmpreg64);
  2878. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  2879. end;
  2880. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2881. begin
  2882. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  2883. ovloc.loc:=LOC_VOID;
  2884. end;
  2885. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2886. begin
  2887. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  2888. ovloc.loc:=LOC_VOID;
  2889. end;
  2890. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  2891. begin
  2892. case l.loc of
  2893. LOC_REFERENCE, LOC_CREFERENCE:
  2894. a_load64_ref_subsetref(list,l.reference,sref);
  2895. LOC_REGISTER,LOC_CREGISTER:
  2896. a_load64_reg_subsetref(list,l.register64,sref);
  2897. LOC_CONSTANT :
  2898. a_load64_const_subsetref(list,l.value64,sref);
  2899. LOC_SUBSETREF,LOC_CSUBSETREF:
  2900. a_load64_subsetref_subsetref(list,l.sref,sref);
  2901. else
  2902. internalerror(2006082210);
  2903. end;
  2904. end;
  2905. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  2906. begin
  2907. case l.loc of
  2908. LOC_REFERENCE, LOC_CREFERENCE:
  2909. a_load64_subsetref_ref(list,sref,l.reference);
  2910. LOC_REGISTER,LOC_CREGISTER:
  2911. a_load64_subsetref_reg(list,sref,l.register64);
  2912. LOC_SUBSETREF,LOC_CSUBSETREF:
  2913. a_load64_subsetref_subsetref(list,sref,l.sref);
  2914. else
  2915. internalerror(2006082211);
  2916. end;
  2917. end;
  2918. {$endif cpu64bit}
  2919. initialization
  2920. ;
  2921. finalization
  2922. cg.free;
  2923. {$ifndef cpu64bit}
  2924. cg64.free;
  2925. {$endif cpu64bit}
  2926. end.