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cpuinfo.pas 34 KB

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  1. {
  2. Copyright (c) 1998-2002 by the Free Pascal development team
  3. Basic Processor information for the ARM
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. Unit CPUInfo;
  11. Interface
  12. uses
  13. globtype;
  14. Type
  15. bestreal = double;
  16. ts32real = single;
  17. ts64real = double;
  18. ts80real = type extended;
  19. ts128real = type extended;
  20. ts64comp = comp;
  21. pbestreal=^bestreal;
  22. { possible supported processors for this target }
  23. tcputype =
  24. (cpu_none,
  25. cpu_armv3,
  26. cpu_armv4,
  27. cpu_armv4t,
  28. cpu_armv5,
  29. cpu_armv5t,
  30. cpu_armv5te,
  31. cpu_armv5tej,
  32. cpu_armv6,
  33. cpu_armv6k,
  34. cpu_armv6t2,
  35. cpu_armv6z,
  36. cpu_armv6m,
  37. cpu_armv7,
  38. cpu_armv7a,
  39. cpu_armv7r,
  40. cpu_armv7m,
  41. cpu_armv7em
  42. );
  43. Const
  44. cpu_arm = [cpu_none,cpu_armv3,cpu_armv4,cpu_armv4t,cpu_armv5];
  45. cpu_thumb = [cpu_armv6m];
  46. cpu_thumb2 = [cpu_armv7m,cpu_armv7em];
  47. Type
  48. tfputype =
  49. (fpu_none,
  50. fpu_soft,
  51. fpu_libgcc,
  52. fpu_fpa,
  53. fpu_fpa10,
  54. fpu_fpa11,
  55. fpu_vfpv2,
  56. fpu_vfpv3,
  57. fpu_vfpv3_d16,
  58. fpu_fpv4_s16
  59. );
  60. tcontrollertype =
  61. (ct_none,
  62. { Phillips }
  63. ct_lpc1343,
  64. ct_lpc2114,
  65. ct_lpc2124,
  66. ct_lpc2194,
  67. ct_lpc1754,
  68. ct_lpc1756,
  69. ct_lpc1758,
  70. ct_lpc1764,
  71. ct_lpc1766,
  72. ct_lpc1768,
  73. { ATMEL }
  74. ct_at91sam7s256,
  75. ct_at91sam7se256,
  76. ct_at91sam7x256,
  77. ct_at91sam7xc256,
  78. { STMicroelectronics }
  79. ct_stm32f100x4, // LD&MD value line, 4=16,6=32,8=64,b=128
  80. ct_stm32f100x6,
  81. ct_stm32f100x8,
  82. ct_stm32f100xB,
  83. ct_stm32f100xC, // HD value line, r=512,d=384,c=256
  84. ct_stm32f100xD,
  85. ct_stm32f100xE,
  86. ct_stm32f101x4, // LD Access line, 4=16,6=32
  87. ct_stm32f101x6,
  88. ct_stm32f101x8, // MD Access line, 8=64,B=128
  89. ct_stm32f101xB,
  90. ct_stm32f101xC, // HD Access line, C=256,D=384,E=512
  91. ct_stm32f101xD,
  92. ct_stm32f101xE,
  93. ct_stm32f101xF, // XL Access line, F=768,G=1M
  94. ct_stm32f101xG,
  95. ct_stm32f102x4, // LD usb access line, 4=16,6=32
  96. ct_stm32f102x6,
  97. ct_stm32f102x8, // MD usb access line, 8=64,B=128
  98. ct_stm32f102xB,
  99. ct_stm32f103x4, // LD performance line, 4=16,6=32
  100. ct_stm32f103x6,
  101. ct_stm32f103x8, // MD performance line, 8=64,B=128
  102. ct_stm32f103xB,
  103. ct_stm32f103xC, // HD performance line, C=256,D=384,E=512
  104. ct_stm32f103xD,
  105. ct_stm32f103xE,
  106. ct_stm32f103xF, // XL performance line, F=768,G=1M
  107. ct_stm32f103xG,
  108. ct_stm32f107x8, // MD and HD connectivity line, 8=64,B=128,C=256
  109. ct_stm32f107xB,
  110. ct_stm32f107xC,
  111. { TI - Fury Class - 64 K Flash, 16 K SRAM Devices }
  112. ct_lm3s1110,
  113. ct_lm3s1133,
  114. ct_lm3s1138,
  115. ct_lm3s1150,
  116. ct_lm3s1162,
  117. ct_lm3s1165,
  118. ct_lm3s1166,
  119. ct_lm3s2110,
  120. ct_lm3s2139,
  121. ct_lm3s6100,
  122. ct_lm3s6110,
  123. { TI - Fury Class - 128K Flash, 32K SRAM devices }
  124. ct_lm3s1601,
  125. ct_lm3s1608,
  126. ct_lm3s1620,
  127. ct_lm3s1635,
  128. ct_lm3s1636,
  129. ct_lm3s1637,
  130. ct_lm3s1651,
  131. ct_lm3s2601,
  132. ct_lm3s2608,
  133. ct_lm3s2620,
  134. ct_lm3s2637,
  135. ct_lm3s2651,
  136. ct_lm3s6610,
  137. ct_lm3s6611,
  138. ct_lm3s6618,
  139. ct_lm3s6633,
  140. ct_lm3s6637,
  141. ct_lm3s8630,
  142. { TI - Fury Class - 256K Flash, 64K SRAM devices }
  143. ct_lm3s1911,
  144. ct_lm3s1918,
  145. ct_lm3s1937,
  146. ct_lm3s1958,
  147. ct_lm3s1960,
  148. ct_lm3s1968,
  149. ct_lm3s1969,
  150. ct_lm3s2911,
  151. ct_lm3s2918,
  152. ct_lm3s2919,
  153. ct_lm3s2939,
  154. ct_lm3s2948,
  155. ct_lm3s2950,
  156. ct_lm3s2965,
  157. ct_lm3s6911,
  158. ct_lm3s6918,
  159. ct_lm3s6938,
  160. ct_lm3s6950,
  161. ct_lm3s6952,
  162. ct_lm3s6965,
  163. ct_lm3s8930,
  164. ct_lm3s8933,
  165. ct_lm3s8938,
  166. ct_lm3s8962,
  167. ct_lm3s8970,
  168. ct_lm3s8971,
  169. { TI - Tempest Tempest - 256 K Flash, 64 K SRAM }
  170. ct_lm3s5951,
  171. ct_lm3s5956,
  172. ct_lm3s1b21,
  173. ct_lm3s2b93,
  174. ct_lm3s5b91,
  175. ct_lm3s9b81,
  176. ct_lm3s9b90,
  177. ct_lm3s9b92,
  178. ct_lm3s9b95,
  179. ct_lm3s9b96,
  180. { TI Stellaris }
  181. ct_lm4f120h5,
  182. { SAMSUNG }
  183. ct_sc32442b,
  184. // generic Thumb2 target
  185. ct_thumb2bare
  186. );
  187. Const
  188. {# Size of native extended floating point type }
  189. extended_size = 12;
  190. {# Size of a multimedia register }
  191. mmreg_size = 16;
  192. { target cpu string (used by compiler options) }
  193. target_cpu_string = 'arm';
  194. { calling conventions supported by the code generator }
  195. supported_calling_conventions : tproccalloptions = [
  196. pocall_internproc,
  197. pocall_safecall,
  198. pocall_stdcall,
  199. { same as stdcall only different name mangling }
  200. pocall_cdecl,
  201. { same as stdcall only different name mangling }
  202. pocall_cppdecl,
  203. { same as stdcall but floating point numbers are handled like equal sized integers }
  204. pocall_softfloat,
  205. { same as stdcall (requires that all const records are passed by
  206. reference, but that's already done for stdcall) }
  207. pocall_mwpascal,
  208. { used for interrupt handling }
  209. pocall_interrupt
  210. ];
  211. cputypestr : array[tcputype] of string[8] = ('',
  212. 'ARMV3',
  213. 'ARMV4',
  214. 'ARMV4T',
  215. 'ARMV5',
  216. 'ARMV5T',
  217. 'ARMV5TE',
  218. 'ARMV5TEJ',
  219. 'ARMV6',
  220. 'ARMV6K',
  221. 'ARMV6T2',
  222. 'ARMV6Z',
  223. 'ARMV6M',
  224. 'ARMV7',
  225. 'ARMV7A',
  226. 'ARMV7R',
  227. 'ARMV7M',
  228. 'ARMV7EM'
  229. );
  230. fputypestr : array[tfputype] of string[9] = ('',
  231. 'SOFT',
  232. 'LIBGCC',
  233. 'FPA',
  234. 'FPA10',
  235. 'FPA11',
  236. 'VFPV2',
  237. 'VFPV3',
  238. 'VFPV3_D16',
  239. 'FPV4_S16'
  240. );
  241. { We know that there are fields after sramsize
  242. but we don't care about this warning }
  243. {$WARN 3177 OFF}
  244. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  245. ((
  246. controllertypestr:'';
  247. controllerunitstr:'';
  248. flashbase:0;
  249. flashsize:0;
  250. srambase:0;
  251. sramsize:0
  252. ),
  253. (
  254. controllertypestr:'LPC1343';
  255. controllerunitstr:'LPC1343';
  256. flashbase:$00000000;
  257. flashsize:$00008000;
  258. srambase:$10000000;
  259. sramsize:$00002000
  260. ),
  261. (
  262. controllertypestr:'LPC2114';
  263. controllerunitstr:'LPC21x4';
  264. flashbase:$00000000;
  265. flashsize:$00040000;
  266. srambase:$40000000;
  267. sramsize:$00004000
  268. ),
  269. (
  270. controllertypestr:'LPC2124';
  271. controllerunitstr:'LPC21x4';
  272. flashbase:$00000000;
  273. flashsize:$00040000;
  274. srambase:$40000000;
  275. sramsize:$00004000
  276. ),
  277. (
  278. controllertypestr:'LPC2194';
  279. controllerunitstr:'LPC21x4';
  280. flashbase:$00000000;
  281. flashsize:$00040000;
  282. srambase:$40000000;
  283. sramsize:$00004000
  284. ),
  285. (
  286. controllertypestr:'LPC1754';
  287. controllerunitstr:'LPC1754';
  288. flashbase:$00000000;
  289. flashsize:$00020000;
  290. srambase:$10000000;
  291. sramsize:$00004000
  292. ),
  293. (
  294. controllertypestr:'LPC1756';
  295. controllerunitstr:'LPC1756';
  296. flashbase:$00000000;
  297. flashsize:$00040000;
  298. srambase:$10000000;
  299. sramsize:$00004000
  300. ),
  301. (
  302. controllertypestr:'LPC1758';
  303. controllerunitstr:'LPC1758';
  304. flashbase:$00000000;
  305. flashsize:$00080000;
  306. srambase:$10000000;
  307. sramsize:$00008000
  308. ),
  309. (
  310. controllertypestr:'LPC1764';
  311. controllerunitstr:'LPC1764';
  312. flashbase:$00000000;
  313. flashsize:$00020000;
  314. srambase:$10000000;
  315. sramsize:$00004000
  316. ),
  317. (
  318. controllertypestr:'LPC1766';
  319. controllerunitstr:'LPC1766';
  320. flashbase:$00000000;
  321. flashsize:$00040000;
  322. srambase:$10000000;
  323. sramsize:$00008000
  324. ),
  325. (
  326. controllertypestr:'LPC1768';
  327. controllerunitstr:'LPC1768';
  328. flashbase:$00000000;
  329. flashsize:$00080000;
  330. srambase:$10000000;
  331. sramsize:$00008000
  332. ),
  333. (
  334. controllertypestr:'AT91SAM7S256';
  335. controllerunitstr:'AT91SAM7x256';
  336. flashbase:$00000000;
  337. flashsize:$00040000;
  338. srambase:$00200000;
  339. sramsize:$00010000
  340. ),
  341. (
  342. controllertypestr:'AT91SAM7SE256';
  343. controllerunitstr:'AT91SAM7x256';
  344. flashbase:$00000000;
  345. flashsize:$00040000;
  346. srambase:$00200000;
  347. sramsize:$00010000
  348. ),
  349. (
  350. controllertypestr:'AT91SAM7X256';
  351. controllerunitstr:'AT91SAM7x256';
  352. flashbase:$00000000;
  353. flashsize:$00040000;
  354. srambase:$00200000;
  355. sramsize:$00010000
  356. ),
  357. (
  358. controllertypestr:'AT91SAM7XC256';
  359. controllerunitstr:'AT91SAM7x256';
  360. flashbase:$00000000;
  361. flashsize:$00040000;
  362. srambase:$00200000;
  363. sramsize:$00010000
  364. ),
  365. { STM32F1 series }
  366. (controllertypestr:'STM32F100X4'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00004000; srambase:$20000000; sramsize:$00001000),
  367. (controllertypestr:'STM32F100X6'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00008000; srambase:$20000000; sramsize:$00001000),
  368. (controllertypestr:'STM32F100X8'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00002000),
  369. (controllertypestr:'STM32F100XB'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00002000),
  370. (controllertypestr:'STM32F100XC'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00040000; srambase:$20000000; sramsize:$00006000),
  371. (controllertypestr:'STM32F100XD'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$00008000),
  372. (controllertypestr:'STM32F100XE'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00008000),
  373. (controllertypestr:'STM32F101X4'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00004000; srambase:$20000000; sramsize:$00001000),
  374. (controllertypestr:'STM32F101X6'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00008000; srambase:$20000000; sramsize:$00001800),
  375. (controllertypestr:'STM32F101X8'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00002800),
  376. (controllertypestr:'STM32F101XB'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00004000),
  377. (controllertypestr:'STM32F101XC'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00040000; srambase:$20000000; sramsize:$00008000),
  378. (controllertypestr:'STM32F101XD'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$0000C000),
  379. (controllertypestr:'STM32F101XE'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$0000C000),
  380. (controllertypestr:'STM32F101XF'; controllerunitstr:'STM32F10X_XL'; flashbase:$08000000; flashsize:$000C0000; srambase:$20000000; sramsize:$00014000),
  381. (controllertypestr:'STM32F101XG'; controllerunitstr:'STM32F10X_XL'; flashbase:$08000000; flashsize:$00100000; srambase:$20000000; sramsize:$00014000),
  382. (controllertypestr:'STM32F102X4'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00004000; srambase:$20000000; sramsize:$00001000),
  383. (controllertypestr:'STM32F102X6'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00008000; srambase:$20000000; sramsize:$00001800),
  384. (controllertypestr:'STM32F102X8'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00002800),
  385. (controllertypestr:'STM32F102XB'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00004000),
  386. (controllertypestr:'STM32F103X4'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00004000; srambase:$20000000; sramsize:$00001000),
  387. (controllertypestr:'STM32F103X6'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00008000; srambase:$20000000; sramsize:$00002800),
  388. (controllertypestr:'STM32F103X8'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00005000),
  389. (controllertypestr:'STM32F103XB'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00005000),
  390. (controllertypestr:'STM32F103XC'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00040000; srambase:$20000000; sramsize:$0000C000),
  391. (controllertypestr:'STM32F103XD'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$00010000),
  392. (controllertypestr:'STM32F103XE'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00010000),
  393. (controllertypestr:'STM32F103XF'; controllerunitstr:'STM32F10X_XL'; flashbase:$08000000; flashsize:$000C0000; srambase:$20000000; sramsize:$00018000),
  394. (controllertypestr:'STM32F103XG'; controllerunitstr:'STM32F10X_XL'; flashbase:$08000000; flashsize:$00100000; srambase:$20000000; sramsize:$00018000),
  395. (controllertypestr:'STM32F107X8'; controllerunitstr:'STM32F10X_CONN'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00010000),
  396. (controllertypestr:'STM32F107XB'; controllerunitstr:'STM32F10X_CONN'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00010000),
  397. (controllertypestr:'STM32F107XC'; controllerunitstr:'STM32F10X_CONN'; flashbase:$08000000; flashsize:$00040000; srambase:$20000000; sramsize:$00010000),
  398. { TI - 64 K Flash, 16 K SRAM Devices }
  399. // ct_lm3s1110,
  400. (
  401. controllertypestr:'LM3S1110';
  402. controllerunitstr:'LM3FURY';
  403. flashbase:$00000000;
  404. flashsize:$00010000;
  405. srambase:$20000000;
  406. sramsize:$00004000
  407. ),
  408. // ct_lm3s1133,
  409. (
  410. controllertypestr:'LM3S1133';
  411. controllerunitstr:'LM3FURY';
  412. flashbase:$00000000;
  413. flashsize:$00010000;
  414. srambase:$20000000;
  415. sramsize:$00004000
  416. ),
  417. // ct_lm3s1138,
  418. (
  419. controllertypestr:'LM3S1138';
  420. controllerunitstr:'LM3FURY';
  421. flashbase:$00000000;
  422. flashsize:$00010000;
  423. srambase:$20000000;
  424. sramsize:$00004000
  425. ),
  426. // ct_lm3s1150,
  427. (
  428. controllertypestr:'LM3S1150';
  429. controllerunitstr:'LM3FURY';
  430. flashbase:$00000000;
  431. flashsize:$00010000;
  432. srambase:$20000000;
  433. sramsize:$00004000
  434. ),
  435. // ct_lm3s1162,
  436. (
  437. controllertypestr:'LM3S1162';
  438. controllerunitstr:'LM3FURY';
  439. flashbase:$00000000;
  440. flashsize:$00010000;
  441. srambase:$20000000;
  442. sramsize:$00004000
  443. ),
  444. // ct_lm3s1165,
  445. (
  446. controllertypestr:'LM3S1165';
  447. controllerunitstr:'LM3FURY';
  448. flashbase:$00000000;
  449. flashsize:$00010000;
  450. srambase:$20000000;
  451. sramsize:$00004000
  452. ),
  453. // ct_lm3s1166,
  454. (
  455. controllertypestr:'LM3S1166';
  456. controllerunitstr:'LM3FURY';
  457. flashbase:$00000000;
  458. flashsize:$00010000;
  459. srambase:$20000000;
  460. sramsize:$00004000
  461. ),
  462. // ct_lm3s2110,
  463. (
  464. controllertypestr:'LM3S2110';
  465. controllerunitstr:'LM3FURY';
  466. flashbase:$00000000;
  467. flashsize:$00010000;
  468. srambase:$20000000;
  469. sramsize:$00004000
  470. ),
  471. // ct_lm3s2139,
  472. (
  473. controllertypestr:'LM3S2139';
  474. controllerunitstr:'LM3FURY';
  475. flashbase:$00000000;
  476. flashsize:$00010000;
  477. srambase:$20000000;
  478. sramsize:$00004000
  479. ),
  480. // ct_lm3s6100,
  481. (
  482. controllertypestr:'LM3S6100';
  483. controllerunitstr:'LM3FURY';
  484. flashbase:$00000000;
  485. flashsize:$00010000;
  486. srambase:$20000000;
  487. sramsize:$00004000
  488. ),
  489. // ct_lm3s6110,
  490. (
  491. controllertypestr:'LM3S6110';
  492. controllerunitstr:'LM3FURY';
  493. flashbase:$00000000;
  494. flashsize:$00010000;
  495. srambase:$20000000;
  496. sramsize:$00004000
  497. ),
  498. { TI - 128K Flash, 32K SRAM devices }
  499. // ct_lm3s1601,
  500. (
  501. controllertypestr:'LM3S1601';
  502. controllerunitstr:'LM3FURY';
  503. flashbase:$00000000;
  504. flashsize:$00020000;
  505. srambase:$20000000;
  506. sramsize:$00008000
  507. ),
  508. // ct_lm3s1608,
  509. (
  510. controllertypestr:'LM3S1608';
  511. controllerunitstr:'LM3FURY';
  512. flashbase:$00000000;
  513. flashsize:$00020000;
  514. srambase:$20000000;
  515. sramsize:$00008000
  516. ),
  517. // ct_lm3s1620,
  518. (
  519. controllertypestr:'LM3S1620';
  520. controllerunitstr:'LM3FURY';
  521. flashbase:$00000000;
  522. flashsize:$00020000;
  523. srambase:$20000000;
  524. sramsize:$00008000
  525. ),
  526. // ct_lm3s1635,
  527. (
  528. controllertypestr:'LM3S1635';
  529. controllerunitstr:'LM3FURY';
  530. flashbase:$00000000;
  531. flashsize:$00020000;
  532. srambase:$20000000;
  533. sramsize:$00008000
  534. ),
  535. // ct_lm3s1636,
  536. (
  537. controllertypestr:'LM3S1636';
  538. controllerunitstr:'LM3FURY';
  539. flashbase:$00000000;
  540. flashsize:$00020000;
  541. srambase:$20000000;
  542. sramsize:$00008000
  543. ),
  544. // ct_lm3s1637,
  545. (
  546. controllertypestr:'LM3S1637';
  547. controllerunitstr:'LM3FURY';
  548. flashbase:$00000000;
  549. flashsize:$00020000;
  550. srambase:$20000000;
  551. sramsize:$00008000
  552. ),
  553. // ct_lm3s1651,
  554. (
  555. controllertypestr:'LM3S1651';
  556. controllerunitstr:'LM3FURY';
  557. flashbase:$00000000;
  558. flashsize:$00020000;
  559. srambase:$20000000;
  560. sramsize:$00008000
  561. ),
  562. // ct_lm3s2601,
  563. (
  564. controllertypestr:'LM3S2601';
  565. controllerunitstr:'LM3FURY';
  566. flashbase:$00000000;
  567. flashsize:$00020000;
  568. srambase:$20000000;
  569. sramsize:$00008000
  570. ),
  571. // ct_lm3s2608,
  572. (
  573. controllertypestr:'LM3S2608';
  574. controllerunitstr:'LM3FURY';
  575. flashbase:$00000000;
  576. flashsize:$00020000;
  577. srambase:$20000000;
  578. sramsize:$00008000
  579. ),
  580. // ct_lm3s2620,
  581. (
  582. controllertypestr:'LM3S2620';
  583. controllerunitstr:'LM3FURY';
  584. flashbase:$00000000;
  585. flashsize:$00020000;
  586. srambase:$20000000;
  587. sramsize:$00008000
  588. ),
  589. // ct_lm3s2637,
  590. (
  591. controllertypestr:'LM3S2637';
  592. controllerunitstr:'LM3FURY';
  593. flashbase:$00000000;
  594. flashsize:$00020000;
  595. srambase:$20000000;
  596. sramsize:$00008000
  597. ),
  598. // ct_lm3s2651,
  599. (
  600. controllertypestr:'LM3S2651';
  601. controllerunitstr:'LM3FURY';
  602. flashbase:$00000000;
  603. flashsize:$00020000;
  604. srambase:$20000000;
  605. sramsize:$00008000
  606. ),
  607. // ct_lm3s6610,
  608. (
  609. controllertypestr:'LM3S6610';
  610. controllerunitstr:'LM3FURY';
  611. flashbase:$00000000;
  612. flashsize:$00020000;
  613. srambase:$20000000;
  614. sramsize:$00008000
  615. ),
  616. // ct_lm3s6611,
  617. (
  618. controllertypestr:'LM3S6611';
  619. controllerunitstr:'LM3FURY';
  620. flashbase:$00000000;
  621. flashsize:$00020000;
  622. srambase:$20000000;
  623. sramsize:$00008000
  624. ),
  625. // ct_lm3s6618,
  626. (
  627. controllertypestr:'LM3S6618';
  628. controllerunitstr:'LM3FURY';
  629. flashbase:$00000000;
  630. flashsize:$00020000;
  631. srambase:$20000000;
  632. sramsize:$00008000
  633. ),
  634. // ct_lm3s6633,
  635. (
  636. controllertypestr:'LM3S6633';
  637. controllerunitstr:'LM3FURY';
  638. flashbase:$00000000;
  639. flashsize:$00020000;
  640. srambase:$20000000;
  641. sramsize:$00008000
  642. ),
  643. // ct_lm3s6637,
  644. (
  645. controllertypestr:'LM3S6637';
  646. controllerunitstr:'LM3FURY';
  647. flashbase:$00000000;
  648. flashsize:$00020000;
  649. srambase:$20000000;
  650. sramsize:$00008000
  651. ),
  652. // ct_lm3s8630,
  653. (
  654. controllertypestr:'LM3S8630';
  655. controllerunitstr:'LM3FURY';
  656. flashbase:$00000000;
  657. flashsize:$00020000;
  658. srambase:$20000000;
  659. sramsize:$00008000
  660. ),
  661. { TI - 256K Flash, 64K SRAM devices }
  662. // ct_lm3s1911,
  663. (
  664. controllertypestr:'LM3S1911';
  665. controllerunitstr:'LM3FURY';
  666. flashbase:$00000000;
  667. flashsize:$00040000;
  668. srambase:$20000000;
  669. sramsize:$00010000
  670. ),
  671. // ct_lm3s1918,
  672. (
  673. controllertypestr:'LM3S1918';
  674. controllerunitstr:'LM3FURY';
  675. flashbase:$00000000;
  676. flashsize:$00040000;
  677. srambase:$20000000;
  678. sramsize:$00010000
  679. ),
  680. // ct_lm3s1937,
  681. (
  682. controllertypestr:'LM3S1937';
  683. controllerunitstr:'LM3FURY';
  684. flashbase:$00000000;
  685. flashsize:$00040000;
  686. srambase:$20000000;
  687. sramsize:$00010000
  688. ),
  689. // ct_lm3s1958,
  690. (
  691. controllertypestr:'LM3S1958';
  692. controllerunitstr:'LM3FURY';
  693. flashbase:$00000000;
  694. flashsize:$00040000;
  695. srambase:$20000000;
  696. sramsize:$00010000
  697. ),
  698. // ct_lm3s1960,
  699. (
  700. controllertypestr:'LM3S1960';
  701. controllerunitstr:'LM3FURY';
  702. flashbase:$00000000;
  703. flashsize:$00040000;
  704. srambase:$20000000;
  705. sramsize:$00010000
  706. ),
  707. // ct_lm3s1968,
  708. (
  709. controllertypestr:'LM3S1968';
  710. controllerunitstr:'LM3FURY';
  711. flashbase:$00000000;
  712. flashsize:$00040000;
  713. srambase:$20000000;
  714. sramsize:$00010000
  715. ),
  716. // ct_lm3s1969,
  717. (
  718. controllertypestr:'LM3S1969';
  719. controllerunitstr:'LM3FURY';
  720. flashbase:$00000000;
  721. flashsize:$00040000;
  722. srambase:$20000000;
  723. sramsize:$00010000
  724. ),
  725. // ct_lm3s2911,
  726. (
  727. controllertypestr:'LM3S2911';
  728. controllerunitstr:'LM3FURY';
  729. flashbase:$00000000;
  730. flashsize:$00040000;
  731. srambase:$20000000;
  732. sramsize:$00010000
  733. ),
  734. // ct_lm3s2918,
  735. (
  736. controllertypestr:'LM3S2918';
  737. controllerunitstr:'LM3FURY';
  738. flashbase:$00000000;
  739. flashsize:$00040000;
  740. srambase:$20000000;
  741. sramsize:$00010000
  742. ),
  743. // ct_lm3s2919,
  744. (
  745. controllertypestr:'LM3S2919';
  746. controllerunitstr:'LM3FURY';
  747. flashbase:$00000000;
  748. flashsize:$00040000;
  749. srambase:$20000000;
  750. sramsize:$00010000
  751. ),
  752. // ct_lm3s2939,
  753. (
  754. controllertypestr:'LM3S2939';
  755. controllerunitstr:'LM3FURY';
  756. flashbase:$00000000;
  757. flashsize:$00040000;
  758. srambase:$20000000;
  759. sramsize:$00010000
  760. ),
  761. // ct_lm3s2948,
  762. (
  763. controllertypestr:'LM3S2948';
  764. controllerunitstr:'LM3FURY';
  765. flashbase:$00000000;
  766. flashsize:$00040000;
  767. srambase:$20000000;
  768. sramsize:$00010000
  769. ),
  770. // ct_lm3s2950,
  771. (
  772. controllertypestr:'LM3S2950';
  773. controllerunitstr:'LM3FURY';
  774. flashbase:$00000000;
  775. flashsize:$00040000;
  776. srambase:$20000000;
  777. sramsize:$00010000
  778. ),
  779. // ct_lm3s2965,
  780. (
  781. controllertypestr:'LM3S2965';
  782. controllerunitstr:'LM3FURY';
  783. flashbase:$00000000;
  784. flashsize:$00040000;
  785. srambase:$20000000;
  786. sramsize:$00010000
  787. ),
  788. // ct_lm3s6911,
  789. (
  790. controllertypestr:'LM3S6911';
  791. controllerunitstr:'LM3FURY';
  792. flashbase:$00000000;
  793. flashsize:$00040000;
  794. srambase:$20000000;
  795. sramsize:$00010000
  796. ),
  797. // ct_lm3s6918,
  798. (
  799. controllertypestr:'LM3S6918';
  800. controllerunitstr:'LM3FURY';
  801. flashbase:$00000000;
  802. flashsize:$00040000;
  803. srambase:$20000000;
  804. sramsize:$00010000
  805. ),
  806. // ct_lm3s6938,
  807. (
  808. controllertypestr:'LM3S6938';
  809. controllerunitstr:'LM3FURY';
  810. flashbase:$00000000;
  811. flashsize:$00040000;
  812. srambase:$20000000;
  813. sramsize:$00010000
  814. ),
  815. // ct_lm3s6950,
  816. (
  817. controllertypestr:'LM3S6950';
  818. controllerunitstr:'LM3FURY';
  819. flashbase:$00000000;
  820. flashsize:$00040000;
  821. srambase:$20000000;
  822. sramsize:$00010000
  823. ),
  824. // ct_lm3s6952,
  825. (
  826. controllertypestr:'LM3S6952';
  827. controllerunitstr:'LM3FURY';
  828. flashbase:$00000000;
  829. flashsize:$00040000;
  830. srambase:$20000000;
  831. sramsize:$00010000
  832. ),
  833. // ct_lm3s6965,
  834. (
  835. controllertypestr:'LM3S6965';
  836. controllerunitstr:'LM3FURY';
  837. flashbase:$00000000;
  838. flashsize:$00040000;
  839. srambase:$20000000;
  840. sramsize:$00010000
  841. ),
  842. // ct_lm3s8930,
  843. (
  844. controllertypestr:'LM3S8930';
  845. controllerunitstr:'LM3FURY';
  846. flashbase:$00000000;
  847. flashsize:$00040000;
  848. srambase:$20000000;
  849. sramsize:$00010000
  850. ),
  851. // ct_lm3s8933,
  852. (
  853. controllertypestr:'LM3S8933';
  854. controllerunitstr:'LM3FURY';
  855. flashbase:$00000000;
  856. flashsize:$00040000;
  857. srambase:$20000000;
  858. sramsize:$00010000
  859. ),
  860. // ct_lm3s8938,
  861. (
  862. controllertypestr:'LM3S8938';
  863. controllerunitstr:'LM3FURY';
  864. flashbase:$00000000;
  865. flashsize:$00040000;
  866. srambase:$20000000;
  867. sramsize:$00010000
  868. ),
  869. // ct_lm3s8962,
  870. (
  871. controllertypestr:'LM3S8962';
  872. controllerunitstr:'LM3FURY';
  873. flashbase:$00000000;
  874. flashsize:$00040000;
  875. srambase:$20000000;
  876. sramsize:$00010000
  877. ),
  878. // ct_lm3s8970,
  879. (
  880. controllertypestr:'LM3S8970';
  881. controllerunitstr:'LM3FURY';
  882. flashbase:$00000000;
  883. flashsize:$00040000;
  884. srambase:$20000000;
  885. sramsize:$00010000
  886. ),
  887. // ct_lm3s8971,
  888. (
  889. controllertypestr:'LM3S8971';
  890. controllerunitstr:'LM3FURY';
  891. flashbase:$00000000;
  892. flashsize:$00040000;
  893. srambase:$20000000;
  894. sramsize:$00010000
  895. ),
  896. { TI - Tempest parts - 256 K Flash, 64 K SRAM }
  897. // ct_lm3s5951,
  898. (
  899. controllertypestr:'LM3S5951';
  900. controllerunitstr:'LM3TEMPEST';
  901. flashbase:$00000000;
  902. flashsize:$00040000;
  903. srambase:$20000000;
  904. sramsize:$00010000
  905. ),
  906. // ct_lm3s5956,
  907. (
  908. controllertypestr:'LM3S5956';
  909. controllerunitstr:'LM3TEMPEST';
  910. flashbase:$00000000;
  911. flashsize:$00040000;
  912. srambase:$20000000;
  913. sramsize:$00010000
  914. ),
  915. // ct_lm3s1b21,
  916. (
  917. controllertypestr:'LM3S1B21';
  918. controllerunitstr:'LM3TEMPEST';
  919. flashbase:$00000000;
  920. flashsize:$00040000;
  921. srambase:$20000000;
  922. sramsize:$00010000
  923. ),
  924. // ct_lm3s2b93,
  925. (
  926. controllertypestr:'LM3S2B93';
  927. controllerunitstr:'LM3TEMPEST';
  928. flashbase:$00000000;
  929. flashsize:$00040000;
  930. srambase:$20000000;
  931. sramsize:$00010000
  932. ),
  933. // ct_lm3s5b91,
  934. (
  935. controllertypestr:'LM3S5B91';
  936. controllerunitstr:'LM3TEMPEST';
  937. flashbase:$00000000;
  938. flashsize:$00040000;
  939. srambase:$20000000;
  940. sramsize:$00010000
  941. ),
  942. // ct_lm3s9b81,
  943. (
  944. controllertypestr:'LM3S9B81';
  945. controllerunitstr:'LM3TEMPEST';
  946. flashbase:$00000000;
  947. flashsize:$00040000;
  948. srambase:$20000000;
  949. sramsize:$00010000
  950. ),
  951. // ct_lm3s9b90,
  952. (
  953. controllertypestr:'LM3S9B90';
  954. controllerunitstr:'LM3TEMPEST';
  955. flashbase:$00000000;
  956. flashsize:$00040000;
  957. srambase:$20000000;
  958. sramsize:$00010000
  959. ),
  960. // ct_lm3s9b92,
  961. (
  962. controllertypestr:'LM3S9B92';
  963. controllerunitstr:'LM3TEMPEST';
  964. flashbase:$00000000;
  965. flashsize:$00040000;
  966. srambase:$20000000;
  967. sramsize:$00010000
  968. ),
  969. // ct_lm3s9b95,
  970. (
  971. controllertypestr:'LM3S9B95';
  972. controllerunitstr:'LM3TEMPEST';
  973. flashbase:$00000000;
  974. flashsize:$00040000;
  975. srambase:$20000000;
  976. sramsize:$00010000
  977. ),
  978. // ct_lm3s9b96,
  979. (
  980. controllertypestr:'LM3S9B96';
  981. controllerunitstr:'LM3TEMPEST';
  982. flashbase:$00000000;
  983. flashsize:$00040000;
  984. srambase:$20000000;
  985. sramsize:$00010000
  986. ),
  987. // ct_lm4f120h5,
  988. (
  989. controllertypestr:'LM4F120H5';
  990. controllerunitstr:'LM4F120';
  991. flashbase:$00000000;
  992. flashsize:$00040000;
  993. srambase:$20000000;
  994. sramsize:$00008000
  995. ),
  996. //ct_SC32442b,
  997. (
  998. controllertypestr:'SC32442B';
  999. controllerunitstr:'sc32442b';
  1000. flashbase:$00000000;
  1001. flashsize:$00000000;
  1002. srambase:$00000000;
  1003. sramsize:$08000000
  1004. ),
  1005. // bare bones Thumb2
  1006. (
  1007. controllertypestr:'THUMB2_BARE';
  1008. controllerunitstr:'THUMB2_BARE';
  1009. flashbase:$00000000;
  1010. flashsize:$00100000;
  1011. srambase:$20000000;
  1012. sramsize:$00100000
  1013. )
  1014. );
  1015. vfp_scalar = [fpu_vfpv2,fpu_vfpv3,fpu_vfpv3_d16,fpu_fpv4_s16];
  1016. { Supported optimizations, only used for information }
  1017. supported_optimizerswitches = genericlevel1optimizerswitches+
  1018. genericlevel2optimizerswitches+
  1019. genericlevel3optimizerswitches-
  1020. { no need to write info about those }
  1021. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  1022. [cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,
  1023. cs_opt_stackframe,cs_opt_nodecse,cs_opt_reorder_fields,cs_opt_fastmath];
  1024. level1optimizerswitches = genericlevel1optimizerswitches;
  1025. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  1026. [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion,cs_opt_nodecse];
  1027. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [cs_opt_scheduler{,cs_opt_loopunroll}];
  1028. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
  1029. type
  1030. tcpuflags =
  1031. (CPUARM_HAS_BX, { CPU supports the BX instruction }
  1032. CPUARM_HAS_BLX, { CPU supports the BLX rX instruction }
  1033. CPUARM_HAS_BLX_LABEL, { CPU supports the BLX <label> instruction }
  1034. CPUARM_HAS_CLZ, { CPU supports the CLZ instruction }
  1035. CPUARM_HAS_EDSP, { CPU supports the PLD,STRD,LDRD,MCRR and MRRC instructions }
  1036. CPUARM_HAS_REV, { CPU supports the REV instruction }
  1037. CPUARM_HAS_RBIT, { CPU supports the RBIT instruction }
  1038. CPUARM_HAS_DMB, { CPU has memory barrier instructions (DMB, DSB, ISB) }
  1039. CPUARM_HAS_LDREX,
  1040. CPUARM_HAS_IDIV
  1041. );
  1042. const
  1043. cpu_capabilities : array[tcputype] of set of tcpuflags =
  1044. ( { cpu_none } [],
  1045. { cpu_armv3 } [],
  1046. { cpu_armv4 } [],
  1047. { cpu_armv4t } [CPUARM_HAS_BX],
  1048. { cpu_armv5 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ],
  1049. { cpu_armv5t } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ],
  1050. { cpu_armv5te } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP],
  1051. { cpu_armv5tej } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP],
  1052. { cpu_armv6 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
  1053. { cpu_armv6k } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
  1054. { cpu_armv6t2 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX],
  1055. { cpu_armv6z } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
  1056. { cpu_armv6m } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_REV],
  1057. { the identifier armv7 is should not be used, it is considered being equal to armv7a }
  1058. { cpu_armv7 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_DMB],
  1059. { cpu_armv7a } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_DMB],
  1060. { cpu_armv7r } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_DMB],
  1061. { cpu_armv7m } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_IDIV,CPUARM_HAS_DMB],
  1062. { cpu_armv7em } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_IDIV,CPUARM_HAS_DMB]
  1063. );
  1064. Implementation
  1065. end.