rgx86.pas 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. This unit implements the x86 specific class for the register
  4. allocator
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit rgx86;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. cclasses,globtype,
  23. cpubase,cpuinfo,cgbase,cgutils,
  24. aasmbase,aasmtai,aasmdata,aasmcpu,
  25. rgobj;
  26. type
  27. trgx86 = class(trgobj)
  28. function get_spill_subreg(r : tregister) : tsubregister;override;
  29. function do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean;override;
  30. end;
  31. tpushedsavedloc = record
  32. case byte of
  33. 0: (pushed: boolean);
  34. 1: (ofs: longint);
  35. end;
  36. tpushedsavedfpu = array[tsuperregister] of tpushedsavedloc;
  37. trgx86fpu = class
  38. { The "usableregsxxx" contain all registers of type "xxx" that }
  39. { aren't currently allocated to a regvar. The "unusedregsxxx" }
  40. { contain all registers of type "xxx" that aren't currently }
  41. { allocated }
  42. unusedregsfpu,usableregsfpu : Tsuperregisterset;
  43. { these counters contain the number of elements in the }
  44. { unusedregsxxx/usableregsxxx sets }
  45. countunusedregsfpu : byte;
  46. { Contains the registers which are really used by the proc itself.
  47. It doesn't take care of registers used by called procedures
  48. }
  49. used_in_proc : tcpuregisterset;
  50. {reg_pushes_other : regvarother_longintarray;
  51. is_reg_var_other : regvarother_booleanarray;
  52. regvar_loaded_other : regvarother_booleanarray;}
  53. fpuvaroffset : byte;
  54. constructor create;
  55. function getregisterfpu(list: TAsmList) : tregister;
  56. procedure ungetregisterfpu(list: TAsmList; r : tregister);
  57. { pushes and restores registers }
  58. procedure saveusedfpuregisters(list:TAsmList;
  59. var saved:Tpushedsavedfpu;
  60. const s:Tcpuregisterset);
  61. procedure restoreusedfpuregisters(list:TAsmList;
  62. const saved:Tpushedsavedfpu);
  63. { corrects the fpu stack register by ofs }
  64. function correct_fpuregister(r : tregister;ofs : byte) : tregister;
  65. end;
  66. implementation
  67. uses
  68. systems,
  69. verbose;
  70. const
  71. { This value is used in tsaved. If the array value is equal
  72. to this, then this means that this register is not used.}
  73. reg_not_saved = $7fffffff;
  74. {******************************************************************************
  75. Trgcpu
  76. ******************************************************************************}
  77. function trgx86.get_spill_subreg(r : tregister) : tsubregister;
  78. begin
  79. result:=getsubreg(r);
  80. end;
  81. function trgx86.do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean;
  82. {Decide wether a "replace" spill is possible, i.e. wether we can replace a register
  83. in an instruction by a memory reference. For example, in "mov ireg26d,0", the imaginary
  84. register ireg26d can be replaced by a memory reference.}
  85. var
  86. n,replaceoper : longint;
  87. begin
  88. result:=false;
  89. with instr do
  90. begin
  91. replaceoper:=-1;
  92. case ops of
  93. 1 :
  94. begin
  95. if (oper[0]^.typ=top_reg) then
  96. begin
  97. if get_alias(getsupreg(oper[0]^.reg))<>orgreg then
  98. internalerror(200410101);
  99. replaceoper:=0;
  100. end;
  101. end;
  102. 2,3 :
  103. begin
  104. { We can handle opcodes with 2 and 3 operands the same way. The opcodes
  105. with 3 registers are shrd/shld, where the 3rd operand is const or CL,
  106. that doesn't need spilling.
  107. However, due to AT&T order inside the compiler, the 3rd operand is
  108. numbered 0, so look at operand no. 1 and 2 if we have 3 operands by
  109. adding a "n". }
  110. n:=0;
  111. if ops=3 then
  112. n:=1;
  113. if (oper[n+0]^.typ=top_reg) and
  114. (oper[n+1]^.typ=top_reg) and
  115. (get_alias(getsupreg(oper[n+0]^.reg))<>get_alias(getsupreg(oper[n+1]^.reg))) then
  116. begin
  117. { One of the arguments shall be able to be replaced }
  118. if (getregtype(oper[n+0]^.reg)=regtype) and
  119. (get_alias(getsupreg(oper[n+0]^.reg))=orgreg) then
  120. replaceoper:=0+n
  121. else
  122. if (getregtype(oper[n+1]^.reg)=regtype) and
  123. (get_alias(getsupreg(oper[n+1]^.reg))=orgreg) then
  124. replaceoper:=1+n
  125. else
  126. internalerror(200704281);
  127. end;
  128. if (oper[n+0]^.typ=top_reg) and
  129. (oper[n+1]^.typ=top_const) then
  130. begin
  131. if (getregtype(oper[0+n]^.reg)=regtype) and
  132. (get_alias(getsupreg(oper[0+n]^.reg))=orgreg) then
  133. replaceoper:=0+n
  134. else
  135. internalerror(200704282);
  136. end;
  137. if (oper[n+0]^.typ=top_const) and
  138. (oper[n+1]^.typ=top_reg) then
  139. begin
  140. if (getregtype(oper[1+n]^.reg)=regtype) and
  141. (get_alias(getsupreg(oper[1+n]^.reg))=orgreg) then
  142. replaceoper:=1+n
  143. else
  144. internalerror(200704283);
  145. end;
  146. case replaceoper of
  147. 0 :
  148. begin
  149. { Some instructions don't allow memory references
  150. for source }
  151. case instr.opcode of
  152. A_BT,
  153. A_BTS,
  154. A_BTC,
  155. A_BTR :
  156. replaceoper:=-1;
  157. end;
  158. end;
  159. 1 :
  160. begin
  161. { Some instructions don't allow memory references
  162. for destination }
  163. case instr.opcode of
  164. A_MOVZX,
  165. A_MOVSX,
  166. A_MULSS,
  167. A_MULSD,
  168. A_SUBSS,
  169. A_SUBSD,
  170. A_ADDSD,
  171. A_ADDSS,
  172. A_DIVSD,
  173. A_DIVSS,
  174. A_SHLD,
  175. A_SHRD,
  176. A_CVTDQ2PD,
  177. A_CVTDQ2PS,
  178. A_CVTPD2DQ,
  179. A_CVTPD2PI,
  180. A_CVTPD2PS,
  181. A_CVTPI2PD,
  182. A_CVTPS2DQ,
  183. A_CVTPS2PD,
  184. A_CVTSD2SI,
  185. A_CVTSD2SS,
  186. A_CVTSI2SD,
  187. A_CVTSS2SD,
  188. A_CVTTPD2PI,
  189. A_CVTTPD2DQ,
  190. A_CVTTPS2DQ,
  191. A_CVTTSD2SI,
  192. A_CVTPI2PS,
  193. A_CVTPS2PI,
  194. A_CVTSI2SS,
  195. A_CVTSS2SI,
  196. A_CVTTPS2PI,
  197. A_CVTTSS2SI,
  198. A_IMUL,
  199. A_XORPD,
  200. A_XORPS,
  201. A_ORPD,
  202. A_ORPS,
  203. A_ANDPD,
  204. A_ANDPS:
  205. replaceoper:=-1;
  206. {$ifdef x86_64}
  207. A_MOV:
  208. { 64 bit constants can only be moved into registers }
  209. if (oper[0]^.typ=top_const) and
  210. (oper[1]^.typ=top_reg) and
  211. ((oper[0]^.val<low(longint)) or
  212. (oper[0]^.val>high(longint))) then
  213. replaceoper:=-1;
  214. {$endif x86_64}
  215. end;
  216. end;
  217. end;
  218. end;
  219. end;
  220. { Replace register with spill reference }
  221. if replaceoper<>-1 then
  222. begin
  223. oper[replaceoper]^.typ:=top_ref;
  224. new(oper[replaceoper]^.ref);
  225. oper[replaceoper]^.ref^:=spilltemp;
  226. { memory locations aren't guaranteed to be aligned }
  227. case opcode of
  228. A_MOVAPS:
  229. opcode:=A_MOVSS;
  230. A_MOVAPD:
  231. opcode:=A_MOVSD;
  232. end;
  233. result:=true;
  234. end;
  235. end;
  236. end;
  237. {******************************************************************************
  238. Trgx86fpu
  239. ******************************************************************************}
  240. constructor Trgx86fpu.create;
  241. begin
  242. used_in_proc:=[];
  243. unusedregsfpu:=usableregsfpu;
  244. end;
  245. function trgx86fpu.getregisterfpu(list: TAsmList) : tregister;
  246. begin
  247. { note: don't return R_ST0, see comments above implementation of }
  248. { a_loadfpu_* methods in cgcpu (JM) }
  249. result:=NR_ST;
  250. end;
  251. procedure trgx86fpu.ungetregisterfpu(list : TAsmList; r : tregister);
  252. begin
  253. { nothing to do, fpu stack management is handled by the load/ }
  254. { store operations in cgcpu (JM) }
  255. end;
  256. function trgx86fpu.correct_fpuregister(r : tregister;ofs : byte) : tregister;
  257. begin
  258. correct_fpuregister:=r;
  259. setsupreg(correct_fpuregister,ofs);
  260. end;
  261. procedure trgx86fpu.saveusedfpuregisters(list: TAsmList;
  262. var saved : tpushedsavedfpu;
  263. const s: tcpuregisterset);
  264. { var
  265. r : tregister;
  266. hr : treference; }
  267. begin
  268. used_in_proc:=used_in_proc+s;
  269. { TODO: firstsavefpureg}
  270. (*
  271. { don't try to save the fpu registers if not desired (e.g. for }
  272. { the 80x86) }
  273. if firstsavefpureg <> R_NO then
  274. for r.enum:=firstsavefpureg to lastsavefpureg do
  275. begin
  276. saved[r.enum].ofs:=reg_not_saved;
  277. { if the register is used by the calling subroutine and if }
  278. { it's not a regvar (those are handled separately) }
  279. if not is_reg_var_other[r.enum] and
  280. (r.enum in s) and
  281. { and is present in use }
  282. not(r.enum in unusedregsfpu) then
  283. begin
  284. { then save it }
  285. tg.GetTemp(list,extended_size,tt_persistent,hr);
  286. saved[r.enum].ofs:=hr.offset;
  287. cg.a_loadfpu_reg_ref(list,OS_FLOAT,OS_FLOAT,r,hr);
  288. cg.a_reg_dealloc(list,r);
  289. include(unusedregsfpu,r.enum);
  290. inc(countunusedregsfpu);
  291. end;
  292. end;
  293. *)
  294. end;
  295. procedure trgx86fpu.restoreusedfpuregisters(list : TAsmList;
  296. const saved : tpushedsavedfpu);
  297. {
  298. var
  299. r,r2 : tregister;
  300. hr : treference;
  301. }
  302. begin
  303. { TODO: firstsavefpureg}
  304. (*
  305. if firstsavefpureg <> R_NO then
  306. for r.enum:=lastsavefpureg downto firstsavefpureg do
  307. begin
  308. if saved[r.enum].ofs <> reg_not_saved then
  309. begin
  310. r2.enum:=R_INTREGISTER;
  311. r2.number:=NR_FRAME_POINTER_REG;
  312. reference_reset_base(hr,r2,saved[r.enum].ofs);
  313. cg.a_reg_alloc(list,r);
  314. cg.a_loadfpu_ref_reg(list,OS_FLOAT,OS_FLOAT,hr,r);
  315. if not (r.enum in unusedregsfpu) then
  316. { internalerror(10)
  317. in n386cal we always save/restore the reg *state*
  318. using save/restoreunusedstate -> the current state
  319. may not be real (JM) }
  320. else
  321. begin
  322. dec(countunusedregsfpu);
  323. exclude(unusedregsfpu,r.enum);
  324. end;
  325. tg.UnGetTemp(list,hr);
  326. end;
  327. end;
  328. *)
  329. end;
  330. (*
  331. procedure Trgx86fpu.saveotherregvars(list: TAsmList; const s: totherregisterset);
  332. var
  333. r: Tregister;
  334. begin
  335. if not(cs_opt_regvar in current_settings.optimizerswitches) then
  336. exit;
  337. if firstsavefpureg <> NR_NO then
  338. for r.enum := firstsavefpureg to lastsavefpureg do
  339. if is_reg_var_other[r.enum] and
  340. (r.enum in s) then
  341. store_regvar(list,r);
  342. end;
  343. *)
  344. end.