cgobj.pas 88 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Member of the Free Pascal development team
  5. This unit implements the basic code generator object
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. {# @abstract(Abstract code generator unit)
  20. Abstreact code generator unit. This contains the base class
  21. to implement for all new supported processors.
  22. WARNING: None of the routines implemented in these modules,
  23. or their descendants, should use the temp. allocator, as
  24. these routines may be called inside genentrycode, and the
  25. stack frame is already setup!
  26. }
  27. unit cgobj;
  28. {$i fpcdefs.inc}
  29. interface
  30. uses
  31. cclasses,globtype,
  32. cpubase,cpuinfo,cgbase,parabase,
  33. aasmbase,aasmtai,aasmcpu,
  34. symconst,symbase,symtype,symdef,symtable,rgobj
  35. ;
  36. type
  37. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times:cardinal;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {$ifdef flowgraph}
  61. procedure init_flowgraph;
  62. procedure done_flowgraph;
  63. {$endif}
  64. {# Gets a register suitable to do integer operations on.}
  65. function getintregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  66. {# Gets a register suitable to do integer operations on.}
  67. function getaddressregister(list:Taasmoutput):Tregister;virtual;
  68. function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  69. function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  70. function getflagregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
  71. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  72. the cpu specific child cg object have such a method?}
  73. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  74. procedure add_move_instruction(instr:Taicpu);virtual;
  75. function uses_registers(rt:Tregistertype):boolean;virtual;
  76. {# Get a specific register.}
  77. procedure getcpuregister(list:Taasmoutput;r:Tregister);virtual;
  78. procedure ungetcpuregister(list:Taasmoutput;r:Tregister);virtual;
  79. {# Get multiple registers specified.}
  80. procedure alloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  81. {# Free multiple registers specified.}
  82. procedure dealloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  83. procedure do_register_allocation(list:Taasmoutput;headertai:tai);virtual;
  84. function makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  85. {# Emit a label to the instruction stream. }
  86. procedure a_label(list : taasmoutput;l : tasmlabel);virtual;
  87. {# Allocates register r by inserting a pai_realloc record }
  88. procedure a_reg_alloc(list : taasmoutput;r : tregister);
  89. {# Deallocates register r by inserting a pa_regdealloc record}
  90. procedure a_reg_dealloc(list : taasmoutput;r : tregister);
  91. { Synchronize register, make sure it is still valid }
  92. procedure a_reg_sync(list : taasmoutput;r : tregister);
  93. {# Pass a parameter, which is located in a register, to a routine.
  94. This routine should push/send the parameter to the routine, as
  95. required by the specific processor ABI and routine modifiers.
  96. This must be overriden for each CPU target.
  97. @param(size size of the operand in the register)
  98. @param(r register source of the operand)
  99. @param(paraloc where the parameter will be stored)
  100. }
  101. procedure a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const paraloc : TCGPara);virtual;
  102. {# Pass a parameter, which is a constant, to a routine.
  103. A generic version is provided. This routine should
  104. be overriden for optimization purposes if the cpu
  105. permits directly sending this type of parameter.
  106. @param(size size of the operand in constant)
  107. @param(a value of constant to send)
  108. @param(paraloc where the parameter will be stored)
  109. }
  110. procedure a_param_const(list : taasmoutput;size : tcgsize;a : aint;const paraloc : TCGPara);virtual;
  111. {# Pass the value of a parameter, which is located in memory, to a routine.
  112. A generic version is provided. This routine should
  113. be overriden for optimization purposes if the cpu
  114. permits directly sending this type of parameter.
  115. @param(size size of the operand in constant)
  116. @param(r Memory reference of value to send)
  117. @param(paraloc where the parameter will be stored)
  118. }
  119. procedure a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const paraloc : TCGPara);virtual;
  120. {# Pass the value of a parameter, which can be located either in a register or memory location,
  121. to a routine.
  122. A generic version is provided.
  123. @param(l location of the operand to send)
  124. @param(nr parameter number (starting from one) of routine (from left to right))
  125. @param(paraloc where the parameter will be stored)
  126. }
  127. procedure a_param_loc(list : taasmoutput;const l : tlocation;const paraloc : TCGPara);
  128. {# Pass the address of a reference to a routine. This routine
  129. will calculate the address of the reference, and pass this
  130. calculated address as a parameter.
  131. A generic version is provided. This routine should
  132. be overriden for optimization purposes if the cpu
  133. permits directly sending this type of parameter.
  134. @param(r reference to get address from)
  135. @param(nr parameter number (starting from one) of routine (from left to right))
  136. }
  137. procedure a_paramaddr_ref(list : taasmoutput;const r : treference;const paraloc : TCGPara);virtual;
  138. { Copies a whole memory block to the stack, the paraloc must be a memory location }
  139. procedure a_param_copy_ref(list : taasmoutput;size : aint;const r : treference;const paraloc : TCGPara);
  140. { Remarks:
  141. * If a method specifies a size you have only to take care
  142. of that number of bits, i.e. load_const_reg with OP_8 must
  143. only load the lower 8 bit of the specified register
  144. the rest of the register can be undefined
  145. if necessary the compiler will call a method
  146. to zero or sign extend the register
  147. * The a_load_XX_XX with OP_64 needn't to be
  148. implemented for 32 bit
  149. processors, the code generator takes care of that
  150. * the addr size is for work with the natural pointer
  151. size
  152. * the procedures without fpu/mm are only for integer usage
  153. * normally the first location is the source and the
  154. second the destination
  155. }
  156. {# Emits instruction to call the method specified by symbol name.
  157. This routine must be overriden for each new target cpu.
  158. There is no a_call_ref because loading the reference will use
  159. a temp register on most cpu's resulting in conflicts with the
  160. registers used for the parameters (PFV)
  161. }
  162. procedure a_call_name(list : taasmoutput;const s : string);virtual; abstract;
  163. procedure a_call_reg(list : taasmoutput;reg : tregister);virtual;abstract;
  164. { move instructions }
  165. procedure a_load_const_reg(list : taasmoutput;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  166. procedure a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);virtual;
  167. procedure a_load_const_loc(list : taasmoutput;a : aint;const loc : tlocation);
  168. procedure a_load_reg_ref(list : taasmoutput;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  169. procedure a_load_reg_reg(list : taasmoutput;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  170. procedure a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  171. procedure a_load_ref_reg(list : taasmoutput;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  172. procedure a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  173. procedure a_load_loc_reg(list : taasmoutput;tosize: tcgsize; const loc: tlocation; reg : tregister);
  174. procedure a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  175. procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);virtual; abstract;
  176. { fpu move instructions }
  177. procedure a_loadfpu_reg_reg(list: taasmoutput; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  178. procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  179. procedure a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  180. procedure a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  181. procedure a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  182. procedure a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const paraloc : TCGPara);virtual;
  183. procedure a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const paraloc : TCGPara);virtual;
  184. { vector register move instructions }
  185. procedure a_loadmm_reg_reg(list: taasmoutput; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  186. procedure a_loadmm_ref_reg(list: taasmoutput; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  187. procedure a_loadmm_reg_ref(list: taasmoutput; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  188. procedure a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  189. procedure a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  190. procedure a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const paraloc : TCGPara;shuffle : pmmshuffle); virtual;
  191. procedure a_parammm_ref(list: taasmoutput; size: tcgsize; const ref: treference;const paraloc : TCGPara;shuffle : pmmshuffle); virtual;
  192. procedure a_parammm_loc(list: taasmoutput; const loc: tlocation; const paraloc : TCGPara;shuffle : pmmshuffle); virtual;
  193. procedure a_opmm_reg_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  194. procedure a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  195. procedure a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  196. procedure a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  197. { basic arithmetic operations }
  198. { note: for operators which require only one argument (not, neg), use }
  199. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  200. { that in this case the *second* operand is used as both source and }
  201. { destination (JM) }
  202. procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  203. procedure a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  204. procedure a_op_const_loc(list : taasmoutput; Op: TOpCG; a: Aint; const loc: tlocation);
  205. procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  206. procedure a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  207. procedure a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  208. procedure a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  209. procedure a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  210. { trinary operations for processors that support them, 'emulated' }
  211. { on others. None with "ref" arguments since I don't think there }
  212. { are any processors that support it (JM) }
  213. procedure a_op_const_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  214. procedure a_op_reg_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  215. procedure a_op_const_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  216. procedure a_op_reg_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  217. { comparison operations }
  218. procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  219. l : tasmlabel);virtual; abstract;
  220. procedure a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  221. l : tasmlabel); virtual;
  222. procedure a_cmp_const_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  223. l : tasmlabel);
  224. procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  225. procedure a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  226. procedure a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  227. procedure a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  228. procedure a_cmp_ref_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  229. l : tasmlabel);
  230. procedure a_jmp_name(list : taasmoutput;const s : string); virtual; abstract;
  231. procedure a_jmp_always(list : taasmoutput;l: tasmlabel); virtual; abstract;
  232. procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); virtual; abstract;
  233. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  234. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  235. }
  236. procedure g_flags2reg(list: taasmoutput; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  237. procedure g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  238. {
  239. This routine tries to optimize the const_reg opcode, and should be
  240. called at the start of a_op_const_reg. It returns the actual opcode
  241. to emit, and the constant value to emit. If this routine returns
  242. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  243. @param(op The opcode to emit, returns the opcode which must be emitted)
  244. @param(a The constant which should be emitted, returns the constant which must
  245. be emitted)
  246. @param(reg The register to emit the opcode with, returns the register with
  247. which the opcode will be emitted)
  248. }
  249. function optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg: tregister): boolean;virtual;
  250. {#
  251. This routine is used in exception management nodes. It should
  252. save the exception reason currently in the FUNCTION_RETURN_REG. The
  253. save should be done either to a temp (pointed to by href).
  254. or on the stack (pushing the value on the stack).
  255. The size of the value to save is OS_S32. The default version
  256. saves the exception reason to a temp. memory area.
  257. }
  258. procedure g_exception_reason_save(list : taasmoutput; const href : treference);virtual;
  259. {#
  260. This routine is used in exception management nodes. It should
  261. save the exception reason constant. The
  262. save should be done either to a temp (pointed to by href).
  263. or on the stack (pushing the value on the stack).
  264. The size of the value to save is OS_S32. The default version
  265. saves the exception reason to a temp. memory area.
  266. }
  267. procedure g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);virtual;
  268. {#
  269. This routine is used in exception management nodes. It should
  270. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  271. should either be in the temp. area (pointed to by href , href should
  272. *NOT* be freed) or on the stack (the value should be popped).
  273. The size of the value to save is OS_S32. The default version
  274. saves the exception reason to a temp. memory area.
  275. }
  276. procedure g_exception_reason_load(list : taasmoutput; const href : treference);virtual;
  277. procedure g_maybe_testself(list : taasmoutput;reg:tregister);
  278. procedure g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  279. {# This should emit the opcode to copy len bytes from the source
  280. to destination, if loadref is true, it assumes that it first must load
  281. the source address from the memory location where
  282. source points to.
  283. It must be overriden for each new target processor.
  284. @param(source Source reference of copy)
  285. @param(dest Destination reference of copy)
  286. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  287. }
  288. procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aint;loadref : boolean);virtual; abstract;
  289. {# This should emit the opcode to copy len bytes from the an unaligned source
  290. to destination, if loadref is true, it assumes that it first must load
  291. the source address from the memory location where
  292. source points to.
  293. It must be overriden for each new target processor.
  294. @param(source Source reference of copy)
  295. @param(dest Destination reference of copy)
  296. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  297. }
  298. procedure g_concatcopy_unaligned(list : taasmoutput;const source,dest : treference;len : aint;loadref : boolean);virtual;
  299. {# This should emit the opcode to a shortrstring from the source
  300. to destination, if loadref is true, it assumes that it first must load
  301. the source address from the memory location where
  302. source points to.
  303. @param(source Source reference of copy)
  304. @param(dest Destination reference of copy)
  305. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  306. }
  307. procedure g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;loadref : boolean);
  308. procedure g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  309. procedure g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  310. procedure g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  311. procedure g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  312. {# Generates range checking code. It is to note
  313. that this routine does not need to be overriden,
  314. as it takes care of everything.
  315. @param(p Node which contains the value to check)
  316. @param(todef Type definition of node to range check)
  317. }
  318. procedure g_rangecheck(list: taasmoutput; const l:tlocation; fromdef,todef: tdef); virtual;
  319. {# Generates overflow checking code for a node }
  320. procedure g_overflowcheck(list: taasmoutput; const Loc:tlocation; def:tdef); virtual;abstract;
  321. procedure g_overflowCheck_loc(List:TAasmOutput;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  322. procedure g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;const lenloc:tlocation;elesize:aint;loadref:boolean);virtual;
  323. procedure g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);virtual;
  324. {# Emits instructions when compilation is done in profile
  325. mode (this is set as a command line option). The default
  326. behavior does nothing, should be overriden as required.
  327. }
  328. procedure g_profilecode(list : taasmoutput);virtual;
  329. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  330. @param(size Number of bytes to allocate)
  331. }
  332. procedure g_stackpointer_alloc(list : taasmoutput;size : longint);virtual; abstract;
  333. {# Emits instruction for allocating the locals in entry
  334. code of a routine. This is one of the first
  335. routine called in @var(genentrycode).
  336. @param(localsize Number of bytes to allocate as locals)
  337. }
  338. procedure g_proc_entry(list : taasmoutput;localsize : longint;nostackframe:boolean);virtual; abstract;
  339. {# Emits instructions for returning from a subroutine.
  340. Should also restore the framepointer and stack.
  341. @param(parasize Number of bytes of parameters to deallocate from stack)
  342. }
  343. procedure g_proc_exit(list : taasmoutput;parasize:longint;nostackframe:boolean);virtual;abstract;
  344. {# This routine is called when generating the code for the entry point
  345. of a routine. It should save all registers which are not used in this
  346. routine, and which should be declared as saved in the std_saved_registers
  347. set.
  348. This routine is mainly used when linking to code which is generated
  349. by ABI-compliant compilers (like GCC), to make sure that the reserved
  350. registers of that ABI are not clobbered.
  351. @param(usedinproc Registers which are used in the code of this routine)
  352. }
  353. procedure g_save_standard_registers(list:Taasmoutput);virtual;abstract;
  354. {# This routine is called when generating the code for the exit point
  355. of a routine. It should restore all registers which were previously
  356. saved in @var(g_save_standard_registers).
  357. @param(usedinproc Registers which are used in the code of this routine)
  358. }
  359. procedure g_restore_standard_registers(list:Taasmoutput);virtual;abstract;
  360. procedure g_save_all_registers(list : taasmoutput);virtual;abstract;
  361. procedure g_restore_all_registers(list : taasmoutput;const funcretparaloc:TCGPara);virtual;abstract;
  362. end;
  363. {$ifndef cpu64bit}
  364. {# @abstract(Abstract code generator for 64 Bit operations)
  365. This class implements an abstract code generator class
  366. for 64 Bit operations.
  367. }
  368. tcg64 = class
  369. procedure a_load64_const_ref(list : taasmoutput;value : int64;const ref : treference);virtual;abstract;
  370. procedure a_load64_reg_ref(list : taasmoutput;reg : tregister64;const ref : treference);virtual;abstract;
  371. procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reg : tregister64);virtual;abstract;
  372. procedure a_load64_reg_reg(list : taasmoutput;regsrc,regdst : tregister64);virtual;abstract;
  373. procedure a_load64_const_reg(list : taasmoutput;value : int64;reg : tregister64);virtual;abstract;
  374. procedure a_load64_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister64);virtual;abstract;
  375. procedure a_load64_loc_ref(list : taasmoutput;const l : tlocation;const ref : treference);virtual;abstract;
  376. procedure a_load64_const_loc(list : taasmoutput;value : int64;const l : tlocation);virtual;abstract;
  377. procedure a_load64_reg_loc(list : taasmoutput;reg : tregister64;const l : tlocation);virtual;abstract;
  378. procedure a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  379. procedure a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  380. procedure a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  381. procedure a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  382. procedure a_load64high_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  383. procedure a_load64low_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  384. procedure a_op64_ref_reg(list : taasmoutput;op:TOpCG;const ref : treference;reg : tregister64);virtual;abstract;
  385. procedure a_op64_reg_reg(list : taasmoutput;op:TOpCG;regsrc,regdst : tregister64);virtual;abstract;
  386. procedure a_op64_reg_ref(list : taasmoutput;op:TOpCG;regsrc : tregister64;const ref : treference);virtual;abstract;
  387. procedure a_op64_const_reg(list : taasmoutput;op:TOpCG;value : int64;regdst : tregister64);virtual;abstract;
  388. procedure a_op64_const_ref(list : taasmoutput;op:TOpCG;value : int64;const ref : treference);virtual;abstract;
  389. procedure a_op64_const_loc(list : taasmoutput;op:TOpCG;value : int64;const l: tlocation);virtual;abstract;
  390. procedure a_op64_reg_loc(list : taasmoutput;op:TOpCG;reg : tregister64;const l : tlocation);virtual;abstract;
  391. procedure a_op64_loc_reg(list : taasmoutput;op:TOpCG;const l : tlocation;reg64 : tregister64);virtual;abstract;
  392. procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64;regsrc,regdst : tregister64);virtual;
  393. procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);virtual;
  394. procedure a_param64_reg(list : taasmoutput;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  395. procedure a_param64_const(list : taasmoutput;value : int64;const loc : TCGPara);virtual;abstract;
  396. procedure a_param64_ref(list : taasmoutput;const r : treference;const loc : TCGPara);virtual;abstract;
  397. procedure a_param64_loc(list : taasmoutput;const l : tlocation;const loc : TCGPara);virtual;abstract;
  398. {
  399. This routine tries to optimize the const_reg opcode, and should be
  400. called at the start of a_op64_const_reg. It returns the actual opcode
  401. to emit, and the constant value to emit. If this routine returns
  402. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  403. @param(op The opcode to emit, returns the opcode which must be emitted)
  404. @param(a The constant which should be emitted, returns the constant which must
  405. be emitted)
  406. @param(reg The register to emit the opcode with, returns the register with
  407. which the opcode will be emitted)
  408. }
  409. function optimize64_op_const_reg(list: taasmoutput; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  410. { override to catch 64bit rangechecks }
  411. procedure g_rangecheck64(list: taasmoutput; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  412. end;
  413. {$endif cpu64bit}
  414. { tlocation handling }
  415. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  416. procedure location_freetemp(list: taasmoutput; const l : tlocation);
  417. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  418. procedure location_swap(var destloc,sourceloc : tlocation);
  419. var
  420. {# Main code generator class }
  421. cg : tcg;
  422. {$ifndef cpu64bit}
  423. {# Code generator class for all operations working with 64-Bit operands }
  424. cg64 : tcg64;
  425. {$endif cpu64bit}
  426. implementation
  427. uses
  428. globals,options,systems,
  429. verbose,defutil,paramgr,
  430. tgobj,cutils,
  431. cgutils;
  432. const
  433. { Please leave this here, this module should NOT use
  434. exprasmlist, the lists are always passed as arguments.
  435. Declaring it as string here results in an error when compiling (PFV) }
  436. exprasmlist = 'error';
  437. {*****************************************************************************
  438. basic functionallity
  439. ******************************************************************************}
  440. constructor tcg.create;
  441. begin
  442. end;
  443. {*****************************************************************************
  444. register allocation
  445. ******************************************************************************}
  446. procedure tcg.init_register_allocators;
  447. begin
  448. fillchar(rg,sizeof(rg),0);
  449. add_reg_instruction_hook:=@add_reg_instruction;
  450. end;
  451. procedure tcg.done_register_allocators;
  452. begin
  453. { Safety }
  454. fillchar(rg,sizeof(rg),0);
  455. add_reg_instruction_hook:=nil;
  456. end;
  457. {$ifdef flowgraph}
  458. procedure Tcg.init_flowgraph;
  459. begin
  460. aktflownode:=0;
  461. end;
  462. procedure Tcg.done_flowgraph;
  463. begin
  464. end;
  465. {$endif}
  466. function tcg.getintregister(list:Taasmoutput;size:Tcgsize):Tregister;
  467. begin
  468. if not assigned(rg[R_INTREGISTER]) then
  469. internalerror(200312122);
  470. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  471. end;
  472. function tcg.getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;
  473. begin
  474. if not assigned(rg[R_FPUREGISTER]) then
  475. internalerror(200312123);
  476. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  477. end;
  478. function tcg.getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;
  479. begin
  480. if not assigned(rg[R_MMREGISTER]) then
  481. internalerror(200312124);
  482. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  483. end;
  484. function tcg.getaddressregister(list:Taasmoutput):Tregister;
  485. begin
  486. if assigned(rg[R_ADDRESSREGISTER]) then
  487. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  488. else
  489. begin
  490. if not assigned(rg[R_INTREGISTER]) then
  491. internalerror(200312121);
  492. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  493. end;
  494. end;
  495. function Tcg.makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  496. var
  497. subreg:Tsubregister;
  498. begin
  499. subreg:=cgsize2subreg(size);
  500. result:=reg;
  501. setsubreg(result,subreg);
  502. { notify RA }
  503. if result<>reg then
  504. list.concat(tai_regalloc.resize(result));
  505. end;
  506. procedure tcg.getcpuregister(list:Taasmoutput;r:Tregister);
  507. begin
  508. if not assigned(rg[getregtype(r)]) then
  509. internalerror(200312125);
  510. rg[getregtype(r)].getcpuregister(list,r);
  511. end;
  512. procedure tcg.ungetcpuregister(list:Taasmoutput;r:Tregister);
  513. begin
  514. if not assigned(rg[getregtype(r)]) then
  515. internalerror(200312126);
  516. rg[getregtype(r)].ungetcpuregister(list,r);
  517. end;
  518. procedure tcg.alloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  519. begin
  520. if assigned(rg[rt]) then
  521. rg[rt].alloccpuregisters(list,r)
  522. else
  523. internalerror(200310092);
  524. end;
  525. procedure tcg.dealloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  526. begin
  527. if assigned(rg[rt]) then
  528. rg[rt].dealloccpuregisters(list,r)
  529. else
  530. internalerror(200310093);
  531. end;
  532. function tcg.uses_registers(rt:Tregistertype):boolean;
  533. begin
  534. if assigned(rg[rt]) then
  535. result:=rg[rt].uses_registers
  536. else
  537. result:=false;
  538. end;
  539. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  540. var
  541. rt : tregistertype;
  542. begin
  543. rt:=getregtype(r);
  544. { Only add it when a register allocator is configured.
  545. No IE can be generated, because the VMT is written
  546. without a valid rg[] }
  547. if assigned(rg[rt]) then
  548. rg[rt].add_reg_instruction(instr,r);
  549. end;
  550. procedure tcg.add_move_instruction(instr:Taicpu);
  551. var
  552. rt : tregistertype;
  553. begin
  554. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  555. if assigned(rg[rt]) then
  556. rg[rt].add_move_instruction(instr)
  557. else
  558. internalerror(200310095);
  559. end;
  560. procedure tcg.do_register_allocation(list:Taasmoutput;headertai:tai);
  561. var
  562. rt : tregistertype;
  563. begin
  564. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  565. begin
  566. if assigned(rg[rt]) then
  567. rg[rt].do_register_allocation(list,headertai);
  568. end;
  569. { running the other register allocator passes could require addition int/addr. registers
  570. when spilling so run int/addr register allocation at the end }
  571. if assigned(rg[R_INTREGISTER]) then
  572. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  573. if assigned(rg[R_ADDRESSREGISTER]) then
  574. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  575. end;
  576. procedure tcg.a_reg_alloc(list : taasmoutput;r : tregister);
  577. begin
  578. list.concat(tai_regalloc.alloc(r,nil));
  579. end;
  580. procedure tcg.a_reg_dealloc(list : taasmoutput;r : tregister);
  581. begin
  582. list.concat(tai_regalloc.dealloc(r,nil));
  583. end;
  584. procedure tcg.a_reg_sync(list : taasmoutput;r : tregister);
  585. var
  586. instr : tai;
  587. begin
  588. instr:=tai_regalloc.sync(r);
  589. list.concat(instr);
  590. add_reg_instruction(instr,r);
  591. end;
  592. procedure tcg.a_label(list : taasmoutput;l : tasmlabel);
  593. begin
  594. list.concat(tai_label.create(l));
  595. end;
  596. {*****************************************************************************
  597. for better code generation these methods should be overridden
  598. ******************************************************************************}
  599. procedure tcg.a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const paraloc : TCGPara);
  600. var
  601. ref : treference;
  602. begin
  603. paraloc.check_simple_location;
  604. case paraloc.location^.loc of
  605. LOC_REGISTER,LOC_CREGISTER:
  606. a_load_reg_reg(list,size,paraloc.location^.size,r,paraloc.location^.register);
  607. LOC_REFERENCE,LOC_CREFERENCE:
  608. begin
  609. reference_reset_base(ref,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  610. a_load_reg_ref(list,size,paraloc.location^.size,r,ref);
  611. end
  612. else
  613. internalerror(2002071004);
  614. end;
  615. end;
  616. procedure tcg.a_param_const(list : taasmoutput;size : tcgsize;a : aint;const paraloc : TCGPara);
  617. var
  618. ref : treference;
  619. begin
  620. paraloc.check_simple_location;
  621. case paraloc.location^.loc of
  622. LOC_REGISTER,LOC_CREGISTER:
  623. a_load_const_reg(list,paraloc.location^.size,a,paraloc.location^.register);
  624. LOC_REFERENCE,LOC_CREFERENCE:
  625. begin
  626. reference_reset_base(ref,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  627. a_load_const_ref(list,paraloc.location^.size,a,ref);
  628. end
  629. else
  630. internalerror(2002071004);
  631. end;
  632. end;
  633. procedure tcg.a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const paraloc : TCGPara);
  634. var
  635. ref : treference;
  636. begin
  637. paraloc.check_simple_location;
  638. case paraloc.location^.loc of
  639. LOC_REGISTER,LOC_CREGISTER:
  640. a_load_ref_reg(list,size,paraloc.location^.size,r,paraloc.location^.register);
  641. LOC_REFERENCE,LOC_CREFERENCE:
  642. begin
  643. reference_reset(ref);
  644. ref.base:=paraloc.location^.reference.index;
  645. ref.offset:=paraloc.location^.reference.offset;
  646. { use concatcopy, because it can also be a float which fails when
  647. load_ref_ref is used }
  648. g_concatcopy(list,r,ref,tcgsize2size[size],false);
  649. end
  650. else
  651. internalerror(2002071004);
  652. end;
  653. end;
  654. procedure tcg.a_param_loc(list : taasmoutput;const l:tlocation;const paraloc : TCGPara);
  655. begin
  656. case l.loc of
  657. LOC_REGISTER,
  658. LOC_CREGISTER :
  659. a_param_reg(list,l.size,l.register,paraloc);
  660. LOC_CONSTANT :
  661. a_param_const(list,l.size,l.value,paraloc);
  662. LOC_CREFERENCE,
  663. LOC_REFERENCE :
  664. a_param_ref(list,l.size,l.reference,paraloc);
  665. else
  666. internalerror(2002032211);
  667. end;
  668. end;
  669. procedure tcg.a_paramaddr_ref(list : taasmoutput;const r : treference;const paraloc : TCGPara);
  670. var
  671. hr : tregister;
  672. begin
  673. hr:=getaddressregister(list);
  674. a_loadaddr_ref_reg(list,r,hr);
  675. a_param_reg(list,OS_ADDR,hr,paraloc);
  676. end;
  677. procedure tcg.a_param_copy_ref(list : taasmoutput;size : aint;const r : treference;const paraloc : TCGPara);
  678. var
  679. ref : treference;
  680. begin
  681. paraloc.check_simple_location;
  682. if not(paraloc.location^.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  683. internalerror(2003010901);
  684. reference_reset_base(ref,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  685. g_concatcopy(list,r,ref,size,false);
  686. end;
  687. {****************************************************************************
  688. some generic implementations
  689. ****************************************************************************}
  690. procedure tcg.a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  691. var
  692. tmpreg: tregister;
  693. begin
  694. { verify if we have the same reference }
  695. if references_equal(sref,dref) then
  696. exit;
  697. tmpreg:=getintregister(list,tosize);
  698. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  699. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  700. end;
  701. procedure tcg.a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);
  702. var
  703. tmpreg: tregister;
  704. begin
  705. tmpreg:=getintregister(list,size);
  706. a_load_const_reg(list,size,a,tmpreg);
  707. a_load_reg_ref(list,size,size,tmpreg,ref);
  708. end;
  709. procedure tcg.a_load_const_loc(list : taasmoutput;a : aint;const loc: tlocation);
  710. begin
  711. case loc.loc of
  712. LOC_REFERENCE,LOC_CREFERENCE:
  713. a_load_const_ref(list,loc.size,a,loc.reference);
  714. LOC_REGISTER,LOC_CREGISTER:
  715. a_load_const_reg(list,loc.size,a,loc.register);
  716. else
  717. internalerror(200203272);
  718. end;
  719. end;
  720. procedure tcg.a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  721. begin
  722. case loc.loc of
  723. LOC_REFERENCE,LOC_CREFERENCE:
  724. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  725. LOC_REGISTER,LOC_CREGISTER:
  726. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  727. else
  728. internalerror(200203271);
  729. end;
  730. end;
  731. procedure tcg.a_load_loc_reg(list : taasmoutput; tosize: tcgsize; const loc: tlocation; reg : tregister);
  732. begin
  733. case loc.loc of
  734. LOC_REFERENCE,LOC_CREFERENCE:
  735. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  736. LOC_REGISTER,LOC_CREGISTER:
  737. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  738. LOC_CONSTANT:
  739. a_load_const_reg(list,tosize,loc.value,reg);
  740. else
  741. internalerror(200109092);
  742. end;
  743. end;
  744. procedure tcg.a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  745. begin
  746. case loc.loc of
  747. LOC_REFERENCE,LOC_CREFERENCE:
  748. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  749. LOC_REGISTER,LOC_CREGISTER:
  750. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  751. LOC_CONSTANT:
  752. a_load_const_ref(list,tosize,loc.value,ref);
  753. else
  754. internalerror(200109302);
  755. end;
  756. end;
  757. function tcg.optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg:tregister): boolean;
  758. var
  759. powerval : longint;
  760. begin
  761. optimize_op_const_reg := false;
  762. case op of
  763. { or with zero returns same result }
  764. OP_OR : if a = 0 then optimize_op_const_reg := true;
  765. { and with max returns same result }
  766. OP_AND : if (a = high(a)) then optimize_op_const_reg := true;
  767. { division by 1 returns result }
  768. OP_DIV :
  769. begin
  770. if a = 1 then
  771. optimize_op_const_reg := true
  772. else if ispowerof2(int64(a), powerval) then
  773. begin
  774. a := powerval;
  775. op:= OP_SHR;
  776. end;
  777. exit;
  778. end;
  779. OP_IDIV:
  780. begin
  781. if a = 1 then
  782. optimize_op_const_reg := true
  783. else if ispowerof2(int64(a), powerval) then
  784. begin
  785. a := powerval;
  786. op:= OP_SAR;
  787. end;
  788. exit;
  789. end;
  790. OP_MUL,OP_IMUL:
  791. begin
  792. if a = 1 then
  793. optimize_op_const_reg := true
  794. else if ispowerof2(int64(a), powerval) then
  795. begin
  796. a := powerval;
  797. op:= OP_SHL;
  798. end;
  799. exit;
  800. end;
  801. OP_SAR,OP_SHL,OP_SHR:
  802. begin
  803. if a = 0 then
  804. optimize_op_const_reg := true;
  805. exit;
  806. end;
  807. end;
  808. end;
  809. procedure tcg.a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  810. begin
  811. case loc.loc of
  812. LOC_REFERENCE, LOC_CREFERENCE:
  813. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  814. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  815. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  816. else
  817. internalerror(200203301);
  818. end;
  819. end;
  820. procedure tcg.a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  821. begin
  822. case loc.loc of
  823. LOC_REFERENCE, LOC_CREFERENCE:
  824. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  825. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  826. a_loadfpu_reg_reg(list,size,reg,loc.register);
  827. else
  828. internalerror(48991);
  829. end;
  830. end;
  831. procedure tcg.a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const paraloc : TCGPara);
  832. var
  833. ref : treference;
  834. begin
  835. paraloc.check_simple_location;
  836. case paraloc.location^.loc of
  837. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  838. a_loadfpu_reg_reg(list,size,r,paraloc.location^.register);
  839. LOC_REFERENCE,LOC_CREFERENCE:
  840. begin
  841. reference_reset_base(ref,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  842. a_loadfpu_reg_ref(list,size,r,ref);
  843. end
  844. else
  845. internalerror(2002071004);
  846. end;
  847. end;
  848. procedure tcg.a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const paraloc : TCGPara);
  849. var
  850. href : treference;
  851. begin
  852. paraloc.check_simple_location;
  853. case paraloc.location^.loc of
  854. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  855. a_loadfpu_ref_reg(list,size,ref,paraloc.location^.register);
  856. LOC_REFERENCE,LOC_CREFERENCE:
  857. begin
  858. reference_reset_base(href,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  859. { concatcopy should choose the best way to copy the data }
  860. g_concatcopy(list,ref,href,tcgsize2size[size],false);
  861. end
  862. else
  863. internalerror(200402201);
  864. end;
  865. end;
  866. procedure tcg.a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  867. var
  868. tmpreg : tregister;
  869. begin
  870. tmpreg:=getintregister(list,size);
  871. a_load_ref_reg(list,size,size,ref,tmpreg);
  872. a_op_const_reg(list,op,size,a,tmpreg);
  873. a_load_reg_ref(list,size,size,tmpreg,ref);
  874. end;
  875. procedure tcg.a_op_const_loc(list : taasmoutput; Op: TOpCG; a: aint; const loc: tlocation);
  876. begin
  877. case loc.loc of
  878. LOC_REGISTER, LOC_CREGISTER:
  879. a_op_const_reg(list,op,loc.size,a,loc.register);
  880. LOC_REFERENCE, LOC_CREFERENCE:
  881. a_op_const_ref(list,op,loc.size,a,loc.reference);
  882. else
  883. internalerror(200109061);
  884. end;
  885. end;
  886. procedure tcg.a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  887. var
  888. tmpreg : tregister;
  889. begin
  890. tmpreg:=getintregister(list,size);
  891. a_load_ref_reg(list,size,size,ref,tmpreg);
  892. a_op_reg_reg(list,op,size,reg,tmpreg);
  893. a_load_reg_ref(list,size,size,tmpreg,ref);
  894. end;
  895. procedure tcg.a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  896. var
  897. tmpreg: tregister;
  898. begin
  899. case op of
  900. OP_NOT,OP_NEG:
  901. { handle it as "load ref,reg; op reg" }
  902. begin
  903. a_load_ref_reg(list,size,size,ref,reg);
  904. a_op_reg_reg(list,op,size,reg,reg);
  905. end;
  906. else
  907. begin
  908. tmpreg:=getintregister(list,size);
  909. a_load_ref_reg(list,size,size,ref,tmpreg);
  910. a_op_reg_reg(list,op,size,tmpreg,reg);
  911. end;
  912. end;
  913. end;
  914. procedure tcg.a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  915. begin
  916. case loc.loc of
  917. LOC_REGISTER, LOC_CREGISTER:
  918. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  919. LOC_REFERENCE, LOC_CREFERENCE:
  920. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  921. else
  922. internalerror(200109061);
  923. end;
  924. end;
  925. procedure tcg.a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  926. var
  927. tmpreg: tregister;
  928. begin
  929. case loc.loc of
  930. LOC_REGISTER,LOC_CREGISTER:
  931. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  932. LOC_REFERENCE,LOC_CREFERENCE:
  933. begin
  934. tmpreg:=getintregister(list,loc.size);
  935. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  936. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  937. end;
  938. else
  939. internalerror(200109061);
  940. end;
  941. end;
  942. procedure Tcg.a_op_const_reg_reg(list:Taasmoutput;op:Topcg;size:Tcgsize;
  943. a:aint;src,dst:Tregister);
  944. begin
  945. a_load_reg_reg(list,size,size,src,dst);
  946. a_op_const_reg(list,op,size,a,dst);
  947. end;
  948. procedure tcg.a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  949. size: tcgsize; src1, src2, dst: tregister);
  950. var
  951. tmpreg: tregister;
  952. begin
  953. if (dst<>src1) then
  954. begin
  955. a_load_reg_reg(list,size,size,src2,dst);
  956. a_op_reg_reg(list,op,size,src1,dst);
  957. end
  958. else
  959. begin
  960. tmpreg:=getintregister(list,size);
  961. a_load_reg_reg(list,size,size,src2,tmpreg);
  962. a_op_reg_reg(list,op,size,src1,tmpreg);
  963. a_load_reg_reg(list,size,size,tmpreg,dst);
  964. end;
  965. end;
  966. procedure tcg.a_op_const_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  967. begin
  968. a_op_const_reg_reg(list,op,size,a,src,dst);
  969. ovloc.loc:=LOC_VOID;
  970. end;
  971. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  972. begin
  973. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  974. ovloc.loc:=LOC_VOID;
  975. end;
  976. procedure tcg.a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  977. l : tasmlabel);
  978. var
  979. tmpreg: tregister;
  980. begin
  981. tmpreg:=getintregister(list,size);
  982. a_load_ref_reg(list,size,size,ref,tmpreg);
  983. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  984. end;
  985. procedure tcg.a_cmp_const_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  986. l : tasmlabel);
  987. begin
  988. case loc.loc of
  989. LOC_REGISTER,LOC_CREGISTER:
  990. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  991. LOC_REFERENCE,LOC_CREFERENCE:
  992. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  993. else
  994. internalerror(200109061);
  995. end;
  996. end;
  997. procedure tcg.a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  998. var
  999. tmpreg: tregister;
  1000. begin
  1001. tmpreg:=getintregister(list,size);
  1002. a_load_ref_reg(list,size,size,ref,tmpreg);
  1003. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1004. end;
  1005. procedure tcg.a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1006. var
  1007. tmpreg: tregister;
  1008. begin
  1009. tmpreg:=getintregister(list,size);
  1010. a_load_ref_reg(list,size,size,ref,tmpreg);
  1011. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1012. end;
  1013. procedure tcg.a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1014. begin
  1015. case loc.loc of
  1016. LOC_REGISTER,
  1017. LOC_CREGISTER:
  1018. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1019. LOC_REFERENCE,
  1020. LOC_CREFERENCE :
  1021. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1022. LOC_CONSTANT:
  1023. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1024. else
  1025. internalerror(200203231);
  1026. end;
  1027. end;
  1028. procedure tcg.a_cmp_ref_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1029. l : tasmlabel);
  1030. var
  1031. tmpreg: tregister;
  1032. begin
  1033. case loc.loc of
  1034. LOC_REGISTER,LOC_CREGISTER:
  1035. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1036. LOC_REFERENCE,LOC_CREFERENCE:
  1037. begin
  1038. tmpreg:=getintregister(list,size);
  1039. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1040. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1041. end
  1042. else
  1043. internalerror(200109061);
  1044. end;
  1045. end;
  1046. procedure tcg.a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1047. begin
  1048. case loc.loc of
  1049. LOC_MMREGISTER,LOC_CMMREGISTER:
  1050. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1051. LOC_REFERENCE,LOC_CREFERENCE:
  1052. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1053. else
  1054. internalerror(200310121);
  1055. end;
  1056. end;
  1057. procedure tcg.a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1058. begin
  1059. case loc.loc of
  1060. LOC_MMREGISTER,LOC_CMMREGISTER:
  1061. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1062. LOC_REFERENCE,LOC_CREFERENCE:
  1063. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1064. else
  1065. internalerror(200310122);
  1066. end;
  1067. end;
  1068. procedure tcg.a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const paraloc : TCGPara;shuffle : pmmshuffle);
  1069. var
  1070. href : treference;
  1071. begin
  1072. paraloc.check_simple_location;
  1073. case paraloc.location^.loc of
  1074. LOC_MMREGISTER,LOC_CMMREGISTER:
  1075. a_loadmm_reg_reg(list,size,paraloc.location^.size,reg,paraloc.location^.register,shuffle);
  1076. LOC_REFERENCE,LOC_CREFERENCE:
  1077. begin
  1078. reference_reset_base(href,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  1079. a_loadmm_reg_ref(list,size,paraloc.location^.size,reg,href,shuffle);
  1080. end
  1081. else
  1082. internalerror(200310123);
  1083. end;
  1084. end;
  1085. procedure tcg.a_parammm_ref(list: taasmoutput; size: tcgsize;const ref: treference;const paraloc : TCGPara;shuffle : pmmshuffle);
  1086. var
  1087. hr : tregister;
  1088. hs : tmmshuffle;
  1089. begin
  1090. paraloc.check_simple_location;
  1091. hr:=getmmregister(list,paraloc.location^.size);
  1092. a_loadmm_ref_reg(list,size,paraloc.location^.size,ref,hr,shuffle);
  1093. if realshuffle(shuffle) then
  1094. begin
  1095. hs:=shuffle^;
  1096. removeshuffles(hs);
  1097. a_parammm_reg(list,paraloc.location^.size,hr,paraloc,@hs);
  1098. end
  1099. else
  1100. a_parammm_reg(list,paraloc.location^.size,hr,paraloc,shuffle);
  1101. end;
  1102. procedure tcg.a_parammm_loc(list: taasmoutput;const loc: tlocation; const paraloc : TCGPara;shuffle : pmmshuffle);
  1103. begin
  1104. case loc.loc of
  1105. LOC_MMREGISTER,LOC_CMMREGISTER:
  1106. a_parammm_reg(list,loc.size,loc.register,paraloc,shuffle);
  1107. LOC_REFERENCE,LOC_CREFERENCE:
  1108. a_parammm_ref(list,loc.size,loc.reference,paraloc,shuffle);
  1109. else
  1110. internalerror(200310123);
  1111. end;
  1112. end;
  1113. procedure tcg.a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1114. var
  1115. hr : tregister;
  1116. hs : tmmshuffle;
  1117. begin
  1118. hr:=getmmregister(list,size);
  1119. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1120. if realshuffle(shuffle) then
  1121. begin
  1122. hs:=shuffle^;
  1123. removeshuffles(hs);
  1124. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1125. end
  1126. else
  1127. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1128. end;
  1129. procedure tcg.a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1130. var
  1131. hr : tregister;
  1132. hs : tmmshuffle;
  1133. begin
  1134. hr:=getmmregister(list,size);
  1135. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1136. if realshuffle(shuffle) then
  1137. begin
  1138. hs:=shuffle^;
  1139. removeshuffles(hs);
  1140. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1141. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1142. end
  1143. else
  1144. begin
  1145. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1146. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1147. end;
  1148. end;
  1149. procedure tcg.a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1150. begin
  1151. case loc.loc of
  1152. LOC_CMMREGISTER,LOC_MMREGISTER:
  1153. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1154. LOC_CREFERENCE,LOC_REFERENCE:
  1155. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1156. else
  1157. internalerror(200312232);
  1158. end;
  1159. end;
  1160. procedure tcg.g_concatcopy_unaligned(list : taasmoutput;const source,dest : treference;len : aint;loadref : boolean);
  1161. begin
  1162. g_concatcopy(list,source,dest,len,loadref);
  1163. end;
  1164. procedure tcg.g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;loadref : boolean);
  1165. var
  1166. paraloc1,paraloc2,paraloc3 : TCGPara;
  1167. begin
  1168. paraloc1.init;
  1169. paraloc2.init;
  1170. paraloc3.init;
  1171. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1172. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1173. paramanager.getintparaloc(pocall_default,3,paraloc3);
  1174. paramanager.allocparaloc(list,paraloc3);
  1175. a_paramaddr_ref(list,dest,paraloc3);
  1176. paramanager.allocparaloc(list,paraloc2);
  1177. if loadref then
  1178. a_param_ref(list,OS_ADDR,source,paraloc2)
  1179. else
  1180. a_paramaddr_ref(list,source,paraloc2);
  1181. paramanager.allocparaloc(list,paraloc1);
  1182. a_param_const(list,OS_INT,len,paraloc1);
  1183. paramanager.freeparaloc(list,paraloc3);
  1184. paramanager.freeparaloc(list,paraloc2);
  1185. paramanager.freeparaloc(list,paraloc1);
  1186. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1187. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1188. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  1189. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1190. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1191. paraloc3.done;
  1192. paraloc2.done;
  1193. paraloc1.done;
  1194. end;
  1195. procedure tcg.g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  1196. var
  1197. href : treference;
  1198. incrfunc : string;
  1199. paraloc1,paraloc2 : TCGPara;
  1200. begin
  1201. paraloc1.init;
  1202. paraloc2.init;
  1203. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1204. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1205. { These functions should not change the registers (they use
  1206. the saveregister proc directive }
  1207. if is_interfacecom(t) then
  1208. incrfunc:='FPC_INTF_INCR_REF'
  1209. else if is_ansistring(t) then
  1210. {$ifdef ansistring_bits}
  1211. begin
  1212. case Tstringdef(t).string_typ of
  1213. st_ansistring16:
  1214. incrfunc:='FPC_ANSISTR16_INCR_REF';
  1215. st_ansistring32:
  1216. incrfunc:='FPC_ANSISTR32_INCR_REF';
  1217. st_ansistring64:
  1218. incrfunc:='FPC_ANSISTR64_INCR_REF';
  1219. end;
  1220. end
  1221. {$else}
  1222. incrfunc:='FPC_ANSISTR_INCR_REF'
  1223. {$endif}
  1224. else if is_widestring(t) then
  1225. incrfunc:='FPC_WIDESTR_INCR_REF'
  1226. else if is_dynamic_array(t) then
  1227. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1228. else
  1229. incrfunc:='';
  1230. { call the special incr function or the generic addref }
  1231. if incrfunc<>'' then
  1232. begin
  1233. { these functions get the pointer by value }
  1234. paramanager.allocparaloc(list,paraloc1);
  1235. a_param_ref(list,OS_ADDR,ref,paraloc1);
  1236. paramanager.freeparaloc(list,paraloc1);
  1237. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1238. a_call_name(list,incrfunc);
  1239. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1240. end
  1241. else
  1242. begin
  1243. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1244. paramanager.allocparaloc(list,paraloc2);
  1245. a_paramaddr_ref(list,href,paraloc2);
  1246. paramanager.allocparaloc(list,paraloc1);
  1247. if loadref then
  1248. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1249. else
  1250. a_paramaddr_ref(list,ref,paraloc1);
  1251. paramanager.freeparaloc(list,paraloc1);
  1252. paramanager.freeparaloc(list,paraloc2);
  1253. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1254. a_call_name(list,'FPC_ADDREF');
  1255. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1256. end;
  1257. paraloc2.done;
  1258. paraloc1.done;
  1259. end;
  1260. procedure tcg.g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference; loadref:boolean);
  1261. var
  1262. hreg : tregister;
  1263. href : treference;
  1264. decrfunc : string;
  1265. needrtti : boolean;
  1266. paraloc1,paraloc2 : TCGPara;
  1267. begin
  1268. paraloc1.init;
  1269. paraloc2.init;
  1270. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1271. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1272. needrtti:=false;
  1273. if is_interfacecom(t) then
  1274. decrfunc:='FPC_INTF_DECR_REF'
  1275. else if is_ansistring(t) then
  1276. {$ifdef ansistring_bits}
  1277. begin
  1278. case Tstringdef(t).string_typ of
  1279. st_ansistring16:
  1280. decrfunc:='FPC_ANSISTR16_DECR_REF';
  1281. st_ansistring32:
  1282. decrfunc:='FPC_ANSISTR32_DECR_REF';
  1283. st_ansistring64:
  1284. decrfunc:='FPC_ANSISTR64_DECR_REF';
  1285. end;
  1286. end
  1287. {$else}
  1288. decrfunc:='FPC_ANSISTR_DECR_REF'
  1289. {$endif}
  1290. else if is_widestring(t) then
  1291. decrfunc:='FPC_WIDESTR_DECR_REF'
  1292. else if is_dynamic_array(t) then
  1293. begin
  1294. decrfunc:='FPC_DYNARRAY_DECR_REF';
  1295. needrtti:=true;
  1296. end
  1297. else
  1298. decrfunc:='';
  1299. { call the special decr function or the generic decref }
  1300. if decrfunc<>'' then
  1301. begin
  1302. if needrtti then
  1303. begin
  1304. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1305. paramanager.allocparaloc(list,paraloc2);
  1306. a_paramaddr_ref(list,href,paraloc2);
  1307. end;
  1308. paramanager.allocparaloc(list,paraloc1);
  1309. if loadref then
  1310. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1311. else
  1312. a_paramaddr_ref(list,ref,paraloc1);
  1313. paramanager.freeparaloc(list,paraloc1);
  1314. if needrtti then
  1315. paramanager.freeparaloc(list,paraloc2);
  1316. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1317. a_call_name(list,decrfunc);
  1318. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1319. end
  1320. else
  1321. begin
  1322. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1323. paramanager.allocparaloc(list,paraloc2);
  1324. a_paramaddr_ref(list,href,paraloc2);
  1325. paramanager.allocparaloc(list,paraloc1);
  1326. if loadref then
  1327. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1328. else
  1329. a_paramaddr_ref(list,ref,paraloc1);
  1330. paramanager.freeparaloc(list,paraloc1);
  1331. paramanager.freeparaloc(list,paraloc2);
  1332. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1333. a_call_name(list,'FPC_DECREF');
  1334. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1335. end;
  1336. { Temp locations need always to be reset to 0 }
  1337. if tg.istemp(ref) then
  1338. begin
  1339. if loadref then
  1340. begin
  1341. hreg:=getaddressregister(list);
  1342. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1343. reference_reset_base(href,hreg,0);
  1344. a_load_const_ref(list,OS_ADDR,0,href);
  1345. end
  1346. else
  1347. a_load_const_ref(list,OS_ADDR,0,ref);
  1348. end;
  1349. paraloc2.done;
  1350. paraloc1.done;
  1351. end;
  1352. procedure tcg.g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1353. var
  1354. href : treference;
  1355. paraloc1,paraloc2 : TCGPara;
  1356. begin
  1357. paraloc1.init;
  1358. paraloc2.init;
  1359. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1360. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1361. if is_ansistring(t) or
  1362. is_widestring(t) or
  1363. is_interfacecom(t) or
  1364. is_dynamic_array(t) then
  1365. a_load_const_ref(list,OS_ADDR,0,ref)
  1366. else
  1367. begin
  1368. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1369. paramanager.allocparaloc(list,paraloc2);
  1370. a_paramaddr_ref(list,href,paraloc2);
  1371. paramanager.allocparaloc(list,paraloc1);
  1372. if loadref then
  1373. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1374. else
  1375. a_paramaddr_ref(list,ref,paraloc1);
  1376. paramanager.freeparaloc(list,paraloc1);
  1377. paramanager.freeparaloc(list,paraloc2);
  1378. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1379. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1380. a_call_name(list,'FPC_INITIALIZE');
  1381. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1382. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1383. end;
  1384. paraloc1.done;
  1385. paraloc2.done;
  1386. end;
  1387. procedure tcg.g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1388. var
  1389. hreg : tregister;
  1390. href : treference;
  1391. paraloc1,paraloc2 : TCGPara;
  1392. begin
  1393. paraloc1.init;
  1394. paraloc2.init;
  1395. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1396. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1397. if is_ansistring(t) or
  1398. is_widestring(t) or
  1399. is_interfacecom(t) then
  1400. begin
  1401. g_decrrefcount(list,t,ref,loadref);
  1402. { Temp locations are already reset to 0 }
  1403. if not tg.istemp(ref) then
  1404. begin
  1405. if loadref then
  1406. begin
  1407. hreg:=getaddressregister(list);
  1408. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1409. reference_reset_base(href,hreg,0);
  1410. a_load_const_ref(list,OS_ADDR,0,href);
  1411. end
  1412. else
  1413. a_load_const_ref(list,OS_ADDR,0,ref);
  1414. end;
  1415. end
  1416. else
  1417. begin
  1418. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1419. paramanager.allocparaloc(list,paraloc2);
  1420. a_paramaddr_ref(list,href,paraloc2);
  1421. paramanager.allocparaloc(list,paraloc1);
  1422. if loadref then
  1423. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1424. else
  1425. a_paramaddr_ref(list,ref,paraloc1);
  1426. paramanager.freeparaloc(list,paraloc1);
  1427. paramanager.freeparaloc(list,paraloc2);
  1428. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1429. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1430. a_call_name(list,'FPC_FINALIZE');
  1431. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1432. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1433. end;
  1434. paraloc1.done;
  1435. paraloc2.done;
  1436. end;
  1437. procedure tcg.g_rangecheck(list: taasmoutput; const l:tlocation;fromdef,todef: tdef);
  1438. { generate range checking code for the value at location p. The type }
  1439. { type used is checked against todefs ranges. fromdef (p.resulttype.def) }
  1440. { is the original type used at that location. When both defs are equal }
  1441. { the check is also insert (needed for succ,pref,inc,dec) }
  1442. {$ifndef ver1_0}
  1443. const
  1444. aintmax=high(aint);
  1445. {$endif}
  1446. var
  1447. neglabel : tasmlabel;
  1448. hreg : tregister;
  1449. lto,hto,
  1450. lfrom,hfrom : TConstExprInt;
  1451. from_signed: boolean;
  1452. {$ifdef ver1_0}
  1453. aintmax : aint;
  1454. {$endif ver1_0}
  1455. begin
  1456. {$ifdef ver1_0}
  1457. {$ifdef cpu64bit}
  1458. { this is required to prevent incorrect code }
  1459. aintmax:=$7fffffff;
  1460. aintmax:=int64(aintmax shl 16) or int64($ffff);
  1461. aintmax:=int64(aintmax shl 16) or int64($ffff);
  1462. {$else cpu64bit}
  1463. aintmax:=high(aint);
  1464. {$endif cpu64bit}
  1465. {$endif}
  1466. { range checking on and range checkable value? }
  1467. if not(cs_check_range in aktlocalswitches) or
  1468. not(fromdef.deftype in [orddef,enumdef,arraydef]) then
  1469. exit;
  1470. {$ifndef cpu64bit}
  1471. { handle 64bit rangechecks separate for 32bit processors }
  1472. if is_64bit(fromdef) or is_64bit(todef) then
  1473. begin
  1474. cg64.g_rangecheck64(list,l,fromdef,todef);
  1475. exit;
  1476. end;
  1477. {$endif cpu64bit}
  1478. { only check when assigning to scalar, subranges are different, }
  1479. { when todef=fromdef then the check is always generated }
  1480. getrange(fromdef,lfrom,hfrom);
  1481. getrange(todef,lto,hto);
  1482. from_signed := is_signed(fromdef);
  1483. { no range check if from and to are equal and are both longint/dword }
  1484. { (if we have a 32bit processor) or int64/qword, since such }
  1485. { operations can at most cause overflows (JM) }
  1486. { Note that these checks are mostly processor independent, they only }
  1487. { have to be changed once we introduce 64bit subrange types }
  1488. {$ifdef cpu64bit}
  1489. if (fromdef = todef) and
  1490. (fromdef.deftype=orddef) and
  1491. (((((torddef(fromdef).typ = s64bit) and
  1492. (lfrom = low(int64)) and
  1493. (hfrom = high(int64))) or
  1494. ((torddef(fromdef).typ = u64bit) and
  1495. (lfrom = low(qword)) and
  1496. (hfrom = high(qword)))))) then
  1497. exit;
  1498. {$else cpu64bit}
  1499. if (fromdef = todef) and
  1500. (fromdef.deftype=orddef) and
  1501. (((((torddef(fromdef).typ = s32bit) and
  1502. (lfrom = low(longint)) and
  1503. (hfrom = high(longint))) or
  1504. ((torddef(fromdef).typ = u32bit) and
  1505. (lfrom = low(cardinal)) and
  1506. (hfrom = high(cardinal)))))) then
  1507. exit;
  1508. {$endif cpu64bit}
  1509. { if the from-range falls completely in the to-range, no check }
  1510. { is necessary. Don't do this conversion for the largest unsigned type }
  1511. if (todef<>fromdef) and
  1512. (from_signed or (hfrom>=0)) and
  1513. (lto<=lfrom) and (hto>=hfrom) then
  1514. exit;
  1515. { generate the rangecheck code for the def where we are going to }
  1516. { store the result }
  1517. { use the trick that }
  1518. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  1519. { To be able to do that, we have to make sure however that either }
  1520. { fromdef and todef are both signed or unsigned, or that we leave }
  1521. { the parts < 0 and > maxlongint out }
  1522. { is_signed now also works for arrays (it checks the rangetype) (JM) }
  1523. if from_signed xor is_signed(todef) then
  1524. begin
  1525. if from_signed then
  1526. { from is signed, to is unsigned }
  1527. begin
  1528. { if high(from) < 0 -> always range error }
  1529. if (hfrom < 0) or
  1530. { if low(to) > maxlongint also range error }
  1531. (lto > aintmax) then
  1532. begin
  1533. a_call_name(list,'FPC_RANGEERROR');
  1534. exit
  1535. end;
  1536. { from is signed and to is unsigned -> when looking at to }
  1537. { as an signed value, it must be < maxaint (otherwise }
  1538. { it will become negative, which is invalid since "to" is unsigned) }
  1539. if hto > aintmax then
  1540. hto := aintmax;
  1541. end
  1542. else
  1543. { from is unsigned, to is signed }
  1544. begin
  1545. if (lfrom > aintmax) or
  1546. (hto < 0) then
  1547. begin
  1548. a_call_name(list,'FPC_RANGEERROR');
  1549. exit
  1550. end;
  1551. { from is unsigned and to is signed -> when looking at to }
  1552. { as an unsigned value, it must be >= 0 (since negative }
  1553. { values are the same as values > maxlongint) }
  1554. if lto < 0 then
  1555. lto := 0;
  1556. end;
  1557. end;
  1558. hreg:=getintregister(list,OS_INT);
  1559. a_load_loc_reg(list,OS_INT,l,hreg);
  1560. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  1561. objectlibrary.getlabel(neglabel);
  1562. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  1563. a_call_name(list,'FPC_RANGEERROR');
  1564. a_label(list,neglabel);
  1565. end;
  1566. procedure tcg.g_overflowCheck_loc(List:TAasmOutput;const Loc:TLocation;def:TDef;ovloc : tlocation);
  1567. begin
  1568. g_overflowCheck(list,loc,def);
  1569. end;
  1570. procedure tcg.g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference);
  1571. var
  1572. tmpreg : tregister;
  1573. begin
  1574. tmpreg:=getintregister(list,size);
  1575. g_flags2reg(list,size,f,tmpreg);
  1576. a_load_reg_ref(list,size,size,tmpreg,ref);
  1577. end;
  1578. procedure tcg.g_maybe_testself(list : taasmoutput;reg:tregister);
  1579. var
  1580. OKLabel : tasmlabel;
  1581. paraloc1 : TCGPara;
  1582. begin
  1583. if (cs_check_object in aktlocalswitches) or
  1584. (cs_check_range in aktlocalswitches) then
  1585. begin
  1586. objectlibrary.getlabel(oklabel);
  1587. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  1588. paraloc1.init;
  1589. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1590. paramanager.allocparaloc(list,paraloc1);
  1591. a_param_const(list,OS_INT,210,paraloc1);
  1592. paramanager.freeparaloc(list,paraloc1);
  1593. a_call_name(list,'FPC_HANDLEERROR');
  1594. a_label(list,oklabel);
  1595. paraloc1.done;
  1596. end;
  1597. end;
  1598. procedure tcg.g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  1599. var
  1600. hrefvmt : treference;
  1601. paraloc1,paraloc2 : TCGPara;
  1602. begin
  1603. paraloc1.init;
  1604. paraloc2.init;
  1605. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1606. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1607. if (cs_check_object in aktlocalswitches) then
  1608. begin
  1609. reference_reset_symbol(hrefvmt,objectlibrary.newasmsymbol(objdef.vmt_mangledname,AB_EXTERNAL,AT_DATA),0);
  1610. paramanager.allocparaloc(list,paraloc2);
  1611. a_paramaddr_ref(list,hrefvmt,paraloc2);
  1612. paramanager.allocparaloc(list,paraloc1);
  1613. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1614. paramanager.freeparaloc(list,paraloc1);
  1615. paramanager.freeparaloc(list,paraloc2);
  1616. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1617. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  1618. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1619. end
  1620. else
  1621. if (cs_check_range in aktlocalswitches) then
  1622. begin
  1623. paramanager.allocparaloc(list,paraloc1);
  1624. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1625. paramanager.freeparaloc(list,paraloc1);
  1626. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1627. a_call_name(list,'FPC_CHECK_OBJECT');
  1628. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1629. end;
  1630. paraloc1.done;
  1631. paraloc2.done;
  1632. end;
  1633. {*****************************************************************************
  1634. Entry/Exit Code Functions
  1635. *****************************************************************************}
  1636. procedure tcg.g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;const lenloc:tlocation;elesize:aint;loadref:boolean);
  1637. var
  1638. sizereg,sourcereg,destreg : tregister;
  1639. paraloc1,paraloc2,paraloc3 : TCGPara;
  1640. begin
  1641. { because ppc abi doesn't support dynamic stack allocation properly
  1642. open array value parameters are copied onto the heap
  1643. }
  1644. { allocate two registers for len and source }
  1645. sizereg:=getintregister(list,OS_INT);
  1646. sourcereg:=getintregister(list,OS_ADDR);
  1647. destreg:=getintregister(list,OS_ADDR);
  1648. { calculate necessary memory }
  1649. a_load_loc_reg(list,OS_INT,lenloc,sizereg);
  1650. a_op_const_reg(list,OP_ADD,OS_INT,1,sizereg);
  1651. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  1652. { load source }
  1653. if loadref then
  1654. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,sourcereg)
  1655. else
  1656. begin
  1657. if (ref.index<>NR_NO) or (ref.offset<>0) then
  1658. internalerror(200410126);
  1659. a_load_reg_reg(list,OS_ADDR,OS_ADDR,ref.base,sourcereg);
  1660. end;
  1661. { do getmem call }
  1662. paraloc1.init;
  1663. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1664. paramanager.allocparaloc(list,paraloc1);
  1665. a_param_reg(list,OS_INT,sizereg,paraloc1);
  1666. paramanager.freeparaloc(list,paraloc1);
  1667. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1668. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1669. a_call_name(list,'FPC_GETMEM');
  1670. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1671. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1672. paraloc1.done;
  1673. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  1674. { patch the new address }
  1675. if loadref then
  1676. a_load_reg_ref(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,ref)
  1677. else
  1678. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,ref.base);
  1679. { do move call }
  1680. paraloc1.init;
  1681. paraloc2.init;
  1682. paraloc3.init;
  1683. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1684. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1685. paramanager.getintparaloc(pocall_default,3,paraloc3);
  1686. { load size }
  1687. paramanager.allocparaloc(list,paraloc3);
  1688. a_param_reg(list,OS_INT,sizereg,paraloc3);
  1689. { load destination }
  1690. paramanager.allocparaloc(list,paraloc2);
  1691. a_param_reg(list,OS_ADDR,destreg,paraloc2);
  1692. { load source }
  1693. paramanager.allocparaloc(list,paraloc1);
  1694. a_param_reg(list,OS_ADDR,sourcereg,paraloc1);
  1695. paramanager.freeparaloc(list,paraloc3);
  1696. paramanager.freeparaloc(list,paraloc2);
  1697. paramanager.freeparaloc(list,paraloc1);
  1698. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1699. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1700. a_call_name(list,'FPC_MOVE');
  1701. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1702. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1703. paraloc3.done;
  1704. paraloc2.done;
  1705. paraloc1.done;
  1706. end;
  1707. procedure tcg.g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);
  1708. var
  1709. paraloc1 : TCGPara;
  1710. begin
  1711. { do move call }
  1712. paraloc1.init;
  1713. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1714. { load source }
  1715. paramanager.allocparaloc(list,paraloc1);
  1716. a_param_ref(list,OS_ADDR,ref,paraloc1);
  1717. paramanager.freeparaloc(list,paraloc1);
  1718. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1719. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1720. a_call_name(list,'FPC_FREEMEM');
  1721. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1722. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1723. paraloc1.done;
  1724. end;
  1725. procedure tcg.g_profilecode(list : taasmoutput);
  1726. begin
  1727. end;
  1728. procedure tcg.g_exception_reason_save(list : taasmoutput; const href : treference);
  1729. begin
  1730. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  1731. end;
  1732. procedure tcg.g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);
  1733. begin
  1734. a_load_const_ref(list, OS_INT, a, href);
  1735. end;
  1736. procedure tcg.g_exception_reason_load(list : taasmoutput; const href : treference);
  1737. begin
  1738. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  1739. end;
  1740. {*****************************************************************************
  1741. TCG64
  1742. *****************************************************************************}
  1743. {$ifndef cpu64bit}
  1744. procedure tcg64.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64; regsrc,regdst : tregister64);
  1745. begin
  1746. a_load64_reg_reg(list,regsrc,regdst);
  1747. a_op64_const_reg(list,op,value,regdst);
  1748. end;
  1749. procedure tcg64.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);
  1750. var
  1751. tmpreg64 : tregister64;
  1752. begin
  1753. { when src1=dst then we need to first create a temp to prevent
  1754. overwriting src1 with src2 }
  1755. if (regsrc1.reghi=regdst.reghi) or
  1756. (regsrc1.reglo=regdst.reghi) or
  1757. (regsrc1.reghi=regdst.reglo) or
  1758. (regsrc1.reglo=regdst.reglo) then
  1759. begin
  1760. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  1761. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  1762. a_load64_reg_reg(list,regsrc2,tmpreg64);
  1763. a_op64_reg_reg(list,op,regsrc1,tmpreg64);
  1764. a_load64_reg_reg(list,tmpreg64,regdst);
  1765. end
  1766. else
  1767. begin
  1768. a_load64_reg_reg(list,regsrc2,regdst);
  1769. a_op64_reg_reg(list,op,regsrc1,regdst);
  1770. end;
  1771. end;
  1772. {$endif cpu64bit}
  1773. {****************************************************************************
  1774. TLocation
  1775. ****************************************************************************}
  1776. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  1777. begin
  1778. FillChar(l,sizeof(tlocation),0);
  1779. l.loc:=lt;
  1780. l.size:=lsize;
  1781. {$ifdef arm}
  1782. if l.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  1783. l.reference.signindex:=1;
  1784. {$endif arm}
  1785. end;
  1786. procedure location_freetemp(list:taasmoutput; const l : tlocation);
  1787. begin
  1788. if (l.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  1789. tg.ungetiftemp(list,l.reference);
  1790. end;
  1791. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  1792. begin
  1793. destloc:=sourceloc;
  1794. end;
  1795. procedure location_swap(var destloc,sourceloc : tlocation);
  1796. var
  1797. swapl : tlocation;
  1798. begin
  1799. swapl := destloc;
  1800. destloc := sourceloc;
  1801. sourceloc := swapl;
  1802. end;
  1803. initialization
  1804. ;
  1805. finalization
  1806. cg.free;
  1807. {$ifndef cpu64bit}
  1808. cg64.free;
  1809. {$endif cpu64bit}
  1810. end.
  1811. {
  1812. $Log$
  1813. Revision 1.179 2004-10-15 09:14:16 mazen
  1814. - remove $IFDEF DELPHI and related code
  1815. - remove $IFDEF FPCPROCVAR and related code
  1816. Revision 1.178 2004/10/13 21:12:51 peter
  1817. * -Or fixes for open array
  1818. Revision 1.177 2004/10/11 15:46:45 peter
  1819. * length parameter for copyvaluearray changed to tlocation
  1820. Revision 1.176 2004/10/10 20:31:48 peter
  1821. * concatcopy_unaligned maps by default to concatcopy, sparc will
  1822. override it with call to fpc_move
  1823. Revision 1.175 2004/10/10 20:22:53 peter
  1824. * symtable allocation rewritten
  1825. * loading of parameters to local temps/regs cleanup
  1826. * regvar support for parameters
  1827. * regvar support for staticsymtable (main body)
  1828. Revision 1.174 2004/10/05 20:41:01 peter
  1829. * more spilling rewrites
  1830. Revision 1.173 2004/09/29 18:55:40 florian
  1831. * fixed more sparc overflow stuff
  1832. * fixed some op64 stuff for sparc
  1833. Revision 1.172 2004/09/26 21:04:35 florian
  1834. + partial overflow checking on sparc; multiplication still missing
  1835. Revision 1.171 2004/09/26 17:45:30 peter
  1836. * simple regvar support, not yet finished
  1837. Revision 1.170 2004/09/25 14:23:54 peter
  1838. * ungetregister is now only used for cpuregisters, renamed to
  1839. ungetcpuregister
  1840. * renamed (get|unget)explicitregister(s) to ..cpuregister
  1841. * removed location-release/reference_release
  1842. Revision 1.169 2004/09/21 17:25:12 peter
  1843. * paraloc branch merged
  1844. Revision 1.168.4.4 2004/09/20 20:45:57 peter
  1845. * remove cg64.a_reg_alloc, it should not be used since it
  1846. create more register conflicts
  1847. Revision 1.168.4.3 2004/09/18 20:22:40 jonas
  1848. * allocate the volatile fpu registers around procedures that might use
  1849. them (e.g. FPCMOVE may use them)
  1850. Revision 1.168.4.2 2004/09/12 13:36:40 peter
  1851. * fixed alignment issues
  1852. Revision 1.168.4.1 2004/08/31 20:43:06 peter
  1853. * paraloc patch
  1854. Revision 1.168 2004/07/09 23:41:04 jonas
  1855. * support register parameters for inlined procedures + some inline
  1856. cleanups
  1857. Revision 1.167 2004/07/03 11:47:04 peter
  1858. * fix rangecheck error when assigning u32bit=s32bit
  1859. Revision 1.166 2004/06/20 08:55:28 florian
  1860. * logs truncated
  1861. Revision 1.165 2004/06/16 20:07:07 florian
  1862. * dwarf branch merged
  1863. Revision 1.164 2004/05/22 23:34:27 peter
  1864. tai_regalloc.allocation changed to ratype to notify rgobj of register size changes
  1865. Revision 1.163 2004/04/29 19:56:36 daniel
  1866. * Prepare compiler infrastructure for multiple ansistring types
  1867. Revision 1.162 2004/04/18 07:52:43 florian
  1868. * fixed web bug 3048: comparision of dyn. arrays
  1869. Revision 1.161.2.17 2004/06/13 10:51:16 florian
  1870. * fixed several register allocator problems (sparc/arm)
  1871. }