cpuinfo.pas 26 KB

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  1. {
  2. Copyright (c) 1998-2002 by the Free Pascal development team
  3. Basic Processor information for the ARM
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. Unit CPUInfo;
  11. Interface
  12. uses
  13. globtype;
  14. Type
  15. bestreal = double;
  16. ts32real = single;
  17. ts64real = double;
  18. ts80real = type extended;
  19. ts128real = type extended;
  20. ts64comp = comp;
  21. pbestreal=^bestreal;
  22. { possible supported processors for this target }
  23. tcputype =
  24. (cpu_none,
  25. cpu_armv3,
  26. cpu_armv4,
  27. cpu_armv4t,
  28. cpu_armv5,
  29. cpu_armv5t,
  30. cpu_armv6,
  31. cpu_armv7,
  32. cpu_armv7m
  33. );
  34. Const
  35. cpu_arm = [cpu_none,cpu_armv3,cpu_armv4,cpu_armv4t,cpu_armv5];
  36. cpu_thumb = [];
  37. cpu_thumb2 = [cpu_armv7m];
  38. Type
  39. tfputype =
  40. (fpu_none,
  41. fpu_soft,
  42. fpu_libgcc,
  43. fpu_fpa,
  44. fpu_fpa10,
  45. fpu_fpa11,
  46. fpu_vfpv2,
  47. fpu_vfpv3,
  48. fpu_vfpv3_d16
  49. );
  50. tcontrollertype =
  51. (ct_none,
  52. { Phillips }
  53. ct_lpc2114,
  54. ct_lpc2124,
  55. ct_lpc2194,
  56. ct_lpc1754,
  57. ct_lpc1756,
  58. ct_lpc1758,
  59. ct_lpc1764,
  60. ct_lpc1766,
  61. ct_lpc1768,
  62. { ATMEL }
  63. ct_at91sam7s256,
  64. ct_at91sam7se256,
  65. ct_at91sam7x256,
  66. ct_at91sam7xc256,
  67. { STMicroelectronics }
  68. ct_stm32f103rb,
  69. ct_stm32f103re,
  70. ct_stm32f103c4t,
  71. { TI - Fury Class - 64 K Flash, 16 K SRAM Devices }
  72. ct_lm3s1110,
  73. ct_lm3s1133,
  74. ct_lm3s1138,
  75. ct_lm3s1150,
  76. ct_lm3s1162,
  77. ct_lm3s1165,
  78. ct_lm3s1166,
  79. ct_lm3s2110,
  80. ct_lm3s2139,
  81. ct_lm3s6100,
  82. ct_lm3s6110,
  83. { TI - Fury Class - 128K Flash, 32K SRAM devices }
  84. ct_lm3s1601,
  85. ct_lm3s1608,
  86. ct_lm3s1620,
  87. ct_lm3s1635,
  88. ct_lm3s1636,
  89. ct_lm3s1637,
  90. ct_lm3s1651,
  91. ct_lm3s2601,
  92. ct_lm3s2608,
  93. ct_lm3s2620,
  94. ct_lm3s2637,
  95. ct_lm3s2651,
  96. ct_lm3s6610,
  97. ct_lm3s6611,
  98. ct_lm3s6618,
  99. ct_lm3s6633,
  100. ct_lm3s6637,
  101. ct_lm3s8630,
  102. { TI - Fury Class - 256K Flash, 64K SRAM devices }
  103. ct_lm3s1911,
  104. ct_lm3s1918,
  105. ct_lm3s1937,
  106. ct_lm3s1958,
  107. ct_lm3s1960,
  108. ct_lm3s1968,
  109. ct_lm3s1969,
  110. ct_lm3s2911,
  111. ct_lm3s2918,
  112. ct_lm3s2919,
  113. ct_lm3s2939,
  114. ct_lm3s2948,
  115. ct_lm3s2950,
  116. ct_lm3s2965,
  117. ct_lm3s6911,
  118. ct_lm3s6918,
  119. ct_lm3s6938,
  120. ct_lm3s6950,
  121. ct_lm3s6952,
  122. ct_lm3s6965,
  123. ct_lm3s8930,
  124. ct_lm3s8933,
  125. ct_lm3s8938,
  126. ct_lm3s8962,
  127. ct_lm3s8970,
  128. ct_lm3s8971,
  129. { TI - Tempest Tempest - 256 K Flash, 64 K SRAM }
  130. ct_lm3s5951,
  131. ct_lm3s5956,
  132. ct_lm3s1b21,
  133. ct_lm3s2b93,
  134. ct_lm3s5b91,
  135. ct_lm3s9b81,
  136. ct_lm3s9b90,
  137. ct_lm3s9b92,
  138. ct_lm3s9b95,
  139. ct_lm3s9b96,
  140. { SAMSUNG }
  141. ct_sc32442b,
  142. // generic Thumb2 target
  143. ct_thumb2bare
  144. );
  145. Const
  146. {# Size of native extended floating point type }
  147. extended_size = 12;
  148. {# Size of a multimedia register }
  149. mmreg_size = 16;
  150. { target cpu string (used by compiler options) }
  151. target_cpu_string = 'arm';
  152. { calling conventions supported by the code generator }
  153. supported_calling_conventions : tproccalloptions = [
  154. pocall_internproc,
  155. pocall_safecall,
  156. pocall_stdcall,
  157. { same as stdcall only different name mangling }
  158. pocall_cdecl,
  159. { same as stdcall only different name mangling }
  160. pocall_cppdecl,
  161. { same as stdcall but floating point numbers are handled like equal sized integers }
  162. pocall_softfloat,
  163. { same as stdcall (requires that all const records are passed by
  164. reference, but that's already done for stdcall) }
  165. pocall_mwpascal,
  166. { used for interrupt handling }
  167. pocall_interrupt
  168. ];
  169. cputypestr : array[tcputype] of string[8] = ('',
  170. 'ARMV3',
  171. 'ARMV4',
  172. 'ARMV4T',
  173. 'ARMV5',
  174. 'ARMV5T',
  175. 'ARMV6',
  176. 'ARMV7',
  177. 'ARMV7M'
  178. );
  179. fputypestr : array[tfputype] of string[9] = ('',
  180. 'SOFT',
  181. 'LIBGCC',
  182. 'FPA',
  183. 'FPA10',
  184. 'FPA11',
  185. 'VFPV2',
  186. 'VFPV3',
  187. 'VFPV3_D16'
  188. );
  189. { We know that there are fields after sramsize
  190. but we don't care about this warning }
  191. {$WARN 3177 OFF}
  192. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  193. ((
  194. controllertypestr:'';
  195. controllerunitstr:'';
  196. interruptvectors:0;
  197. flashbase:0;
  198. flashsize:0;
  199. srambase:0;
  200. sramsize:0
  201. ),
  202. (
  203. controllertypestr:'LPC2114';
  204. controllerunitstr:'LPC21x4';
  205. interruptvectors:8;
  206. flashbase:$00000000;
  207. flashsize:$00040000;
  208. srambase:$40000000;
  209. sramsize:$00004000
  210. ),
  211. (
  212. controllertypestr:'LPC2124';
  213. controllerunitstr:'LPC21x4';
  214. interruptvectors:8;
  215. flashbase:$00000000;
  216. flashsize:$00040000;
  217. srambase:$40000000;
  218. sramsize:$00004000
  219. ),
  220. (
  221. controllertypestr:'LPC2194';
  222. controllerunitstr:'LPC21x4';
  223. interruptvectors:8;
  224. flashbase:$00000000;
  225. flashsize:$00040000;
  226. srambase:$40000000;
  227. sramsize:$00004000
  228. ),
  229. (
  230. controllertypestr:'LPC1754';
  231. controllerunitstr:'LPC1754';
  232. interruptvectors:12;
  233. flashbase:$00000000;
  234. flashsize:$00020000;
  235. srambase:$10000000;
  236. sramsize:$00004000
  237. ),
  238. (
  239. controllertypestr:'LPC1756';
  240. controllerunitstr:'LPC1756';
  241. interruptvectors:12;
  242. flashbase:$00000000;
  243. flashsize:$00040000;
  244. srambase:$10000000;
  245. sramsize:$00004000
  246. ),
  247. (
  248. controllertypestr:'LPC1758';
  249. controllerunitstr:'LPC1758';
  250. interruptvectors:12;
  251. flashbase:$00000000;
  252. flashsize:$00080000;
  253. srambase:$10000000;
  254. sramsize:$00008000
  255. ),
  256. (
  257. controllertypestr:'LPC1764';
  258. controllerunitstr:'LPC1764';
  259. interruptvectors:12;
  260. flashbase:$00000000;
  261. flashsize:$00020000;
  262. srambase:$10000000;
  263. sramsize:$00004000
  264. ),
  265. (
  266. controllertypestr:'LPC1766';
  267. controllerunitstr:'LPC1766';
  268. interruptvectors:12;
  269. flashbase:$00000000;
  270. flashsize:$00040000;
  271. srambase:$10000000;
  272. sramsize:$00008000
  273. ),
  274. (
  275. controllertypestr:'LPC1768';
  276. controllerunitstr:'LPC1768';
  277. interruptvectors:12;
  278. flashbase:$00000000;
  279. flashsize:$00080000;
  280. srambase:$10000000;
  281. sramsize:$00008000
  282. ),
  283. (
  284. controllertypestr:'AT91SAM7S256';
  285. controllerunitstr:'AT91SAM7x256';
  286. interruptvectors:8;
  287. flashbase:$00000000;
  288. flashsize:$00040000;
  289. srambase:$00200000;
  290. sramsize:$00010000
  291. ),
  292. (
  293. controllertypestr:'AT91SAM7SE256';
  294. controllerunitstr:'AT91SAM7x256';
  295. interruptvectors:8;
  296. flashbase:$00000000;
  297. flashsize:$00040000;
  298. srambase:$00200000;
  299. sramsize:$00010000
  300. ),
  301. (
  302. controllertypestr:'AT91SAM7X256';
  303. controllerunitstr:'AT91SAM7x256';
  304. interruptvectors:8;
  305. flashbase:$00000000;
  306. flashsize:$00040000;
  307. srambase:$00200000;
  308. sramsize:$00010000
  309. ),
  310. (
  311. controllertypestr:'AT91SAM7XC256';
  312. controllerunitstr:'AT91SAM7x256';
  313. interruptvectors:8;
  314. flashbase:$00000000;
  315. flashsize:$00040000;
  316. srambase:$00200000;
  317. sramsize:$00010000
  318. ),
  319. // ct_stm32f103rb,
  320. (
  321. controllertypestr:'STM32F103RB';
  322. controllerunitstr:'STM32F103';
  323. interruptvectors:12;
  324. flashbase:$08000000;
  325. flashsize:$00020000;
  326. srambase:$20000000;
  327. sramsize:$00005000
  328. ),
  329. // ct_stm32f103re,
  330. (
  331. controllertypestr:'STM32F103RE';
  332. controllerunitstr:'STM32F103';
  333. interruptvectors:12;
  334. flashbase:$08000000;
  335. flashsize:$00080000;
  336. srambase:$20000000;
  337. sramsize:$00010000
  338. ),
  339. // ct_stm32f103re,
  340. (
  341. controllertypestr:'STM32F103C4T';
  342. controllerunitstr:'STM32F103';
  343. interruptvectors:12;
  344. flashbase:$08000000;
  345. flashsize:$00004000;
  346. srambase:$20000000;
  347. sramsize:$00001800
  348. ),
  349. { TI - 64 K Flash, 16 K SRAM Devices }
  350. // ct_lm3s1110,
  351. (
  352. controllertypestr:'LM3S1110';
  353. controllerunitstr:'LM3FURY';
  354. interruptvectors:72;
  355. flashbase:$00000000;
  356. flashsize:$00010000;
  357. srambase:$20000000;
  358. sramsize:$00004000
  359. ),
  360. // ct_lm3s1133,
  361. (
  362. controllertypestr:'LM3S1133';
  363. controllerunitstr:'LM3FURY';
  364. interruptvectors:72;
  365. flashbase:$00000000;
  366. flashsize:$00010000;
  367. srambase:$20000000;
  368. sramsize:$00004000
  369. ),
  370. // ct_lm3s1138,
  371. (
  372. controllertypestr:'LM3S1138';
  373. controllerunitstr:'LM3FURY';
  374. interruptvectors:72;
  375. flashbase:$00000000;
  376. flashsize:$00010000;
  377. srambase:$20000000;
  378. sramsize:$00004000
  379. ),
  380. // ct_lm3s1150,
  381. (
  382. controllertypestr:'LM3S1150';
  383. controllerunitstr:'LM3FURY';
  384. interruptvectors:72;
  385. flashbase:$00000000;
  386. flashsize:$00010000;
  387. srambase:$20000000;
  388. sramsize:$00004000
  389. ),
  390. // ct_lm3s1162,
  391. (
  392. controllertypestr:'LM3S1162';
  393. controllerunitstr:'LM3FURY';
  394. interruptvectors:72;
  395. flashbase:$00000000;
  396. flashsize:$00010000;
  397. srambase:$20000000;
  398. sramsize:$00004000
  399. ),
  400. // ct_lm3s1165,
  401. (
  402. controllertypestr:'LM3S1165';
  403. controllerunitstr:'LM3FURY';
  404. interruptvectors:72;
  405. flashbase:$00000000;
  406. flashsize:$00010000;
  407. srambase:$20000000;
  408. sramsize:$00004000
  409. ),
  410. // ct_lm3s1166,
  411. (
  412. controllertypestr:'LM3S1166';
  413. controllerunitstr:'LM3FURY';
  414. interruptvectors:72;
  415. flashbase:$00000000;
  416. flashsize:$00010000;
  417. srambase:$20000000;
  418. sramsize:$00004000
  419. ),
  420. // ct_lm3s2110,
  421. (
  422. controllertypestr:'LM3S2110';
  423. controllerunitstr:'LM3FURY';
  424. interruptvectors:72;
  425. flashbase:$00000000;
  426. flashsize:$00010000;
  427. srambase:$20000000;
  428. sramsize:$00004000
  429. ),
  430. // ct_lm3s2139,
  431. (
  432. controllertypestr:'LM3S2139';
  433. controllerunitstr:'LM3FURY';
  434. interruptvectors:72;
  435. flashbase:$00000000;
  436. flashsize:$00010000;
  437. srambase:$20000000;
  438. sramsize:$00004000
  439. ),
  440. // ct_lm3s6100,
  441. (
  442. controllertypestr:'LM3S6100';
  443. controllerunitstr:'LM3FURY';
  444. interruptvectors:72;
  445. flashbase:$00000000;
  446. flashsize:$00010000;
  447. srambase:$20000000;
  448. sramsize:$00004000
  449. ),
  450. // ct_lm3s6110,
  451. (
  452. controllertypestr:'LM3S6110';
  453. controllerunitstr:'LM3FURY';
  454. interruptvectors:72;
  455. flashbase:$00000000;
  456. flashsize:$00010000;
  457. srambase:$20000000;
  458. sramsize:$00004000
  459. ),
  460. { TI - 128K Flash, 32K SRAM devices }
  461. // ct_lm3s1601,
  462. (
  463. controllertypestr:'LM3S1601';
  464. controllerunitstr:'LM3FURY';
  465. interruptvectors:72;
  466. flashbase:$00000000;
  467. flashsize:$00020000;
  468. srambase:$20000000;
  469. sramsize:$00008000
  470. ),
  471. // ct_lm3s1608,
  472. (
  473. controllertypestr:'LM3S1608';
  474. controllerunitstr:'LM3FURY';
  475. interruptvectors:72;
  476. flashbase:$00000000;
  477. flashsize:$00020000;
  478. srambase:$20000000;
  479. sramsize:$00008000
  480. ),
  481. // ct_lm3s1620,
  482. (
  483. controllertypestr:'LM3S1620';
  484. controllerunitstr:'LM3FURY';
  485. interruptvectors:72;
  486. flashbase:$00000000;
  487. flashsize:$00020000;
  488. srambase:$20000000;
  489. sramsize:$00008000
  490. ),
  491. // ct_lm3s1635,
  492. (
  493. controllertypestr:'LM3S1635';
  494. controllerunitstr:'LM3FURY';
  495. interruptvectors:72;
  496. flashbase:$00000000;
  497. flashsize:$00020000;
  498. srambase:$20000000;
  499. sramsize:$00008000
  500. ),
  501. // ct_lm3s1636,
  502. (
  503. controllertypestr:'LM3S1636';
  504. controllerunitstr:'LM3FURY';
  505. interruptvectors:72;
  506. flashbase:$00000000;
  507. flashsize:$00020000;
  508. srambase:$20000000;
  509. sramsize:$00008000
  510. ),
  511. // ct_lm3s1637,
  512. (
  513. controllertypestr:'LM3S1637';
  514. controllerunitstr:'LM3FURY';
  515. interruptvectors:72;
  516. flashbase:$00000000;
  517. flashsize:$00020000;
  518. srambase:$20000000;
  519. sramsize:$00008000
  520. ),
  521. // ct_lm3s1651,
  522. (
  523. controllertypestr:'LM3S1651';
  524. controllerunitstr:'LM3FURY';
  525. interruptvectors:72;
  526. flashbase:$00000000;
  527. flashsize:$00020000;
  528. srambase:$20000000;
  529. sramsize:$00008000
  530. ),
  531. // ct_lm3s2601,
  532. (
  533. controllertypestr:'LM3S2601';
  534. controllerunitstr:'LM3FURY';
  535. interruptvectors:72;
  536. flashbase:$00000000;
  537. flashsize:$00020000;
  538. srambase:$20000000;
  539. sramsize:$00008000
  540. ),
  541. // ct_lm3s2608,
  542. (
  543. controllertypestr:'LM3S2608';
  544. controllerunitstr:'LM3FURY';
  545. interruptvectors:72;
  546. flashbase:$00000000;
  547. flashsize:$00020000;
  548. srambase:$20000000;
  549. sramsize:$00008000
  550. ),
  551. // ct_lm3s2620,
  552. (
  553. controllertypestr:'LM3S2620';
  554. controllerunitstr:'LM3FURY';
  555. interruptvectors:72;
  556. flashbase:$00000000;
  557. flashsize:$00020000;
  558. srambase:$20000000;
  559. sramsize:$00008000
  560. ),
  561. // ct_lm3s2637,
  562. (
  563. controllertypestr:'LM3S2637';
  564. controllerunitstr:'LM3FURY';
  565. interruptvectors:72;
  566. flashbase:$00000000;
  567. flashsize:$00020000;
  568. srambase:$20000000;
  569. sramsize:$00008000
  570. ),
  571. // ct_lm3s2651,
  572. (
  573. controllertypestr:'LM3S2651';
  574. controllerunitstr:'LM3FURY';
  575. interruptvectors:72;
  576. flashbase:$00000000;
  577. flashsize:$00020000;
  578. srambase:$20000000;
  579. sramsize:$00008000
  580. ),
  581. // ct_lm3s6610,
  582. (
  583. controllertypestr:'LM3S6610';
  584. controllerunitstr:'LM3FURY';
  585. interruptvectors:72;
  586. flashbase:$00000000;
  587. flashsize:$00020000;
  588. srambase:$20000000;
  589. sramsize:$00008000
  590. ),
  591. // ct_lm3s6611,
  592. (
  593. controllertypestr:'LM3S6611';
  594. controllerunitstr:'LM3FURY';
  595. interruptvectors:72;
  596. flashbase:$00000000;
  597. flashsize:$00020000;
  598. srambase:$20000000;
  599. sramsize:$00008000
  600. ),
  601. // ct_lm3s6618,
  602. (
  603. controllertypestr:'LM3S6618';
  604. controllerunitstr:'LM3FURY';
  605. interruptvectors:72;
  606. flashbase:$00000000;
  607. flashsize:$00020000;
  608. srambase:$20000000;
  609. sramsize:$00008000
  610. ),
  611. // ct_lm3s6633,
  612. (
  613. controllertypestr:'LM3S6633';
  614. controllerunitstr:'LM3FURY';
  615. interruptvectors:72;
  616. flashbase:$00000000;
  617. flashsize:$00020000;
  618. srambase:$20000000;
  619. sramsize:$00008000
  620. ),
  621. // ct_lm3s6637,
  622. (
  623. controllertypestr:'LM3S6637';
  624. controllerunitstr:'LM3FURY';
  625. interruptvectors:72;
  626. flashbase:$00000000;
  627. flashsize:$00020000;
  628. srambase:$20000000;
  629. sramsize:$00008000
  630. ),
  631. // ct_lm3s8630,
  632. (
  633. controllertypestr:'LM3S8630';
  634. controllerunitstr:'LM3FURY';
  635. interruptvectors:72;
  636. flashbase:$00000000;
  637. flashsize:$00020000;
  638. srambase:$20000000;
  639. sramsize:$00008000
  640. ),
  641. { TI - 256K Flash, 64K SRAM devices }
  642. // ct_lm3s1911,
  643. (
  644. controllertypestr:'LM3S1911';
  645. controllerunitstr:'LM3FURY';
  646. interruptvectors:72;
  647. flashbase:$00000000;
  648. flashsize:$00040000;
  649. srambase:$20000000;
  650. sramsize:$00010000
  651. ),
  652. // ct_lm3s1918,
  653. (
  654. controllertypestr:'LM3S1918';
  655. controllerunitstr:'LM3FURY';
  656. interruptvectors:72;
  657. flashbase:$00000000;
  658. flashsize:$00040000;
  659. srambase:$20000000;
  660. sramsize:$00010000
  661. ),
  662. // ct_lm3s1937,
  663. (
  664. controllertypestr:'LM3S1937';
  665. controllerunitstr:'LM3FURY';
  666. interruptvectors:72;
  667. flashbase:$00000000;
  668. flashsize:$00040000;
  669. srambase:$20000000;
  670. sramsize:$00010000
  671. ),
  672. // ct_lm3s1958,
  673. (
  674. controllertypestr:'LM3S1958';
  675. controllerunitstr:'LM3FURY';
  676. interruptvectors:72;
  677. flashbase:$00000000;
  678. flashsize:$00040000;
  679. srambase:$20000000;
  680. sramsize:$00010000
  681. ),
  682. // ct_lm3s1960,
  683. (
  684. controllertypestr:'LM3S1960';
  685. controllerunitstr:'LM3FURY';
  686. interruptvectors:72;
  687. flashbase:$00000000;
  688. flashsize:$00040000;
  689. srambase:$20000000;
  690. sramsize:$00010000
  691. ),
  692. // ct_lm3s1968,
  693. (
  694. controllertypestr:'LM3S1968';
  695. controllerunitstr:'LM3FURY';
  696. interruptvectors:72;
  697. flashbase:$00000000;
  698. flashsize:$00040000;
  699. srambase:$20000000;
  700. sramsize:$00010000
  701. ),
  702. // ct_lm3s1969,
  703. (
  704. controllertypestr:'LM3S1969';
  705. controllerunitstr:'LM3FURY';
  706. interruptvectors:72;
  707. flashbase:$00000000;
  708. flashsize:$00040000;
  709. srambase:$20000000;
  710. sramsize:$00010000
  711. ),
  712. // ct_lm3s2911,
  713. (
  714. controllertypestr:'LM3S2911';
  715. controllerunitstr:'LM3FURY';
  716. interruptvectors:72;
  717. flashbase:$00000000;
  718. flashsize:$00040000;
  719. srambase:$20000000;
  720. sramsize:$00010000
  721. ),
  722. // ct_lm3s2918,
  723. (
  724. controllertypestr:'LM3S2918';
  725. controllerunitstr:'LM3FURY';
  726. interruptvectors:72;
  727. flashbase:$00000000;
  728. flashsize:$00040000;
  729. srambase:$20000000;
  730. sramsize:$00010000
  731. ),
  732. // ct_lm3s2919,
  733. (
  734. controllertypestr:'LM3S2919';
  735. controllerunitstr:'LM3FURY';
  736. interruptvectors:72;
  737. flashbase:$00000000;
  738. flashsize:$00040000;
  739. srambase:$20000000;
  740. sramsize:$00010000
  741. ),
  742. // ct_lm3s2939,
  743. (
  744. controllertypestr:'LM3S2939';
  745. controllerunitstr:'LM3FURY';
  746. interruptvectors:72;
  747. flashbase:$00000000;
  748. flashsize:$00040000;
  749. srambase:$20000000;
  750. sramsize:$00010000
  751. ),
  752. // ct_lm3s2948,
  753. (
  754. controllertypestr:'LM3S2948';
  755. controllerunitstr:'LM3FURY';
  756. interruptvectors:72;
  757. flashbase:$00000000;
  758. flashsize:$00040000;
  759. srambase:$20000000;
  760. sramsize:$00010000
  761. ),
  762. // ct_lm3s2950,
  763. (
  764. controllertypestr:'LM3S2950';
  765. controllerunitstr:'LM3FURY';
  766. interruptvectors:72;
  767. flashbase:$00000000;
  768. flashsize:$00040000;
  769. srambase:$20000000;
  770. sramsize:$00010000
  771. ),
  772. // ct_lm3s2965,
  773. (
  774. controllertypestr:'LM3S2965';
  775. controllerunitstr:'LM3FURY';
  776. interruptvectors:72;
  777. flashbase:$00000000;
  778. flashsize:$00040000;
  779. srambase:$20000000;
  780. sramsize:$00010000
  781. ),
  782. // ct_lm3s6911,
  783. (
  784. controllertypestr:'LM3S6911';
  785. controllerunitstr:'LM3FURY';
  786. interruptvectors:72;
  787. flashbase:$00000000;
  788. flashsize:$00040000;
  789. srambase:$20000000;
  790. sramsize:$00010000
  791. ),
  792. // ct_lm3s6918,
  793. (
  794. controllertypestr:'LM3S6918';
  795. controllerunitstr:'LM3FURY';
  796. interruptvectors:72;
  797. flashbase:$00000000;
  798. flashsize:$00040000;
  799. srambase:$20000000;
  800. sramsize:$00010000
  801. ),
  802. // ct_lm3s6938,
  803. (
  804. controllertypestr:'LM3S6938';
  805. controllerunitstr:'LM3FURY';
  806. interruptvectors:72;
  807. flashbase:$00000000;
  808. flashsize:$00040000;
  809. srambase:$20000000;
  810. sramsize:$00010000
  811. ),
  812. // ct_lm3s6950,
  813. (
  814. controllertypestr:'LM3S6950';
  815. controllerunitstr:'LM3FURY';
  816. interruptvectors:72;
  817. flashbase:$00000000;
  818. flashsize:$00040000;
  819. srambase:$20000000;
  820. sramsize:$00010000
  821. ),
  822. // ct_lm3s6952,
  823. (
  824. controllertypestr:'LM3S6952';
  825. controllerunitstr:'LM3FURY';
  826. interruptvectors:72;
  827. flashbase:$00000000;
  828. flashsize:$00040000;
  829. srambase:$20000000;
  830. sramsize:$00010000
  831. ),
  832. // ct_lm3s6965,
  833. (
  834. controllertypestr:'LM3S6965';
  835. controllerunitstr:'LM3FURY';
  836. interruptvectors:72;
  837. flashbase:$00000000;
  838. flashsize:$00040000;
  839. srambase:$20000000;
  840. sramsize:$00010000
  841. ),
  842. // ct_lm3s8930,
  843. (
  844. controllertypestr:'LM3S8930';
  845. controllerunitstr:'LM3FURY';
  846. interruptvectors:72;
  847. flashbase:$00000000;
  848. flashsize:$00040000;
  849. srambase:$20000000;
  850. sramsize:$00010000
  851. ),
  852. // ct_lm3s8933,
  853. (
  854. controllertypestr:'LM3S8933';
  855. controllerunitstr:'LM3FURY';
  856. interruptvectors:72;
  857. flashbase:$00000000;
  858. flashsize:$00040000;
  859. srambase:$20000000;
  860. sramsize:$00010000
  861. ),
  862. // ct_lm3s8938,
  863. (
  864. controllertypestr:'LM3S8938';
  865. controllerunitstr:'LM3FURY';
  866. interruptvectors:72;
  867. flashbase:$00000000;
  868. flashsize:$00040000;
  869. srambase:$20000000;
  870. sramsize:$00010000
  871. ),
  872. // ct_lm3s8962,
  873. (
  874. controllertypestr:'LM3S8962';
  875. controllerunitstr:'LM3FURY';
  876. interruptvectors:72;
  877. flashbase:$00000000;
  878. flashsize:$00040000;
  879. srambase:$20000000;
  880. sramsize:$00010000
  881. ),
  882. // ct_lm3s8970,
  883. (
  884. controllertypestr:'LM3S8970';
  885. controllerunitstr:'LM3FURY';
  886. interruptvectors:72;
  887. flashbase:$00000000;
  888. flashsize:$00040000;
  889. srambase:$20000000;
  890. sramsize:$00010000
  891. ),
  892. // ct_lm3s8971,
  893. (
  894. controllertypestr:'LM3S8971';
  895. controllerunitstr:'LM3FURY';
  896. interruptvectors:72;
  897. flashbase:$00000000;
  898. flashsize:$00040000;
  899. srambase:$20000000;
  900. sramsize:$00010000
  901. ),
  902. { TI - Tempest parts - 256 K Flash, 64 K SRAM }
  903. // ct_lm3s5951,
  904. (
  905. controllertypestr:'LM3S5951';
  906. controllerunitstr:'LM3TEMPEST';
  907. interruptvectors:72;
  908. flashbase:$00000000;
  909. flashsize:$00040000;
  910. srambase:$20000000;
  911. sramsize:$00010000
  912. ),
  913. // ct_lm3s5956,
  914. (
  915. controllertypestr:'LM3S5956';
  916. controllerunitstr:'LM3TEMPEST';
  917. interruptvectors:72;
  918. flashbase:$00000000;
  919. flashsize:$00040000;
  920. srambase:$20000000;
  921. sramsize:$00010000
  922. ),
  923. // ct_lm3s1b21,
  924. (
  925. controllertypestr:'LM3S1B21';
  926. controllerunitstr:'LM3TEMPEST';
  927. interruptvectors:72;
  928. flashbase:$00000000;
  929. flashsize:$00040000;
  930. srambase:$20000000;
  931. sramsize:$00010000
  932. ),
  933. // ct_lm3s2b93,
  934. (
  935. controllertypestr:'LM3S2B93';
  936. controllerunitstr:'LM3TEMPEST';
  937. interruptvectors:72;
  938. flashbase:$00000000;
  939. flashsize:$00040000;
  940. srambase:$20000000;
  941. sramsize:$00010000
  942. ),
  943. // ct_lm3s5b91,
  944. (
  945. controllertypestr:'LM3S5B91';
  946. controllerunitstr:'LM3TEMPEST';
  947. interruptvectors:72;
  948. flashbase:$00000000;
  949. flashsize:$00040000;
  950. srambase:$20000000;
  951. sramsize:$00010000
  952. ),
  953. // ct_lm3s9b81,
  954. (
  955. controllertypestr:'LM3S9B81';
  956. controllerunitstr:'LM3TEMPEST';
  957. interruptvectors:72;
  958. flashbase:$00000000;
  959. flashsize:$00040000;
  960. srambase:$20000000;
  961. sramsize:$00010000
  962. ),
  963. // ct_lm3s9b90,
  964. (
  965. controllertypestr:'LM3S9B90';
  966. controllerunitstr:'LM3TEMPEST';
  967. interruptvectors:72;
  968. flashbase:$00000000;
  969. flashsize:$00040000;
  970. srambase:$20000000;
  971. sramsize:$00010000
  972. ),
  973. // ct_lm3s9b92,
  974. (
  975. controllertypestr:'LM3S9B92';
  976. controllerunitstr:'LM3TEMPEST';
  977. interruptvectors:72;
  978. flashbase:$00000000;
  979. flashsize:$00040000;
  980. srambase:$20000000;
  981. sramsize:$00010000
  982. ),
  983. // ct_lm3s9b95,
  984. (
  985. controllertypestr:'LM3S9B95';
  986. controllerunitstr:'LM3TEMPEST';
  987. interruptvectors:72;
  988. flashbase:$00000000;
  989. flashsize:$00040000;
  990. srambase:$20000000;
  991. sramsize:$00010000
  992. ),
  993. // ct_lm3s9b96,
  994. (
  995. controllertypestr:'LM3S9B96';
  996. controllerunitstr:'LM3TEMPEST';
  997. interruptvectors:72;
  998. flashbase:$00000000;
  999. flashsize:$00040000;
  1000. srambase:$20000000;
  1001. sramsize:$00010000
  1002. ),
  1003. //ct_SC32442b,
  1004. (
  1005. controllertypestr:'SC32442B';
  1006. controllerunitstr:'sc32442b';
  1007. interruptvectors:7;
  1008. flashbase:$00000000;
  1009. flashsize:$00000000;
  1010. srambase:$00000000;
  1011. sramsize:$08000000
  1012. ),
  1013. // bare bones Thumb2
  1014. (
  1015. controllertypestr:'THUMB2_BARE';
  1016. controllerunitstr:'THUMB2_BARE';
  1017. interruptvectors:128;
  1018. flashbase:$00000000;
  1019. flashsize:$00100000;
  1020. srambase:$20000000;
  1021. sramsize:$00100000
  1022. )
  1023. );
  1024. vfp_scalar = [fpu_vfpv2,fpu_vfpv3,fpu_vfpv3_d16];
  1025. { Supported optimizations, only used for information }
  1026. supported_optimizerswitches = genericlevel1optimizerswitches+
  1027. genericlevel2optimizerswitches+
  1028. genericlevel3optimizerswitches-
  1029. { no need to write info about those }
  1030. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  1031. [cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,
  1032. cs_opt_stackframe,cs_opt_nodecse,cs_opt_reorder_fields];
  1033. level1optimizerswitches = genericlevel1optimizerswitches;
  1034. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  1035. [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion,cs_opt_nodecse {,cs_opt_scheduler}];
  1036. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
  1037. Implementation
  1038. end.