cpugas.pas 13 KB

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  1. {
  2. Copyright (c) 1999-2009 by Florian Klaempfl and David Zhang
  3. This unit implements an asmoutput class for MIPS assembly syntax
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit cpugas;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. cpubase, aasmbase, globtype,
  22. aasmtai, aasmcpu, assemble, aggas;
  23. type
  24. TMIPSGNUAssembler = class(TGNUassembler)
  25. nomacro, noreorder, noat : boolean;
  26. constructor create(smart: boolean); override;
  27. {# Constructs the command line for calling the assembler }
  28. function MakeCmdLine: TCmdStr; override;
  29. end;
  30. TMIPSInstrWriter = class(TCPUInstrWriter)
  31. procedure WriteInstruction(hp : tai);override;
  32. end;
  33. const
  34. use_std_regnames : boolean =
  35. {$ifndef USE_MIPS_GAS_REGS}
  36. true;
  37. {$else}
  38. false;
  39. {$endif}
  40. implementation
  41. uses
  42. cutils, systems, cpuinfo,
  43. globals, verbose, itcpugas, cgbase, cgutils;
  44. function gas_std_regname(r:Tregister):string;
  45. var
  46. hr: tregister;
  47. begin
  48. { Double uses the same table as single }
  49. hr := r;
  50. case getsubreg(hr) of
  51. R_SUBFD:
  52. setsubreg(hr, R_SUBFS);
  53. R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
  54. setsubreg(hr, R_SUBD);
  55. end;
  56. if getregtype(r)=R_SPECIALREGISTER then
  57. result:=tostr(getsupreg(r))
  58. else
  59. result:=std_regname(hr);
  60. end;
  61. function asm_regname(reg : TRegister) : string;
  62. begin
  63. if use_std_regnames then
  64. asm_regname:='$'+gas_std_regname(reg)
  65. else
  66. asm_regname:=gas_regname(reg);
  67. end;
  68. {****************************************************************************}
  69. { GNU MIPS Assembler writer }
  70. {****************************************************************************}
  71. constructor TMIPSGNUAssembler.create(smart: boolean);
  72. begin
  73. inherited create(smart);
  74. InstrWriter := TMIPSInstrWriter.create(self);
  75. nomacro:=false;
  76. noreorder:=false;
  77. noat:=false;
  78. end;
  79. function TMIPSGNUAssembler.MakeCmdLine: TCmdStr;
  80. begin
  81. result := Inherited MakeCmdLine;
  82. { ABI selection }
  83. Replace(result,'$ABI','-mabi='+abitypestr[mips_abi]);
  84. { ARCH selection }
  85. Replace(result,'$ARCH','-march='+lower(cputypestr[current_settings.cputype]));
  86. end;
  87. {****************************************************************************}
  88. { Helper routines for Instruction Writer }
  89. {****************************************************************************}
  90. function GetReferenceString(var ref: TReference): string;
  91. var
  92. reg: TRegister;
  93. regstr: string;
  94. begin
  95. result:='';
  96. if assigned(ref.symbol) then
  97. result:=ref.symbol.name;
  98. if (ref.offset<0) then
  99. result:=result+tostr(ref.offset)
  100. else if (ref.offset>0) then
  101. begin
  102. if assigned(ref.symbol) then
  103. result:=result+'+';
  104. result:=result+tostr(ref.offset);
  105. end
  106. { asmreader appears to treat literal numbers as references }
  107. else if (ref.symbol=nil) and (ref.base=NR_NO) and (ref.index=NR_NO) then
  108. result:='0';
  109. { either base or index may be present, but not both }
  110. reg:=ref.base;
  111. if (reg=NR_NO) then
  112. reg:=ref.index
  113. else if (ref.index<>NR_NO) then
  114. InternalError(2013013001);
  115. if (reg=NR_NO) then
  116. regstr:=''
  117. else
  118. regstr:='('+asm_regname(reg)+')';
  119. case ref.refaddr of
  120. addr_no,
  121. addr_full:
  122. if assigned(ref.symbol) and (reg<>NR_NO) then
  123. InternalError(2013013002)
  124. else
  125. begin
  126. result:=result+regstr;
  127. exit;
  128. end;
  129. addr_pic:
  130. result:='%got('+result;
  131. addr_high:
  132. result:='%hi('+result;
  133. addr_low:
  134. result:='%lo('+result;
  135. addr_pic_call16:
  136. result:='%call16('+result;
  137. addr_low_pic:
  138. result:='%got_lo('+result;
  139. addr_high_pic:
  140. result:='%got_hi('+result;
  141. addr_low_call:
  142. result:='%call_lo('+result;
  143. addr_high_call:
  144. result:='%call_hi('+result;
  145. else
  146. InternalError(2013013003);
  147. end;
  148. result:=result+')'+regstr;
  149. end;
  150. function getopstr(const Oper: TOper): string;
  151. begin
  152. with Oper do
  153. case typ of
  154. top_reg:
  155. getopstr := asm_regname(reg);
  156. top_const:
  157. getopstr := tostr(longint(val));
  158. top_ref:
  159. getopstr := getreferencestring(ref^);
  160. else
  161. internalerror(10001);
  162. end;
  163. end;
  164. function getopstr_4(const Oper: TOper): string;
  165. var
  166. tmpref: treference;
  167. begin
  168. with Oper do
  169. case typ of
  170. top_ref:
  171. begin
  172. tmpref := ref^;
  173. Inc(tmpref.offset, 4);
  174. getopstr_4 := getreferencestring(tmpref);
  175. end;
  176. else
  177. internalerror(2007050403);
  178. end;
  179. end;
  180. {
  181. function getnextfpreg(tmpfpu : shortstring) : shortstring;
  182. begin
  183. case length(tmpfpu) of
  184. 3:
  185. if (tmpfpu[3] = '9') then
  186. tmpfpu:='$f10'
  187. else
  188. tmpfpu[3] := succ(tmpfpu[3]);
  189. 4:
  190. if (tmpfpu[4] = '9') then
  191. tmpfpu:='$f20'
  192. else
  193. tmpfpu[4] := succ(tmpfpu[4]);
  194. else
  195. internalerror(20120531);
  196. end;
  197. getnextfpreg := tmpfpu;
  198. end;
  199. }
  200. function is_macro_instruction(ai : taicpu) : boolean;
  201. var
  202. op: tasmop;
  203. begin
  204. op:=ai.opcode;
  205. is_macro_instruction :=
  206. { 'seq', 'sge', 'sgeu', 'sgt', 'sgtu', 'sle', 'sleu', 'sne', }
  207. (op=A_SEQ) or (op = A_SGE) or (op=A_SGEU) or (op=A_SGT) or
  208. (op=A_SGTU) or (op=A_SLE) or (op=A_SLEU) or (op=A_SNE)
  209. { JAL is not here! See comments in TCGMIPS.a_call_name. }
  210. or (op=A_LA) or ((op=A_BC) and
  211. not (ai.condition in [C_EQ,C_NE,C_GTZ,C_GEZ,C_LTZ,C_LEZ,C_COP1TRUE,C_COP1FALSE])) {or (op=A_JAL)}
  212. or (op=A_REM) or (op=A_REMU)
  213. or (op=A_DIV) or (op=A_DIVU)
  214. or (op=A_MULO) or (op=A_MULOU)
  215. { A_LI is only a macro if the immediate is not in thez 16-bit range }
  216. or (op=A_LI);
  217. end;
  218. procedure TMIPSInstrWriter.WriteInstruction(hp: Tai);
  219. var
  220. Op: TAsmOp;
  221. s,s1: string;
  222. i: integer;
  223. tmpfpu: string;
  224. tmpfpu_len: longint;
  225. r: TRegister;
  226. begin
  227. if hp.typ <> ait_instruction then
  228. exit;
  229. op := taicpu(hp).opcode;
  230. case op of
  231. A_P_SET_NOMIPS16:
  232. begin
  233. owner.AsmWriteLn(#9'.set'#9'nomips16');
  234. end;
  235. A_P_MASK,
  236. A_P_FMASK:
  237. begin
  238. s := #9 + gas_op2str[op] + #9'0x' + hexstr(taicpu(hp).oper[0]^.val,8)+ ',' + getopstr(taicpu(hp).oper[1]^) ;
  239. owner.AsmWriteLn(s);
  240. end;
  241. A_P_SET_MACRO:
  242. begin
  243. owner.AsmWriteLn(#9'.set'#9'macro');
  244. TMIPSGNUAssembler(owner).nomacro:=false;
  245. end;
  246. A_P_SET_REORDER:
  247. begin
  248. owner.AsmWriteLn(#9'.set'#9'reorder');
  249. TMIPSGNUAssembler(owner).noreorder:=false;
  250. end;
  251. A_P_SET_NOMACRO:
  252. begin
  253. owner.AsmWriteLn(#9'.set'#9'nomacro');
  254. TMIPSGNUAssembler(owner).nomacro:=true;
  255. end;
  256. A_P_SET_NOREORDER:
  257. begin
  258. owner.AsmWriteLn(#9'.set'#9'noreorder');
  259. TMIPSGNUAssembler(owner).noreorder:=true;
  260. end;
  261. A_P_SET_NOAT:
  262. begin
  263. owner.AsmWriteln(#9'.set'#9'noat');
  264. TMIPSGNUAssembler(owner).noat:=true;
  265. end;
  266. A_P_SET_AT:
  267. begin
  268. owner.AsmWriteln(#9'.set'#9'at');
  269. TMIPSGNUAssembler(owner).noat:=false;
  270. end;
  271. A_LDC1:
  272. begin
  273. if (target_info.endian = endian_big) then
  274. begin
  275. s := #9 + gas_op2str[A_LDC1] + #9 + getopstr(taicpu(hp).oper[0]^)
  276. + ',' + getopstr(taicpu(hp).oper[1]^);
  277. end
  278. else
  279. begin
  280. tmpfpu := getopstr(taicpu(hp).oper[0]^);
  281. s := #9 + gas_op2str[A_LWC1] + #9 + tmpfpu + ',' + getopstr(taicpu(hp).oper[1]^); // + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
  282. owner.AsmWriteLn(s);
  283. { bug if $f9/$f19
  284. tmpfpu_len := length(tmpfpu);
  285. tmpfpu[tmpfpu_len] := succ(tmpfpu[tmpfpu_len]);
  286. }
  287. r := taicpu(hp).oper[0]^.reg;
  288. setsupreg(r, getsupreg(r) + 1);
  289. tmpfpu := asm_regname(r);
  290. s := #9 + gas_op2str[A_LWC1] + #9 + tmpfpu + ',' + getopstr_4(taicpu(hp).oper[1]^); // + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
  291. end;
  292. owner.AsmWriteLn(s);
  293. end;
  294. A_SDC1:
  295. begin
  296. if (target_info.endian = endian_big) then
  297. begin
  298. s := #9 + gas_op2str[A_SDC1] + #9 + getopstr(taicpu(hp).oper[0]^)
  299. + ',' + getopstr(taicpu(hp).oper[1]^);
  300. end
  301. else
  302. begin
  303. tmpfpu := getopstr(taicpu(hp).oper[0]^);
  304. s := #9 + gas_op2str[A_SWC1] + #9 + tmpfpu + ',' + getopstr(taicpu(hp).oper[1]^); //+ ',' + getopstr(taicpu(hp).oper[2]^) + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
  305. owner.AsmWriteLn(s);
  306. {
  307. tmpfpu_len := length(tmpfpu);
  308. tmpfpu[tmpfpu_len] := succ(tmpfpu[tmpfpu_len]);
  309. }
  310. r := taicpu(hp).oper[0]^.reg;
  311. setsupreg(r, getsupreg(r) + 1);
  312. tmpfpu := asm_regname(r);
  313. s := #9 + gas_op2str[A_SWC1] + #9 + tmpfpu + ',' + getopstr_4(taicpu(hp).oper[1]^); //+ ',' + getopstr(taicpu(hp).oper[2]^) + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
  314. end;
  315. owner.AsmWriteLn(s);
  316. end;
  317. else
  318. begin
  319. if is_macro_instruction(taicpu(hp)) and TMIPSGNUAssembler(owner).nomacro then
  320. owner.AsmWriteln(#9'.set'#9'macro');
  321. s := #9 + gas_op2str[op] + cond2str[taicpu(hp).condition];
  322. if taicpu(hp).delayslot_annulled then
  323. s := s + ',a';
  324. if taicpu(hp).ops > 0 then
  325. begin
  326. s := s + #9 + getopstr(taicpu(hp).oper[0]^);
  327. for i := 1 to taicpu(hp).ops - 1 do
  328. s := s + ',' + getopstr(taicpu(hp).oper[i]^);
  329. end;
  330. owner.AsmWriteLn(s);
  331. if is_macro_instruction(taicpu(hp)) and TMIPSGNUAssembler(owner).nomacro then
  332. owner.AsmWriteln(#9'.set'#9'nomacro');
  333. end;
  334. end;
  335. end;
  336. const
  337. as_MIPSEL_as_info: tasminfo =
  338. (
  339. id: as_gas;
  340. idtxt: 'AS';
  341. asmbin: 'as';
  342. asmcmd: '$ABI $ARCH $NOWARN -EL $PIC -o $OBJ $ASM';
  343. supported_targets: [system_mipsel_linux];
  344. flags: [ af_needar, af_smartlink_sections];
  345. labelprefix: '.L';
  346. comment: '# ';
  347. dollarsign: '$';
  348. );
  349. as_MIPSEB_as_info: tasminfo =
  350. (
  351. id: as_gas;
  352. idtxt: 'AS';
  353. asmbin: 'as';
  354. asmcmd: '$ABI $ARCH $NOWARN -EB $PIC -o $OBJ $ASM';
  355. supported_targets: [system_mipseb_linux];
  356. flags: [ af_needar, af_smartlink_sections];
  357. labelprefix: '.L';
  358. comment: '# ';
  359. dollarsign: '$';
  360. );
  361. begin
  362. {$ifdef MIPSEL}
  363. RegisterAssembler(as_MIPSEL_as_info, TMIPSGNUAssembler);
  364. {$else MIPSEL}
  365. RegisterAssembler(as_MIPSEB_as_info, TMIPSGNUAssembler);
  366. {$endif MIPSEL}
  367. end.