cpugas.pas 13 KB

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  1. {
  2. Copyright (c) 1999-2009 by Florian Klaempfl and David Zhang
  3. This unit implements an asmoutput class for MIPS assembly syntax
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit cpugas;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. cpubase, aasmbase, globtype,
  22. aasmtai, aasmcpu, assemble, aggas;
  23. type
  24. TMIPSGNUAssembler = class(TGNUassembler)
  25. nomacro, noreorder, noat : boolean;
  26. constructor create(smart: boolean); override;
  27. {# Constructs the command line for calling the assembler }
  28. function MakeCmdLine: TCmdStr; override;
  29. end;
  30. TMIPSInstrWriter = class(TCPUInstrWriter)
  31. procedure WriteInstruction(hp : tai);override;
  32. end;
  33. const
  34. use_std_regnames : boolean =
  35. {$ifndef USE_MIPS_GAS_REGS}
  36. true;
  37. {$else}
  38. false;
  39. {$endif}
  40. implementation
  41. uses
  42. cutils, systems, cpuinfo,
  43. verbose, itcpugas, cgbase, cgutils;
  44. function gas_std_regname(r:Tregister):string;
  45. var
  46. hr: tregister;
  47. begin
  48. { Double uses the same table as single }
  49. hr := r;
  50. case getsubreg(hr) of
  51. R_SUBFD:
  52. setsubreg(hr, R_SUBFS);
  53. R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
  54. setsubreg(hr, R_SUBD);
  55. end;
  56. result:=std_regname(hr);
  57. end;
  58. function asm_regname(reg : TRegister) : string;
  59. begin
  60. if use_std_regnames then
  61. asm_regname:='$'+gas_std_regname(reg)
  62. else
  63. asm_regname:=gas_regname(reg);
  64. end;
  65. {****************************************************************************}
  66. { GNU MIPS Assembler writer }
  67. {****************************************************************************}
  68. constructor TMIPSGNUAssembler.create(smart: boolean);
  69. begin
  70. inherited create(smart);
  71. InstrWriter := TMIPSInstrWriter.create(self);
  72. nomacro:=false;
  73. noreorder:=false;
  74. noat:=false;
  75. end;
  76. function TMIPSGNUAssembler.MakeCmdLine: TCmdStr;
  77. begin
  78. result := Inherited MakeCmdLine;
  79. { ABI selection }
  80. Replace(result,'$ABI','-mabi='+abitypestr[mips_abi]);
  81. { ARCH selection }
  82. Replace(result,'$ARCH','-march='+lower(cputypestr[mips_cpu]));
  83. end;
  84. {****************************************************************************}
  85. { Helper routines for Instruction Writer }
  86. {****************************************************************************}
  87. function GetReferenceString(var ref: TReference): string;
  88. var
  89. reg: TRegister;
  90. regstr: string;
  91. begin
  92. result:='';
  93. if assigned(ref.symbol) then
  94. result:=ref.symbol.name;
  95. if (ref.offset<0) then
  96. result:=result+tostr(ref.offset)
  97. else if (ref.offset>0) then
  98. begin
  99. if assigned(ref.symbol) then
  100. result:=result+'+';
  101. result:=result+tostr(ref.offset);
  102. end
  103. { asmreader appears to treat literal numbers as references }
  104. else if (ref.symbol=nil) and (ref.base=NR_NO) and (ref.index=NR_NO) then
  105. result:='0';
  106. { either base or index may be present, but not both }
  107. reg:=ref.base;
  108. if (reg=NR_NO) then
  109. reg:=ref.index
  110. else if (ref.index<>NR_NO) then
  111. InternalError(2013013001);
  112. if (reg=NR_NO) then
  113. regstr:=''
  114. else
  115. regstr:='('+asm_regname(reg)+')';
  116. case ref.refaddr of
  117. addr_no,
  118. addr_full:
  119. if assigned(ref.symbol) and (reg<>NR_NO) then
  120. InternalError(2013013002)
  121. else
  122. begin
  123. result:=result+regstr;
  124. exit;
  125. end;
  126. addr_pic:
  127. result:='%got('+result;
  128. addr_high:
  129. result:='%hi('+result;
  130. addr_low:
  131. result:='%lo('+result;
  132. addr_pic_call16:
  133. result:='%call16('+result;
  134. addr_low_pic:
  135. result:='%got_lo('+result;
  136. addr_high_pic:
  137. result:='%got_hi('+result;
  138. addr_low_call:
  139. result:='%call_lo('+result;
  140. addr_high_call:
  141. result:='%call_hi('+result;
  142. else
  143. InternalError(2013013003);
  144. end;
  145. result:=result+')'+regstr;
  146. end;
  147. function getopstr(const Oper: TOper): string;
  148. begin
  149. with Oper do
  150. case typ of
  151. top_reg:
  152. getopstr := asm_regname(reg);
  153. top_const:
  154. getopstr := tostr(longint(val));
  155. top_ref:
  156. getopstr := getreferencestring(ref^);
  157. else
  158. internalerror(10001);
  159. end;
  160. end;
  161. function getopstr_4(const Oper: TOper): string;
  162. var
  163. tmpref: treference;
  164. begin
  165. with Oper do
  166. case typ of
  167. top_ref:
  168. begin
  169. tmpref := ref^;
  170. Inc(tmpref.offset, 4);
  171. getopstr_4 := getreferencestring(tmpref);
  172. end;
  173. else
  174. internalerror(2007050403);
  175. end;
  176. end;
  177. {
  178. function getnextfpreg(tmpfpu : shortstring) : shortstring;
  179. begin
  180. case length(tmpfpu) of
  181. 3:
  182. if (tmpfpu[3] = '9') then
  183. tmpfpu:='$f10'
  184. else
  185. tmpfpu[3] := succ(tmpfpu[3]);
  186. 4:
  187. if (tmpfpu[4] = '9') then
  188. tmpfpu:='$f20'
  189. else
  190. tmpfpu[4] := succ(tmpfpu[4]);
  191. else
  192. internalerror(20120531);
  193. end;
  194. getnextfpreg := tmpfpu;
  195. end;
  196. }
  197. function is_macro_instruction(ai : taicpu) : boolean;
  198. var
  199. op: tasmop;
  200. begin
  201. op:=ai.opcode;
  202. is_macro_instruction :=
  203. { 'seq', 'sge', 'sgeu', 'sgt', 'sgtu', 'sle', 'sleu', 'sne', }
  204. (op=A_SEQ) or (op = A_SGE) or (op=A_SGEU) or (op=A_SGT) or
  205. (op=A_SGTU) or (op=A_SLE) or (op=A_SLEU) or (op=A_SNE)
  206. { JAL is not here! See comments in TCGMIPS.a_call_name. }
  207. or (op=A_LA) or ((op=A_BC) and
  208. not (ai.condition in [C_EQ,C_NE,C_GTZ,C_GEZ,C_LTZ,C_LEZ,C_COP1TRUE,C_COP1FALSE])) {or (op=A_JAL)}
  209. or (op=A_REM) or (op=A_REMU)
  210. or (op=A_DIV) or (op=A_DIVU)
  211. or (op=A_MULO) or (op=A_MULOU)
  212. { A_LI is only a macro if the immediate is not in thez 16-bit range }
  213. or (op=A_LI);
  214. end;
  215. procedure TMIPSInstrWriter.WriteInstruction(hp: Tai);
  216. var
  217. Op: TAsmOp;
  218. s,s1: string;
  219. i: integer;
  220. tmpfpu: string;
  221. tmpfpu_len: longint;
  222. r: TRegister;
  223. begin
  224. if hp.typ <> ait_instruction then
  225. exit;
  226. op := taicpu(hp).opcode;
  227. case op of
  228. A_P_SET_NOMIPS16:
  229. begin
  230. owner.AsmWriteLn(#9'.set'#9'nomips16');
  231. end;
  232. A_P_MASK,
  233. A_P_FMASK:
  234. begin
  235. s := #9 + gas_op2str[op] + #9'0x' + hexstr(taicpu(hp).oper[0]^.val,8)+ ',' + getopstr(taicpu(hp).oper[1]^) ;
  236. owner.AsmWriteLn(s);
  237. end;
  238. A_P_SET_MACRO:
  239. begin
  240. owner.AsmWriteLn(#9'.set'#9'macro');
  241. TMIPSGNUAssembler(owner).nomacro:=false;
  242. end;
  243. A_P_SET_REORDER:
  244. begin
  245. owner.AsmWriteLn(#9'.set'#9'reorder');
  246. TMIPSGNUAssembler(owner).noreorder:=false;
  247. end;
  248. A_P_SET_NOMACRO:
  249. begin
  250. owner.AsmWriteLn(#9'.set'#9'nomacro');
  251. TMIPSGNUAssembler(owner).nomacro:=true;
  252. end;
  253. A_P_SET_NOREORDER:
  254. begin
  255. owner.AsmWriteLn(#9'.set'#9'noreorder');
  256. TMIPSGNUAssembler(owner).noreorder:=true;
  257. end;
  258. A_P_SET_NOAT:
  259. begin
  260. owner.AsmWriteln(#9'.set'#9'noat');
  261. TMIPSGNUAssembler(owner).noat:=true;
  262. end;
  263. A_P_SET_AT:
  264. begin
  265. owner.AsmWriteln(#9'.set'#9'at');
  266. TMIPSGNUAssembler(owner).noat:=false;
  267. end;
  268. A_LDC1:
  269. begin
  270. if (target_info.endian = endian_big) then
  271. begin
  272. s := #9 + gas_op2str[A_LDC1] + #9 + getopstr(taicpu(hp).oper[0]^)
  273. + ',' + getopstr(taicpu(hp).oper[1]^);
  274. end
  275. else
  276. begin
  277. tmpfpu := getopstr(taicpu(hp).oper[0]^);
  278. s := #9 + gas_op2str[A_LWC1] + #9 + tmpfpu + ',' + getopstr(taicpu(hp).oper[1]^); // + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
  279. owner.AsmWriteLn(s);
  280. { bug if $f9/$f19
  281. tmpfpu_len := length(tmpfpu);
  282. tmpfpu[tmpfpu_len] := succ(tmpfpu[tmpfpu_len]);
  283. }
  284. r := taicpu(hp).oper[0]^.reg;
  285. setsupreg(r, getsupreg(r) + 1);
  286. tmpfpu := asm_regname(r);
  287. s := #9 + gas_op2str[A_LWC1] + #9 + tmpfpu + ',' + getopstr_4(taicpu(hp).oper[1]^); // + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
  288. end;
  289. owner.AsmWriteLn(s);
  290. end;
  291. A_SDC1:
  292. begin
  293. if (target_info.endian = endian_big) then
  294. begin
  295. s := #9 + gas_op2str[A_SDC1] + #9 + getopstr(taicpu(hp).oper[0]^)
  296. + ',' + getopstr(taicpu(hp).oper[1]^);
  297. end
  298. else
  299. begin
  300. tmpfpu := getopstr(taicpu(hp).oper[0]^);
  301. s := #9 + gas_op2str[A_SWC1] + #9 + tmpfpu + ',' + getopstr(taicpu(hp).oper[1]^); //+ ',' + getopstr(taicpu(hp).oper[2]^) + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
  302. owner.AsmWriteLn(s);
  303. {
  304. tmpfpu_len := length(tmpfpu);
  305. tmpfpu[tmpfpu_len] := succ(tmpfpu[tmpfpu_len]);
  306. }
  307. r := taicpu(hp).oper[0]^.reg;
  308. setsupreg(r, getsupreg(r) + 1);
  309. tmpfpu := asm_regname(r);
  310. s := #9 + gas_op2str[A_SWC1] + #9 + tmpfpu + ',' + getopstr_4(taicpu(hp).oper[1]^); //+ ',' + getopstr(taicpu(hp).oper[2]^) + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
  311. end;
  312. owner.AsmWriteLn(s);
  313. end;
  314. else
  315. begin
  316. if is_macro_instruction(taicpu(hp)) and TMIPSGNUAssembler(owner).nomacro then
  317. owner.AsmWriteln(#9'.set'#9'macro');
  318. s := #9 + gas_op2str[op] + cond2str[taicpu(hp).condition];
  319. if taicpu(hp).delayslot_annulled then
  320. s := s + ',a';
  321. if taicpu(hp).ops > 0 then
  322. begin
  323. s := s + #9 + getopstr(taicpu(hp).oper[0]^);
  324. for i := 1 to taicpu(hp).ops - 1 do
  325. s := s + ',' + getopstr(taicpu(hp).oper[i]^);
  326. end;
  327. owner.AsmWriteLn(s);
  328. if is_macro_instruction(taicpu(hp)) and TMIPSGNUAssembler(owner).nomacro then
  329. owner.AsmWriteln(#9'.set'#9'nomacro');
  330. end;
  331. end;
  332. end;
  333. const
  334. as_MIPSEL_as_info: tasminfo =
  335. (
  336. id: as_gas;
  337. idtxt: 'AS';
  338. asmbin: 'as';
  339. asmcmd: '$ABI $ARCH $NOWARN -EL $PIC -o $OBJ $ASM';
  340. supported_targets: [system_mipsel_linux];
  341. flags: [ af_needar, af_smartlink_sections];
  342. labelprefix: '.L';
  343. comment: '# ';
  344. dollarsign: '$';
  345. );
  346. as_MIPSEB_as_info: tasminfo =
  347. (
  348. id: as_gas;
  349. idtxt: 'AS';
  350. asmbin: 'as';
  351. asmcmd: '$ABI $ARCH $NOWARN -EB $PIC -o $OBJ $ASM';
  352. supported_targets: [system_mipseb_linux];
  353. flags: [ af_needar, af_smartlink_sections];
  354. labelprefix: '.L';
  355. comment: '# ';
  356. dollarsign: '$';
  357. );
  358. begin
  359. {$ifdef MIPSEL}
  360. RegisterAssembler(as_MIPSEL_as_info, TMIPSGNUAssembler);
  361. {$else MIPSEL}
  362. RegisterAssembler(as_MIPSEB_as_info, TMIPSGNUAssembler);
  363. {$endif MIPSEL}
  364. end.